Fwd: Re: CMP tool

Gary Yama (SNF) gyama at snf.stanford.edu
Wed Mar 5 08:29:32 PST 2008

can I get a list of materials all CMP users are doing and if they need 
to go back into clean, semi-clean or dirty tools in the fab.  i'll compile.

seems like the metal set is alreagy gold contaminated.

do the Ge or LTO folks need to go back into clean or semi clean tools?

if you are all OK with KOH decontam after clean metals CMP, then going 
back into CMOS clean tools, then convert the non-metal set for clean 

if that is a problem, then we'll have to see who has the most urgent 
need until the new set arrives.


Ed Myers wrote:

> Paul and Gary,
> I looked over my emails regarding CMP wafer categories.  If we 
> dedicate one set of consumables to Li-Wen or more generally gold 
> contaminated, we won't have a set for the following requests.  We have 
> a users doing Ge polishing and users doing LTO polishing.  These two 
> applications cover the Semi-clean group.
> By following the pathway, we will have a set for clean (metal or 
> non-metal), semi-clean (metal or non-metal) and gold contaminated 
> (everything).
> Will this be satisfactory for everyone?  I think we will have some 
> resistance to people going back in to epi, or similar tools after 
> polishing of wafers which may have Al, Ti or W on them.
> Ed
> At 10:13 AM 2/29/2008, you wrote:
>> Hi Ed,
>> Were you able to set up anything with Li-Wen?
>> Paul
>>> X-Sieve: CMU Sieve 2.3
>>> X-Mailer: QUALCOMM Windows Eudora Version
>>> Date: Thu, 28 Feb 2008 09:26:51 -0800
>>> To: Paul Rissman <rissman at stanford.edu>
>>> From: "H.-S. Philip Wong" <hspwong at stanford.edu>
>>> Subject: Fwd: Re: CMP tool
>>> Paul,
>>> Would you please make sure Ed look into this so Li-Wen Chang can 
>>> start doing process development? I paid for part of the capital cost 
>>> of the tool and I also proposed (and supported) the Intel grant for 
>>> the brush cleaner for the CMP tool. My usage of the tool has always 
>>> been "non-clean" (and I have made this clear up front before the 
>>> tool was purchased). So it does not really make sense that now I 
>>> cannot use the tool.
>>>> Date: Wed, 27 Feb 2008 11:45:59 -0800
>>>> To: Ed Myers <edmyers at stanford.edu>
>>>> From: "H.-S. Philip Wong" <hspwong at stanford.edu>
>>>> Subject: Re: CMP tool
>>>> Ed,
>>>> Thank you for the update. Please keep following up on the order. I 
>>>> am wondering if there is anything we can do in the meantime to get 
>>>> Li-Wen on the tool so she can start developing the process? Is the 
>>>> issue the platten or just the polishing pads? I am happy to pay for 
>>>> extra polishing pads if that means we need to pull out pads more 
>>>> often in the mean time.
>>>> Somehow I was not involved when the tool first got started (even 
>>>> though I paid for part of the tool) and how it was decided that the 
>>>> tool will be a clean tool. Before I put down the money, I have told 
>>>> everyone (Roger Howe, Tom Kenny, Paul Rissman) that my needs are 
>>>> non-clean polishing. That's why you see SangBum Kim polishing Au 
>>>> contaminated oxides (with nanowires on them). And therefore I was a 
>>>> bit surprised when I heard that the tool was only for clean samples 
>>>> (and thus my inquiry).
>>>> In any case, I am glad that this is being resolved and we can 
>>>> accommodate everyone. Thanks!
>>>> Philip
>>>> At 08:00 AM 2/27/2008, you wrote:
>>>>> Philip,
>>>>> When we purchased the tool I foresaw two categories, clean and 
>>>>> gold contaminated.  I purchased two sets of consumables with the 
>>>>> initial order to cover these applications.  Once it arrive, the 
>>>>> consensus  (Bosch driven) was to use the two sets for clean 
>>>>> non-metal and clean metal.  This original set-up was taking care 
>>>>> of 99% of the users.  Over the past month about 75% of the lab 
>>>>> members are requesting polishing of heavily gold contaminated 
>>>>> samples.  As a result I have placed an order for a third set of 
>>>>> consumables ($13k) and Bosch has order another patten to protect 
>>>>> their interest.  Li-Wen is caught because of our slow reaction to 
>>>>> the changing dynamics of the lab member request and my intention 
>>>>> to group the consumable order with the purchase of the post-CMP 
>>>>> clean tool.  We received funding from the Intel Educational Grant 
>>>>> for this tool.  There is some extra money in the grant for 
>>>>> supporting the CMP infrastructure.  However the University won't 
>>>>> deposit the check we received in November. As a result I have 
>>>>> written a PO against the SNF account.  The PO for the 3rd 
>>>>> consumable kit is in the signature/PO loop.  I will contact the 
>>>>> manufacture and see if they can ship the parts quickly when they 
>>>>> receive the PO.
>>>>> I will also talk with Li-Wen and review her samples to see if we 
>>>>> can find a way to get them polished.
>>>>> Regards,
>>>>> Ed
>>>>> At 09:26 PM 2/26/2008, H.-S. Philip Wong wrote:
>>>>>> Ed,
>>>>>> Can you fill me in on this? I believe Li-Wen has been planning on 
>>>>>> doing polishing for metals and she has been talking to you about it.
>>>>>> I don't understand what she means by "the CMP is clean process." 
>>>>>> My other student, SangBum Kim, has been polishing nanowire wafers 
>>>>>> using the CMP tool. Also, I paid for part of the tool and one of 
>>>>>> the condition of my chipping in money is that I can use it to 
>>>>>> polish non-clean wafers. What has changed?
>>>>>> Why did it take so long to get the polishing materials for metal?
>>>>>> We need to polish the whole wafer to get uniform polishing. 
>>>>>> Polishing in the crystal shop is not adequate.
>>>>>> At 09:13 PM 2/26/2008, Li-Wen Chang wrote:
>>>>>>> Yes.
>>>>>>> Just to let you know, I've submit a SU-13 for CMP in crystal shop.
>>>>>>> The one at snf is for clean process. Ed ordered another 
>>>>>>> supplement for
>>>>>>> metal process but will probably take months to arrive.
>>>>>>> So I'll start with crystal shop for now.
>>>>>>> And I'll be at SPIE on Thursday so will miss the group meeting.
>>>>>>> Li-Wen
>>>>>> Philip
>>>>>> H.-S. Philip Wong
>>>>>> Center for Integrated Systems, CISX 312
>>>>>> 420 Via Palou,
>>>>>> Stanford University, Stanford, CA 94305.
>>>>>> Phone: +1-650-725-0982
>>>>>> Fax: +1-650-725-7731
>>>>>> Mobile: +1-650-353-0796
>>>>>> Email: hspwong at stanford.edu
>>>> Philip
>>>> H.-S. Philip Wong
>>>> Center for Integrated Systems, CISX 312
>>>> 420 Via Palou,
>>>> Stanford University, Stanford, CA 94305.
>>>> Phone: +1-650-725-0982
>>>> Fax: +1-650-725-7731
>>>> Mobile: +1-650-353-0796
>>>> Email: hspwong at stanford.edu
>>> Philip
>>> H.-S. Philip Wong
>>> Center for Integrated Systems, CISX 312
>>> 420 Via Palou,
>>> Stanford University, Stanford, CA 94305.
>>> Phone: +1-650-725-0982
>>> Fax: +1-650-725-7731
>>> Mobile: +1-650-353-0796
>>> Email: hspwong at stanford.edu

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