From a-shima at fa2.so-net.ne.jp Wed May 2 04:28:01 2001 From: a-shima at fa2.so-net.ne.jp (shima) Date: Wed, 02 May 2001 07:28:01 -0400 Subject: Reminder:Announcement of technical seminar from Hitachi] Message-ID: <3AEFEF41.FC9FE39C@fa2.so-net.ne.jp> This seminar is on tomorrow. Hope to see you there. Akio Shima Stanford University CIS Room#110 (Visiting Scientist from Device Development Center, Hitachi, Ltd. Japan) shima at cis.stanford.edu (English) a-shima at ddc.hitachi.co.jp (English& Japanese) Tel: 650-725-6811 Fax:650-725-0991 420 Via Palou Mall Stanford,CA 94305-4070 -----Original Message----- From: Akio Shima [SMTP:shima at cis.Stanford.EDU] Sent: Monday, April 23, 2001 1:01 PM To: cis-students at cis.Stanford.EDU; ICL Students; kovacslab at thrash.stanford.edu; kstudents at cis.Stanford.EDU; mhstudents at chroma.stanford.edu; plumbers at cis.Stanford.EDU; smirc at smirc.stanford.edu; tstudents at kailas.stanford.edu; wonggroup at holst.stanford.edu; wooley-students at par.stanford.edu; labmembers at snf.stanford.edu Cc: 'j-nogu at ddc.hitachi.co.jp'; 'Krishna Saraswat'; 'Simon Wong' Subject: Announcement of technical seminar from Hitachi I would like to invite you to this special seminar. Date&time:May.3rd (Thursday) 16:15- Place: CIS 101 Title: " Impact of Low-K Dielectrics and barrier Metals on TDDB Lifetime of Cu Interconnects" By: Mr. Junji Noguchi, Device Development Center, Hitachi, Ltd. Japan Mr. Junji Noguchi from Hitachi, Ltd. Japan will present his latest research about Cu/Low-K interconnects reliability. He will present this topics at IRPS 2001 at Orland, Florida. His research about the same topic was also accepted in the last IRPS 2000 (held at San Jose, last May), so he can also introduce it to you there. Hope to see you there. Akio Shima Stanford University CIS Room#110 (Visiting Scientist from Device Development Center, Hitachi, Ltd. Japan) shima at cis.stanford.edu (English) a-shima at ddc.hitachi.co.jp (English& Japanese) Tel: 650-725-6811 Fax:650-725-0991 420 Via Palou Mall Stanford,CA 94305-4070 Biography: Mr.Junji Noguchi received the B.S. (1994) and the M.S. (1996) in electrical engineering from Shibaura Institute of Technology, Japan. In 1996 he joined Device Development Center, Hitachi Ltd., Tokyo, Japan, where he has been developing the multilevel metallization process technology for high speed devices, especially for metallization and reliability of copper interconnects. Title: " Impact of Low-K Dielectrics and barrier Metals on TDDB Lifetime of Cu Interconnects" (To be presented at IRPS 2001, Orland, Florida) Abstracts: Time-dependent dielectric breakdown (TDDB) in Cu metallization and the dependence on the presence of barrier metal, barrier metal thickness, the kind of barrier metals and the Low-K dielectrics, is investigated. There is a distinct difference in TDDB degradation mechanism with and without barrier metals. TDDB degradation of Cu interconnects without and with barrier metal is caused by bulk mode and CMP-surface mode, respectively. TDDB characteristics with barrier metal is almost the same for different barrier metal thickness and depends much more strongly on the electric field strength than the MIS structure. Additionally, both degradations, related to Cu-ion diffusion, are mainly caused not by thermal stress but by electrical stress. The barrier properties of Ta and TaN are better than those of TiN against Cu-ion diffusion into dielectrics, for TDDB. In the case of Low-K structure, TDDB property with barrier metal also depends on the CMP-surface. With Low-K dielectrics the electric field strength is concentrated near the CMP-surface and the TDDB lifetime reduces as K-value becomes lower. However, all low-K structure in this study are able to satisfy the 10-year TDDB reliability specifications for the capacitor. -------------- next part -------------- A non-text attachment was scrubbed... Name: Noguchi.doc Type: application/msword Size: 40960 bytes Desc: not available URL: From shott at snf.stanford.edu Wed May 2 10:37:30 2001 From: shott at snf.stanford.edu (John Shott) Date: Wed, 02 May 2001 10:37:30 -0700 Subject: Posters for CIS Annual Meeting ... Message-ID: <3AF045DA.79CF0DEE@snf.stanford.edu> SNF Lab Members: Thanks to those of you who have gotten you summary foils to me ... I appreciate your efforts. (Those of you who haven't shouldn't be surpised if you come in some day and can't log in to Coral ... while I'd rather not do that becuase it probably makes more work for us, that is an option that we have at our disposal). Bob Dutton is looking for 3 students who might be willing to prepare (well, actually, may already have prepared) poster material for the CIS Annual Review on Wednesday, May 16. From the foil submissions I have received, it is clear that some of you have extracted your foils from larger presentations. If you already have a full poster or have a set foils for a talk that could easily be turned into a poster, I'd appreciate hearing from you. This is a chance for you to be a hero among your peers ... a successful set of student posters will go a long way toward convincing the CIS Industrial Sponsors that they should continue funding of the SNF seed grant program (from which a number of you have benefitted ...). Please contact me if you would like to volunteer ... and research into non-traditional areas (relative to "garden variety" semiconductor and/or microfabrication research) are a feature. In other words, you MEMS, integrated optics, biotechnology folks are especially encouraged to participate in this event. Thanks, John From ctull at photonimaginginc.com Wed May 2 12:06:36 2001 From: ctull at photonimaginginc.com (Carolyn Tull) Date: Wed, 2 May 2001 12:06:36 -0700 Subject: job opening Message-ID: <000d01c0d33b$02ce9c80$c22a1018@wntck1.sfba.home.com> Dear Labmembers: Photon Imaging, Inc has an immediate opening for an experienced Solid State Device Physicist... if you know anyone who might be looking, I would greatly appreciate it if you could pass on the information in the attached file. Thanks very much! -Carolyn Tull -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: Device Physicist.doc Type: application/msword Size: 36864 bytes Desc: not available URL: From rcrane at snf.stanford.edu Wed May 2 14:07:35 2001 From: rcrane at snf.stanford.edu (Dick Crane) Date: Wed, 02 May 2001 14:07:35 -0700 Subject: Lab Meeting Thursday, May 3 Message-ID: <3AF07717.210BE933@snf.stanford.edu> I wish to invite the members of the SNF community to the Labmember's meeting tomorrow, May 3, at 10:00. The meeting will be brief. The agenda will include: 1.) Review of up coming equipment issues. 2.) A review of wet bench contamination issues and action items. 3.) More details of the SNF Community Service Plan. 4.) Open discussion. Thanks, see you tomorrow. Dick Crane From txx1905 at hotmail.com Thu May 3 15:11:34 2001 From: txx1905 at hotmail.com (David Xu) Date: Thu, 03 May 2001 15:11:34 -0700 Subject: openings-----process technicians/engineers Message-ID: An HTML attachment was scrubbed... URL: From mcvittie at cis.Stanford.EDU Wed May 9 09:13:47 2001 From: mcvittie at cis.Stanford.EDU (Jim McVittie) Date: Wed, 9 May 2001 09:13:47 -0700 (PDT) Subject: PEUG Mtg on Deep Si Etching, Thursday Message-ID: SNF Lab Members, I am chairing a Plasma Etch User Group meeting on MEMS related plasma etching tomorrow afternoon. The mtg is free and opening to anyone who wants to attend. The mtg is at the National Semiconductor Credit Union Auditorium in Santa Clara. See details below. There will be three talks on deep silicon etching. Cookies are served at 2:00 with the talks starting at 2:30. All the talks should be finished by 4:30. There should be a number of people going from Stanford. If you need a ride, let me know and I will see if I help. Jim -------------------------------------------------------------- James P. McVittie Senior Research Scientist Allen Center for Integrated Systems jmcvittie at stanford.edu Stanford University Tel: (650) 725-3640 Rm. 336, 330 Serra Mall Fax: (650) 723-4659 Stanford, CA 94305-4075 > ******************* PLASMA ETCH USERS GROUP ********** > of the Northern California Chapter of the AVS > ******************************************************** > > May 2001 MEETING > > Topic: MEMS Related Plasma Etching > > Date: Thursday, May 10, 2001 > Time: 2:00 - 5:00 pm > Place: National Semiconductor Credit Union Auditorium > 955 Kifer Rd. > Santa Clara, CA 95051 > > Directions to the National Semiconductor Credit Union Auditorium: > >From 101: Go south on Lawrence Expressway. Turn right on Kifer Rd. > Turn right into the driveway of the National Semiconductor Credit Union > (955 Kifer Rd.) and find parking in the Credit Union parking lot. The > auditorium is on the west side of the building and can be entered from the > door in the rear next to the company park. > > >From 280: Go north on Lawrence Expressway. Turn left on Kifer Rd. > Follow directions above. > > **************************************************** > See a map: http://www.vacuum.org/nccavs/peug_mm.html > **************************************************** > > Agenda: 2:00 - 2:30 Refreshments > 2:30 - 4:00 Presentations > > Chair: Jim McVittie, mcvittie at cis.Stanford.EDU > > Speakers: > > --------------- > Deep Reactive Ion Etching (DRIE) for Multi-Wafer Projects > > Arturo Ayon > Sony Semiconductor > 1 Sony Place > San Antonio, TX 78245-2100 > > We review the physics and the performance of a DRIE tool, the influence of > etching variables on anisotropy, uniformity, silicon etching rate, > selectivity and scalloping. We discuss the charging effects observed on > high aspect ratio structures when employing SOI substrates, the dependance > of the footing effect on etching conditions, and the utilization of the > local electric fields generated when reaching a dielectric stop layer for > achieving ion flux steering. > > The utilization of deep reactive ion etching (DRIE) in conjunction with > wafer bonding schemes makes possible the micromanufacturing of complex > 3-dimensional structures at a microscale level, in a manner not previously > practical and in some cases unattainable. Plasma etching methods, in > general, limit the geometry to extruded 2D prismatic shapes. However, DRIE > in combination with wafer bonding techniques offers to designers the > flexibility not available to the previous generation of technologists. > > These techniques have been successfully applied in the microfabrication of > a large variety of structures including bipropellant silicon > micro-rockets, heat exchangers, turbo chargers and micro-combustors. > ______________ > > Low Frequency Deep Reactive Ion Etching for SOI Processing > > Matthew Wasilik > Berkeley Sensor & Actuator Center > 497 Cory Hall > Berkeley, CA 94720-1770 > > Due to the inherently non-uniform etching effects in the standard DRIE > process, a new technique has been developed specifically for SOI (Silicon > On Insulator) etching.In short, a separate pulsed, low frequency power > input is applied to the platen during the etching cycle. This essentially > allows ions to escape more readily from deep trenches when the etching > cycle is done. From this a decrease in over-etch sensitivity emerges, and > the notching or ^footing^ of Silicon structures is minimized. The end > result is the ability to produce high quality large aspect ratio > structures. > > ______________ > Advanced Deep Silicon Etching for Deep Trench Isolation, Optical > Components > and Micro-Machining Applications > > Padmapani Nallan, Anisul Khan, Sharma Pamarthy, Shu-Ting Hsu, Ajay Kumar > > Applied Materials > 3320 Scott Boulevard > Santa Clara, CA 95054 > > Traditionally, deep silicon etching has been used for DRAM capacitor > trenches and deep trench isolation applications for BiCMOS devices. > Recently, we have seen a plethora of new applications requiring deep > silicon etching (thru wafer etches for inkjet applications and optical > fiber alignment, microsensors and actuators etc.). The etch requirements > for all these applications are as diverse as the applications themselves. > The CDs range from sub-micon to millimeter sizes and the etch depths range > from a 1-2um to through wafer (~700um for a six inch wafer). Some > applications such as waveguides require very smooth sidewall (typical > requirement is <4nm surface roughness to avoid light scattering), while > through wafer etches require very high etch rates (>10um/min) with very > high selectivity to resist and hardmask (typically >70:1). These varied > applications with a wide range of etch requirements have motivated us to > develop a portfolio of processes, in the DPS-DT chamber, which cater to > different application needs. We have used two different approaches to > develop processes that satisfy the requirements of the different > applications. One is a single step approach where we use a SF6/HBr/O-2 or > a SF6/C4F8 chemistry to etch the trenches. This approach is necessary for > applications where smooth sidewalls are required. An SF6 based etch > chemistry was chosen to get high etch rates. The other is the Time > Multiplex Gas Modulation (TMGM) approach, where we have a sequence of > short deposition and etch steps cycled many times over to get the required > etch depth. This approach gives a high etch rate with very high > selectivity to both oxide and resist. The capabilities of our tool with > all these processes will be presented. > > > > _____________________________ > > Della Miller > AVS West > 1265 El Camino Real, Ste. 109 > Santa Clara CA 95050 > > Phone: 408-246-3600 > Fax: 408-246-7700 > E-mail: della at vacuum.org > Web: www.vacuum.org > From eap at gloworm.Stanford.EDU Fri May 11 12:24:58 2001 From: eap at gloworm.Stanford.EDU (Eric Perozziello) Date: Fri, 11 May 2001 12:24:58 -0700 (PDT) Subject: Quartz Beaker Message-ID: <200105111924.MAA08094@gloworm.Stanford.EDU> Does anyone know the whereabouts of the Quartz beaker that used to live on the table behind the Gryphon. The beaker is a clean quartz beaker and was being stored there (with permission) to keep it from being accidentally contaminated by mixup with general glassware. Any information would be appreciated. Thank you, -Eric From mahnaz at snf.stanford.edu Fri May 11 15:02:44 2001 From: mahnaz at snf.stanford.edu (Mahnaz Mansourpour) Date: Fri, 11 May 2001 15:02:44 -0700 Subject: Clean up Message-ID: <3AFC6184.8CF98BD9@snf.stanford.edu> All, On wednesday 5/9 Mario found two bottles of developer in the Litho area by the head way. One sitting on the floor and one on the bench. Believe or not, that day we actually had the lab inspection and many thanks to Mario who took care of the bottles. This is a shared facility and every one's responsibility is to do their best not to cause any harm to the lab members and secondly the equipment's. This kind of behavior is not acceptable at all. mahnaz From caudillomalik at netscape.net Wed May 16 05:25:19 2001 From: caudillomalik at netscape.net (David Caudillo) Date: Wed, 16 May 2001 08:25:19 -0400 Subject: (May 16@05:10) Coral is Down Message-ID: <069E822F.5D058524.0DC3DFDB@netscape.net> Good Morning, Coral is non operational at this time. -- David Caudillo __________________________________________________________________ Get your own FREE, personal Netscape Webmail account today at http://webmail.netscape.com/ From caudillomalik at netscape.net Wed May 16 06:59:53 2001 From: caudillomalik at netscape.net (David Caudillo) Date: Wed, 16 May 2001 09:59:53 -0400 Subject: 2nd Mssg (May16@06:55) Coral is Down Message-ID: <7DF41820.4958E2C1.0DC3DFDB@netscape.net> Having problems with netscape to hope you get the message. I've left a voice mail with Chris Bell and John Shott -- David Caudillo __________________________________________________________________ Get your own FREE, personal Netscape Webmail account today at http://webmail.netscape.com/ From caudillomalik at netscape.net Wed May 16 08:17:18 2001 From: caudillomalik at netscape.net (David Caudillo) Date: Wed, 16 May 2001 11:17:18 -0400 Subject: Coral is up Message-ID: <6E2C9401.32A75457.0DC3DFDB@netscape.net> -- David Caudillo __________________________________________________________________ Get your own FREE, personal Netscape Webmail account today at http://webmail.netscape.com/ From osako at cis.Stanford.EDU Wed May 16 08:54:43 2001 From: osako at cis.Stanford.EDU (Shinichi Osako) Date: Wed, 16 May 2001 08:54:43 -0700 Subject: Announcement of seminar Message-ID: <006201c0de20$868a3c60$a96540ab@stanford.edu> ---------- Technical Seminar ---------- May.17th (Thursday) 6:00-7:00PM Place: CIS 101, Stanford University Title: "A Wide Dynamic Range Switched-LNA in SiGe BiCMOS" Speaker : Mr. Toshifumi Nakatani (Panasonic, Japan) Abstract-- A wide dynamic range, high current efficient switched-LNA has been developed by using SiGe BiCMOS Technology. The low loss RF MOSFET reduced silicon substrate effect at high frequency is used as a bypass switch of LNA. The 800- 900MHz LNA is demonstrated in this work. In high gain / low distortion mode for transmitting and receiving simultaneously, the amplifier achieves 15.3dB gain, 1.4dB noise figure and +1.6dBm IIP3 with 5.9mA DC current. In high gain / low current mode for receiving only, 13.3dB gain, 1.6dB noise figure and -0.6dBm IIP3 is achieved with 3.0mA. In low gain mode, 1.4dB insertion loss and +16.1dBm IIP3 with < 10uA is realized by the bypass switch. The switched-LNA is housed in a very small and low cost SON12 plastic package with the Down-Mixer. If you're interested in the seminar, Please join it. Shinichi Osako --------------------------------- Shinichi Osako CIS-110, Stanford University, Stanford, CA 94305, USA e-mail: osako at cis.stanford.edu osakocchi at aol.com --------------------------------- -------------- next part -------------- An HTML attachment was scrubbed... URL: From mahnaz at snf.stanford.edu Wed May 16 11:02:31 2001 From: mahnaz at snf.stanford.edu (Mahnaz Mansourpour) Date: Wed, 16 May 2001 11:02:31 -0700 Subject: [Fwd: [Fwd: Karl Suss - Meeting]] Message-ID: <3B02C0B7.9A032F01@snf.stanford.edu> Kind reminder that the meeting is today at 2. mahnaz -------------- next part -------------- An embedded message was scrubbed... From: Mahnaz Mansourpour Subject: [Fwd: Karl Suss - Meeting] Date: Fri, 11 May 2001 16:49:02 -0700 Size: 5098 URL: From mahnaz at snf.stanford.edu Wed May 16 11:10:24 2001 From: mahnaz at snf.stanford.edu (Mahnaz Mansourpour) Date: Wed, 16 May 2001 11:10:24 -0700 Subject: Missing variables Message-ID: <3B02C290.45B0A7D0@snf.stanford.edu> Hello all, We are missing the variable print out on ultratech, the variables are used to change the system from 4 inch setting to 3 inch. We kept them on front panel of the system and according to the main user, always kept there if you know where there about please let me know. mahnaz From rcrane at snf.stanford.edu Wed May 16 23:43:23 2001 From: rcrane at snf.stanford.edu (Dick Crane) Date: Wed, 16 May 2001 23:43:23 -0700 Subject: Fire alarm, Wednesday night, 5/16 Message-ID: <3B03730B.D7B767A@snf.stanford.edu> At approximately 9:15 PM, on Wednesday, May 16, 2001, the SNF fab, CIS building and CISX building were evacuated due to a power supply fire in the basement of CIS. The buildings reopened around 10:30 PM and normal fab activities resumed by 10:45 PM. The fire was caused by a high voltage resistor failure in the Innotec e-gun power supply. The open resistor caused an arc which burnt nearby PVC insulated wiring within the power supply enclosure. PVC insulation smokes heavily when burning. All damage was confined to the Innotec HV power supply. The Innotec will be down for 2-4 weeks for repairs. Thanks to all who were here for an orderly evacuation. Dick Crane From rcrane at snf.stanford.edu Fri May 18 18:10:10 2001 From: rcrane at snf.stanford.edu (Dick Crane) Date: Fri, 18 May 2001 18:10:10 -0700 Subject: Fire alarms in CIS Message-ID: <3B05C7F2.F354DDA7@snf.stanford.edu> I would like to clarify the fire alarm situation in CIS. The fire alarm panel is in the process of being replaced. During the rewiring the normal pull stations and smoke detectors are NOT operational. Should an emergency occur requiring a fire department response, call 9-911 and evacuate the building (if needed). Two temporary pull stations have been installed in the cleanroom near the emergency, double door exits by the chem passthru and by the non-metal wet bench. Temporary annunciators (light and sound) are located in the hall outside the temporary pull stations, and in the fab. The CISX fire protection system is operating normally. The construction and replacement of the fire protection system should be completed by late June. Thanks for your cooperation, Dick Crane From mahnaz at snf.stanford.edu Mon May 21 17:08:21 2001 From: mahnaz at snf.stanford.edu (Mahnaz Mansourpour) Date: Mon, 21 May 2001 17:08:21 -0700 Subject: clean up Message-ID: <3B09ADF5.1967DEDF@snf.stanford.edu> Hello all, As you know we have a lot of problems in the gowning room. Starting tomorrow I have purchased some plastic white rings that should go around your hanger this way we will know which hangers are in use and can remove unused ones. We will remove the hangers that has no ring around it by 5/29. mahnaz From mbadi at relgyro.Stanford.EDU Mon May 21 18:31:40 2001 From: mbadi at relgyro.Stanford.EDU (Mohammed H. Badi) Date: Mon, 21 May 2001 18:31:40 -0700 (PDT) Subject: KOH and Gold Question Message-ID: Hi all, I'm doing an 80C KOH etch of silicon and have been having some trouble. I have chrome/gold (100A and 3000A respectively) pads on my wafer that are 90um x 90 um that REFUSE to stick to the silicon underneath it. The pads (and thin gold lines) do, however, stick to silicon nitride on other parts of the wafer. My question for you: is there anything I can do to stop the gold pads from floating off? Maybe a different adhesion layer? A different etch temperature? These gold squares on silicon act as ground pads for my devices. Thank you. moe. -------- Mohammed H. Badi "That's just so typically me." 650-906-0663 From mahnaz at snf.stanford.edu Wed May 23 11:16:03 2001 From: mahnaz at snf.stanford.edu (Mahnaz Mansourpour) Date: Wed, 23 May 2001 11:16:03 -0700 Subject: Clean up Message-ID: <3B0BFE63.BF8BEB89@snf.stanford.edu> All, Please remove your wafers from the singe oven, and make room for lab members to do their work. Three cassettes in particular has been in there for awhile. I hate to get rid of your wafers so please clean up. mahnaz From jlngau at stanford.edu Wed May 23 13:35:34 2001 From: jlngau at stanford.edu (julie ngau) Date: Wed, 23 May 2001 13:35:34 -0700 (PDT) Subject: Stolen mask case Message-ID: Hello all, I have just noticed that sometime in the past two weeks, the plastic case holding and PROTECTING my mask was taken from my clear storage container while the mask was left behind. It is distressing that anyone using this lab can have so little regard for someone else's personal property and his/her RESEARCH. We must all store our wafers, equipment, and works in progress in the cleanroom. This lab functions successfully in part because most users respect one another's work and can trust that no one ever knowingly and willfully jeopardizes their work. I know that the majority of labmembers are considerate users of this shared facility and it is unfortunate that the actions of one or two can be so detrimental to the successful synergy at SNF. I would appreciate it if the perpetrator returns the case. I would also greatly appreciate a written explanation of how you could justify your action because, quite honestly, I just cannot comprehend it. Julie Ngau From mtang at snf.stanford.edu Thu May 24 10:45:36 2001 From: mtang at snf.stanford.edu (Mary Tang) Date: Thu, 24 May 2001 10:45:36 -0700 Subject: Sharps Box Message-ID: <3B0D48C0.1ED84F3A@snf.stanford.edu> Just a reminder -- Please do not put any "sharps" into the lab trash containers. "Sharps" includes wafers and glassware (broken or intact), razor and exacto-knife blades, and anything else that might shatter or cut. Please be considerate of our janitorial staff, who should not have to risk life and limb (or at least fingers) in emptying our trash containers (or labmembers like me, who invariably end up fishing through the trash for the cleanroom wipe on which we've scrawled our data.) Sharps should be placed in the blue & white labeled Fisher cardboard box, located next to the flammables cabinet in the semiclean area behind the furnaces. When the box is full, notify Staff (the box will then be taped shut and dumped intact into the garbage dumpster.) Mary -- Mary X. Tang, Ph.D. National Nanofabrication Users' Network Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at snf.stanford.edu From mbell at snf.stanford.edu Thu May 24 16:15:46 2001 From: mbell at snf.stanford.edu (Mike Bell) Date: Thu, 24 May 2001 16:15:46 -0700 Subject: Coral Maint. Message-ID: <3B0D9622.706477AE@snf.stanford.edu> Lab Members, The Coral system will be down tomorrow Friday, May 25 from 6:30 AM until 8:00 AM for maintanence of the network switches. Thanks, Mike Bell SNF Staff From mahnaz at snf.stanford.edu Fri May 25 13:47:43 2001 From: mahnaz at snf.stanford.edu (Mahnaz Mansourpour) Date: Fri, 25 May 2001 13:47:43 -0700 Subject: [Fwd: clean up] Message-ID: <3B0EC4EF.56204E7A@snf.stanford.edu> Please try to take care of this As we are planning to take care of the garments on Tuesday morning 5/29. mahnaz -------------- next part -------------- An embedded message was scrubbed... From: Mahnaz Mansourpour Subject: clean up Date: Mon, 21 May 2001 17:08:21 -0700 Size: 1379 URL: From afreeman at cytoplex.com Fri May 25 13:57:43 2001 From: afreeman at cytoplex.com (Alex Freeman) Date: Fri, 25 May 2001 13:57:43 -0700 (PDT) Subject: help with metalica Message-ID: <20010525205743.9AA9336F9@sitemail.everyone.net> An embedded and charset-unspecified text was scrubbed... Name: not available URL: From gigi at snow.stanford.edu Wed May 30 10:35:54 2001 From: gigi at snow.stanford.edu (Luigi Scaccabarozzi) Date: Wed, 30 May 2001 10:35:54 -0700 (PDT) Subject: SEM reservation Message-ID: I cannot use my reservation from 12 to 1.30pm. Sorry for the late notice. Gigi From yiching at stanford.edu Wed May 30 22:38:42 2001 From: yiching at stanford.edu (Yiching Liang) Date: Wed, 30 May 2001 22:38:42 -0700 (PDT) Subject: PhD Defense announcement Message-ID: Title: Piezoresistive Cantilevers for Force Measurements Yiching Liang Department of Mechanical Engineering, Stanford University Ph.D. Defense Monday, June 4, 2001. 11:00 AM Refreshments at 10:45 AM Location: Packard Auditorium (Packard 101) ABSTRACT Atomic Force Microscopy (AFM) has been used extensively for imaging surface topography to atomic resolution. In addition to imaging applications, AFM cantilevers are also effective instruments for measuring very small forces. Piezoresistive AFM, which uses cantilevers with integrated piezoresistive sensors, has become an attractive alternative to the more popular optical AFM because of its ease of use and scalability. Force measurements can provide important information for studying various physical phenomena. This includes physical forces such as friction and surface adhesion, and biological processes such as cellular adhesion, antibody-antigen binding, molecular mechanics, protein folding, and large-scale animal biomechanics. This work focuses on the development of piezoresistive cantilevers as force sensors. Several design and optimization techniques will be used to show that piezoresistive AFM can achieve resolution comparable to that of an optical AFM. Ultra-thin n-type piezoresistive cantilevers were fabricated and characterized to show significant performance improvement over previous work. Noise characteristics and how they relate to optimization will also be discussed. Finally, a particular force measurement is described where piezoresistive cantilevers are used to measure the van der Waals adhesion properties of individual gecko setae. From mahnaz at snf.stanford.edu Thu May 31 17:15:00 2001 From: mahnaz at snf.stanford.edu (Mahnaz Mansourpour) Date: Thu, 31 May 2001 17:15:00 -0700 Subject: Log sheet Message-ID: <3B16DE84.773B1A52@snf.stanford.edu> Hello all, When you are checking out items from stock room please fill out all the information listed on the log. It is a tedious job trying to track little things down for Raphael so please make sure you write clearly and jot down the quantity and ID number of the items you are taking that will save time and lots of time for him. Open to suggestion and comments mahnaz From yairi at stanford.edu Thu May 31 17:27:30 2001 From: yairi at stanford.edu (micah yairi) Date: Thu, 31 May 2001 17:27:30 -0700 (PDT) Subject: Defense Announcement Message-ID: Title: An Optically Controlled Optroelectronic Switch: From Theory to 50 GHz Burst-Logic Demonstration Who: Micah Yairi (Advisor Prof. David A.B. Miller) Where/When: 4:15pm, Monday, June 4th Applied Physics, Rm. 200 (main auditorium) (refreshments served at 4:00pm) Abstract: For high-speed communication, it is essential to multiplex, demultiplex, and switch individual data bits at very rapid rates. Similarly, in WDM systems the ability to change wavelengths dramatically increases the potential connectivity of such systems. We have been working on an optically controlled optical gate that is capable of both high speed optical gating and wavelength conversion. We present three generations of optically controlled quantum well optical gates. The recovery of these devices is based on diffusive conduction, a novel optoelectronic behavior that enables fast gating. Our multi-layered device exhibits a 7 ps FWHM switching time that requires a switching energy of only 40 fJ/mm2. This device has also demonstrated burst-logic operation at 50 GHz. These optically controlled optical gates are low-power, scalable in 2D arrays, and integrable with silicon circuitry, offering intriguing possibilities for real-world applications.