EE310 Integrated Circuits Seminar, 10/8/02

Ann Guerra guerra at par.stanford.edu
Thu Oct 3 18:36:32 PDT 2002


  EE310 Integrated Circuits Technology and Design Seminar

"Circuit Techniques for a Monolithic Cartesian Feedback Power
		   Amplifier System"

		    Joel Dawson
		 Stanford University

		Tuesday, October 8, 2002
			4:15 p.m.
		Building 380, Room 380X


			ABSTRACT

Designers of RF power amplifiers (PAs) for modern wireless systems
are faced with a difficult tradeoff.  On one hand, the PA consumes the
lion's share of the power budget in most transceivers; it follows that
in a cellular phone, for example, battery lifetime is largely
determined by the power efficiency of the PA.  On the other hand, it
may be desirable to have high spectral efficiency - the ability to
transmit data at the highest possible rate for a given channel
bandwidth.  The design conflict is that while spectral efficiency
demands a highly linear PA, power efficiency is maximized when a PA is
run as a constant-envelope, nonlinear element.  The current state of
the art is to design a moderately linear PA and employ some
linearization technique.  The amplifier is run as close to saturation
as possible, maximizing its power efficiency, and the linearization
system maximizes the spectral efficiency in this near-saturated
region.

There are many different linearization techniques.  Our work has
focused on Cartesian feedback systems for two main reasons: 1) because
they employ analog feedback, the requirement for a detailed nonlinear
model of the PA is greatly relaxed; 2) they automatically and
elegantly compensate for process variations, temperature fluctuations,
and aging.  Nevertheless, historically the technique has suffered the
practical shortcoming of relying on synchronous downconversion,
which has been difficult to ensure without manual trimming.  This
problem, combined with the recent trend toward fully monolithic
systems, has caused Cartesian feedback to languish for years as little
more than an academic curiosity.

We have solved the synchronous downconversion problem with a new,
nonlinear, analog phase alignment regulator.  What this enables, for
the first time, is a fully integrated Cartesian feedback system that
can function with an absolute minimum of trimming.  A prototype IC,
complete with power amplifier, phase alignment regulator, and
Cartesian feedback circuitry, will be the focus of this presentation.
The IC was fabricated in National's 0.25um process.









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