From SamS at LSInc.biz Tue Jul 1 15:23:42 2003 From: SamS at LSInc.biz (Samuel B. Schaevitz) Date: Tue, 01 Jul 2003 15:23:42 -0700 Subject: Laser drilled micro-holes Message-ID: <5.2.1.1.2.20030701143957.0246bf40@pop.lilliputiansystemsinc.com> Hey All, Has anyone used a vendor to laser ablate small holes or other patterns on their wafers? My application is an aligned pattern of 3um diameter, 2um deep holes in a ceramic thin-film deposited on my wafer (the material is not easily etched by RIE or wet chemistry). Please do not suggest FIB, it is 4 orders of magnitude too slow and expensive for the large number of holes (~200,000) I need to do. Thanks, Sam From opticalmachine at hotmail.com Thu Jul 3 14:16:22 2003 From: opticalmachine at hotmail.com (Ben Jian) Date: Thu, 03 Jul 2003 14:16:22 -0700 Subject: lowest price vendor of silicon wafers? Message-ID: Hi all, I would like to find a silicon wafer vendor with the lowest prices. I need both 4 inch single-side polished (SSP) and double-side polished (DSP) wafers. For your information, I have been buying my silicon wafers from Omnisil, and the price is $8.50 per wafer for test grade SSP wafers and $14 per wafer for test grade DSP wafers, both in quantities of 25. I am somewhat concerned about the large thickness variation from this vendor. Thanks for your help. Ben _________________________________________________________________ MSN 8 with e-mail virus protection service: 2 months FREE* http://join.msn.com/?page=features/virus From mahnaz at snf.stanford.edu Thu Jul 3 16:17:03 2003 From: mahnaz at snf.stanford.edu (Mahnaz) Date: Thu, 03 Jul 2003 16:17:03 -0700 Subject: EV VIsit Message-ID: <3F04B96E.C69ABF4@snf.stanford.edu> Hello all, Chad Brubaker staff engineer of Electronic Vision will be here at Stanford on 7/10. We will go over the EV bonder in the morning starting at 9:30. Please join me in the lab at that time. If you are a new labmember and will need bond training in near future, it is required for you to attend this session. We will cover the EV aligner in the afternoon around 2 pm. Please mark your calendar and bring your questions and concerns. mahnaz From ankurjn at stanford.edu Sun Jul 6 09:59:59 2003 From: ankurjn at stanford.edu (Ankur Jain) Date: Sun, 6 Jul 2003 09:59:59 -0700 (PDT) Subject: wirebonding services around campus? Message-ID: hello everyone, Could you please tell me if you know of any wirebonding services in and around campus, apart from Pauline Prather? If there is enough response, I will compile all responses and post them for everyone to see. Thanks, Ankur. ************************************************************************* ANKUR JAIN Graduate Student Residence: Department of Mechanical Engineering 19 Comstock Circle Apt. A Room 201, Building 530 Stanford University Stanford University, CA-94305 CA - 94305 Ph: 1-650-736-0044 Ph: 1-650-497-1784 http://www.stanford.edu/~ankurjn From nf1 at cec.wustl.edu Mon Jul 7 11:01:35 2003 From: nf1 at cec.wustl.edu (nf1 at cec.wustl.edu) Date: Mon, 7 Jul 2003 13:01:35 -0500 (CDT) Subject: Microscope Measurement Message-ID: <3557.171.64.96.61.1057600895.squirrel@clarion.cec.wustl.edu> I was wondering if anyone could recommend a good microscope in one of the labs to use to make measurements of a 20-40 micrometer VCSEL mesa. I would like for it to have good resolution at that scale and also a way for making quantitative measurements, such as a scale in the eyepiece. Any suggestions would be greatly appreciated. Thanks, Nick Fichtenbaum From grupp at snowmass.Stanford.EDU Mon Jul 7 21:12:00 2003 From: grupp at snowmass.Stanford.EDU (Dan Grupp) Date: Mon, 7 Jul 2003 21:12:00 -0700 (PDT) Subject: CMP sources Message-ID: Hello, I am looking for a CMP source. I need polish layers that are around 100 nm. Berekeley is out because i have metal. Cornell may be a possibility. Does anyone have experience with these tools or outside vendors? Thanks, Dan --------------------------------------------------------------------------- Dr. Daniel Grupp, Visiting Scholar Center for Integrated Systems Stanford University Stanford, CA 94305 (650) 724-6911 FAX: 723-4659 --------------------------------------------------------------------------- From dwshin at stanford.edu Tue Jul 8 09:06:35 2003 From: dwshin at stanford.edu (Dong-Woon Shin) Date: Tue, 8 Jul 2003 09:06:35 -0700 (PDT) Subject: Anyone aware of PASA (conductive coating) ? Message-ID: Hi. I am currently looking for an old commercialized polymer product called PASA. I think it stands for polyaniline sulfuric(sulfonic?) acid but this is not listed in MERCK index. It is a water soluble conductive polymer. Unfortunately, I cannot find any record regarding the vendor information. I think it has been used by Dai group (by postdoc I heard) and by someone named Ku at CIS sometime ago. Could you please let me know if you are aware of the chemical, substitute or any person using similar things? Thank you. Sincerely, Dongwoon Shin From mahnaz at snf.stanford.edu Wed Jul 9 16:58:43 2003 From: mahnaz at snf.stanford.edu (Mahnaz) Date: Wed, 09 Jul 2003 16:58:43 -0700 Subject: [Fwd: EV VIsit] Message-ID: <3F0CAC33.1FCBCE37@snf.stanford.edu> -------------- next part -------------- An embedded message was scrubbed... From: Mahnaz Subject: EV VIsit Date: Thu, 03 Jul 2003 16:17:03 -0700 Size: 1539 URL: From zappe at stanford.edu Wed Jul 9 19:32:53 2003 From: zappe at stanford.edu (Stefan Zappe) Date: Wed, 09 Jul 2003 19:32:53 -0700 Subject: Amorphous Silicon Deposition on Pyrex Wafers Message-ID: <5.1.0.14.2.20030709192830.02f61dc0@zappe.pobox.stanford.edu> Hi, I will have a run at Strataglass around the 21st of July. Is anyone interested in adding 25 Wafers and sharing the costs ? Costs for the run are 1150 USD (plus in my case 300 USD for a cold pull). Let me know ... Thanks, Stefan From opticalmachine at hotmail.com Thu Jul 10 16:57:55 2003 From: opticalmachine at hotmail.com (Ben Jian) Date: Thu, 10 Jul 2003 16:57:55 -0700 Subject: Does anyone know how to combine layers in L-Edit? Message-ID: Hi, I have tried several times to do boolean operation on mask layers to generate a new layer without success. If someone has successfully made it to work, please show me how to do it. Thanks a lot. Ben _________________________________________________________________ The new MSN 8: advanced junk mail protection and 2 months FREE* http://join.msn.com/?page=features/junkmail From mahnaz at snf.stanford.edu Thu Jul 10 17:42:33 2003 From: mahnaz at snf.stanford.edu (Mahnaz) Date: Thu, 10 Jul 2003 17:42:33 -0700 Subject: Ovens Message-ID: <3F0E07F9.D2AE41CC@snf.stanford.edu> Hello all Due to the power outage, we have lost exhaust to SINGE, BlueM and the 110 degree oven. Please do not use these ovens till further notice. Use the Yes oven instead of Singe oven, you will get the HMDS on the wafers so you need to skip the hmds on the track. Hot plate could substitute for the 110 oven for to night. I will send out more information tomorrow morning. mahnaz -------------- next part -------------- An HTML attachment was scrubbed... URL: From ychliu at stanford.edu Thu Jul 10 18:18:40 2003 From: ychliu at stanford.edu (Yaocheng Liu) Date: Thu, 10 Jul 2003 18:18:40 -0700 Subject: mask missing Message-ID: <3F0E1070.6C5A2141@stanford.edu> When we had the power glitch this afternoon, I was unloading my mask from Nikon. I put it in a mask box and kept them on the table opposite to Nikon, next to EV Align. But when I went back around 5:30pm, both the box and the mask were gone. If you took any mask from that area after the power glitch, could you please check to make sure it is yours? Since it was totally dark, I might have put my mask into your box by mistake. My mask is a 5" plate, with my name on it. Thanks for your help. Yaocheng From jerabek at snf.stanford.edu Fri Jul 11 08:35:28 2003 From: jerabek at snf.stanford.edu (Paul Jerabek) Date: Fri, 11 Jul 2003 08:35:28 -0700 (PDT) Subject: LRS-18 Message-ID: To whom it may concern. Micronic mask laser writer is down.Exposure laser doesn't start discharge after the power failure.Micronic field service has been notified. -Paul From vilanova at snf.stanford.edu Fri Jul 11 10:18:43 2003 From: vilanova at snf.stanford.edu (Mario Vilanova) Date: Fri, 11 Jul 2003 10:18:43 -0700 (PDT) Subject: Ovens Message-ID: Exhaust motor repairs completed . Ovens ok to use. From yap at ieee.org Fri Jul 11 13:11:34 2003 From: yap at ieee.org (Yves-Alain Peter) Date: Fri, 11 Jul 2003 22:11:34 +0200 Subject: Does anyone know how to combine layers in L-Edit? References: Message-ID: <3F0F19F6.90B59096@ieee.org> You need to have either L-Edit 10 or the X-tools in order to do boolean operations. Yves-Alain Ben Jian wrote: > Hi, > > I have tried several times to do boolean operation on mask layers to > generate a new layer without success. If someone has successfully made it to > work, please show me how to do it. Thanks a lot. > > Ben > > _________________________________________________________________ > The new MSN 8: advanced junk mail protection and 2 months FREE* > http://join.msn.com/?page=features/junkmail -- ******************************************** Yves-Alain Peter, PhD Voie-Romaine 9 CH-2036 Cormondr?che Switzerland phone: + 41 32 730 32 07 mobile: + 41 79 748 46 32 fax: + 1 801 912 5730 email: yap at ieee.org http://www.stanford.edu/~yapeter ******************************************** From mtang at snf.stanford.edu Fri Jul 11 14:41:19 2003 From: mtang at snf.stanford.edu (Mary Tang) Date: Fri, 11 Jul 2003 14:41:19 -0700 Subject: Does anyone know how to combine layers in L-Edit? References: <3F0F19F6.90B59096@ieee.org> Message-ID: <3F0F2EFF.4D22D11@snf.stanford.edu> Funny you should say this. I happened to have just received the LEdit 10 disk and will load it into the PC's in the CAD room this afternoon. Mary ***** Mary X. Tang. Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 420 Via Palou Mall Stanford, CA 94305-4070 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu Yves-Alain Peter wrote: > You need to have either L-Edit 10 or the X-tools in order to do boolean > operations. > > Yves-Alain > > Ben Jian wrote: > > > Hi, > > > > I have tried several times to do boolean operation on mask layers to > > generate a new layer without success. If someone has successfully made it to > > work, please show me how to do it. Thanks a lot. > > > > Ben > > > > _________________________________________________________________ > > The new MSN 8: advanced junk mail protection and 2 months FREE* > > http://join.msn.com/?page=features/junkmail > > -- > ******************************************** > Yves-Alain Peter, PhD > Voie-Romaine 9 > CH-2036 Cormondr?che > Switzerland > phone: + 41 32 730 32 07 > mobile: + 41 79 748 46 32 > fax: + 1 801 912 5730 > email: yap at ieee.org > http://www.stanford.edu/~yapeter > ******************************************** From jjkotovsky at ucdavis.edu Fri Jul 11 16:45:16 2003 From: jjkotovsky at ucdavis.edu (Jack Kotovsky) Date: Fri, 11 Jul 2003 16:45:16 -0700 (PDT) Subject: Does anyone know how to combine layers in L-Edit? In-Reply-To: <3F0F2EFF.4D22D11@snf.stanford.edu> Message-ID: Hello All; I've successfully (and awkwardly) accomplished the boolean operations with LEdit pre version 10. It is not a very graceful feature of Ledit and I avoid it when possible. Draw your parts on 2 different layers. Go to Setup>Layers and then choose the resultant layer. Choose the Derivation tab, push Derived button and then set-up the boolean operation. To produce the derived layer, go to Tools>Generate layers and then choose what you want to do (ie if only 1 layer wanted, choose it as necessary). The bin size specifies the rough side-dimension of the multi sided polygon that is formed to reverse the image or add the image etc. Small bin sizes yield huge files. Start big and then work small as necessary. You'll find working with the derived layer is no fun...do it as late in your design as possible as you don't want to have to modify the derived layer, preferably its constituents. I'd suggest practicing on a dummy mask file first as this is rather cumbersome and takes fiddling. Buy hey, we are professional fiddlers. -On The Roof On Fri, 11 Jul 2003, Mary Tang wrote: > Funny you should say this. I happened to have just received the LEdit 10 disk and > will load it into the PC's in the CAD room this afternoon. > > Mary > > ***** > Mary X. Tang. Ph.D. > Stanford Nanofabrication Facility > CIS Room 136, Mail Code 4070 > 420 Via Palou Mall > Stanford, CA 94305-4070 > (650)723-9980 > mtang at stanford.edu > http://snf.stanford.edu > > Yves-Alain Peter wrote: > > > You need to have either L-Edit 10 or the X-tools in order to do boolean > > operations. > > > > Yves-Alain > > > > Ben Jian wrote: > > > > > Hi, > > > > > > I have tried several times to do boolean operation on mask layers to > > > generate a new layer without success. If someone has successfully made it to > > > work, please show me how to do it. Thanks a lot. > > > > > > Ben > > > > > > _________________________________________________________________ > > > The new MSN 8: advanced junk mail protection and 2 months FREE* > > > http://join.msn.com/?page=features/junkmail > > > > -- > > ******************************************** > > Yves-Alain Peter, PhD > > Voie-Romaine 9 > > CH-2036 Cormondr?che > > Switzerland > > phone: + 41 32 730 32 07 > > mobile: + 41 79 748 46 32 > > fax: + 1 801 912 5730 > > email: yap at ieee.org > > http://www.stanford.edu/~yapeter > > ******************************************** > Jack Kotovsky (H) (510) 655-2625 Knee Orthopedics Laboratory (W) (925) 424-3298 University of California Davis I went to a restaurant that serves "breakfast at any time." So I ordered French Toast during the Renaissance. From mtopinka at stanford.edu Sat Jul 12 15:06:04 2003 From: mtopinka at stanford.edu (Mark Topinka) Date: Sat, 12 Jul 2003 15:06:04 -0700 Subject: Pd In-Reply-To: <5.1.0.14.2.20030130120046.038be008@pop.lilliputiansystemsi nc.com> Message-ID: <5.2.0.9.0.20030712145833.022305c8@mtopinka.pobox.stanford.edu> Hi all- this is short notice I realize, but I would very grateful if anyone out there would be willing to lend me a palladium source for the Innotec for an evaporation tomorrow morning (Sunday @ 11). (Unless is there a public-use one near the Innotec that I am missing?) Thank you very much! -Mark Topinka From altug at stanford.edu Mon Jul 14 14:39:15 2003 From: altug at stanford.edu (Hatice Altug) Date: Mon, 14 Jul 2003 14:39:15 -0700 Subject: Anisotropic Si Etch References: Message-ID: <008301c34a50$5fd0e2b0$275540ab@cragganmore> Hi all, I want to do ~300nm depth anisotropic Si dry etch. Does any of you also doing this type etch on any dry etching system or can you guide me on this if you know a way? I will appreciate if you reply me! Thanks, -Hatice From rcrane at snf.stanford.edu Mon Jul 14 16:52:01 2003 From: rcrane at snf.stanford.edu (Dick Crane) Date: Mon, 14 Jul 2003 16:52:01 -0700 Subject: Thursday's power outage Message-ID: <3F134221.BE7C0AC@snf.stanford.edu> Aftermath.... or where did the power go and did the back-up systems work? On Thursday, July 10, at 3:22pm the 60kV, main university substation tripped off (faulted) due to an intermittent failure in a potential transformer. This trip affected the entire campus, including the cogen plant. The problem was isolated and power begin to be restored at 3:28pm with full campus restoration by 3:40pm. CIS and CISX buildings have emergency back-up generators which provide power for emergency lighting, fume exhaust, toxic gas monitoring, and other life-safety needs. When normal power is lost for more than a few seconds, the generators start automatically and transfer on-line within 30 seconds of the outage. Our generators performed well. The emergency lighting came on within 30 seconds. (Emergency lighting fixtures are identified by a small, red, "E" sticker on their reflector or housing.) Yes, we were in the dark for those 30 seconds while the generators spin up. This is normal. The toxic, flammable and corrosive gases all shut-down automatically and stayed off until they were manually reset. The system worked well. The lab fume exhaust systems are programmed to run at a minimum of one-half flow during loss of primary power. Due to a recent up-grade, the exhaust systems required a manual reset which delayed their turn-on by several minutes. This fault has been identified and was corrected and tested this morning. The litho area of the fab experience an odor around 5:00. The odor was from wafers in the singe oven. A small, heat and fume, exhaust system for three ovens in litho, failed to restart and was repair by the next morning. Thanks to everyone for helping to keep this outage as uneventful as possible. Dick Crane From shott at snf.stanford.edu Mon Jul 14 21:54:38 2003 From: shott at snf.stanford.edu (John Shott) Date: Mon, 14 Jul 2003 21:54:38 -0700 Subject: Network Problems ... causing Coral Problems. Message-ID: <3F13890E.58919EA8@snf.stanford.edu> SNF Lab Members: We experienced a severe network outage starting at about 5 p.m. this evening. The main fiber switch in the building appears to have failed. As a result, Coral was unable to enable and disable equipment, e-mail didn't work, etc. I've manually turned on most pieces of equipment. As luck would have it, it now appears that the network is back up ... however, according to Jason Conroy, it may go down later this evening to try to replace the ailing switch with a loaner. Accordingly, I would be cautious this evening ... if you disable something and then the network fails, it will not be able to be re-enabled. I'd appreciate it if you would all make a record of how long that you use each piece of equipment and send me e-mail with those details so that I can correct the database. This includes people who may have had equipment enabled at the time of the original network outage as you are still likely the "member of record" as far as the Coral database is concerned. While this condition is beyond SNF's control, I still apologize for the inconvenience that this may have caused. Thanks, John From shott at snf.stanford.edu Tue Jul 15 13:23:51 2003 From: shott at snf.stanford.edu (John Shott) Date: Tue, 15 Jul 2003 13:23:51 -0700 Subject: Another outage ... Message-ID: <3F1462D7.DB8E7B00@snf.stanford.edu> SNF Lab Members: This morning we experienced another "Coral outage" that was actually another network-related problem (but this time, localized to our machines ...). In any event, I believe that Coral should now be operational ... send me e-mail if you are still experience a problem and to correct any equipment use records. I apolgize for the inconvenience ... we are working hard to determine the underlying cause. Thanks, John From jerabek at snf.stanford.edu Wed Jul 16 08:42:27 2003 From: jerabek at snf.stanford.edu (Paul Jerabek) Date: Wed, 16 Jul 2003 08:42:27 -0700 (PDT) Subject: LRS-18 update Message-ID: To whom it may concern: Micronic field engineering is still working on a instalation of new exposure laser. They are short of field engineers due to Semicon and unexpected emergency at an other costumer site.The laser is installed and aligned.It just needs some fine tuning. A field engineer worked on our system late yesterday evening and hopefuly will be able to finish the job today. -Paul From takamura at stanford.edu Wed Jul 16 10:36:13 2003 From: takamura at stanford.edu (Yayoi Takamura) Date: Wed, 16 Jul 2003 10:36:13 -0700 Subject: Oral Examination Announcement - Yayoi Takamura Message-ID: <5.1.0.14.0.20030716101002.00a69400@takamura.pobox.stanford.edu> Special University Ph.D. Oral Examination Thermal Stability of Laser Annealed Dopants in Silicon Yayoi Takamura Department of Materials Science and Engineering Stanford University Friday, July 25th, 2003, 1:30pm Center for Integrated Systems Extension (CISX) Auditorium (Refreshments will be served at 1:15pm) Abstract Over the past 30 years, the semiconductor industry has grown at a tremendous rate, creating faster and cheaper integrated circuits with more functionality. Continued scaling, however, will face some major obstacles in the next several years. In the area of the doping technology, shallow and abrupt dopant profiles with supersaturated dopant concentrations will be required. These kinds of profiles can be obtained through non-equilibrium annealing techniques such as laser annealing, solid phase epitaxy, and molecular beam epitaxy. Unfortunately, these supersaturated dopant concentrations exist in a metastable state and deactivate upon any subsequent thermal processing. In this work, we investigate the thermal stability of supersaturated dopants created through laser annealing. We compare the deactivation behavior of the common dopants in silicon (As, B, P, and Sb) across a range of concentrations and thermal annealing conditions. A number of analysis techniques are used, including Hall effect measurements, secondary ion mass spectroscopy (SIMS), high-resolution x-ray diffraction (HR-XRD), grazing angle diffuse x-ray scattering and transmission electron microscopy (TEM). Through these analysis techniques, we have developed a picture of the fundamental deactivation mechanism for each dopant and determined the limits to both concentration and annealing conditions to maintain high electrical activation levels. Arsenic and phosphorus have been shown to be highly unstable against deactivation, with severe deactivation occurring at temperatures as low as 500?C. It is proposed that this instability arises due to the formation of small, coherent, inactive clusters of a few dopant atoms and a native vacancy. Upon annealing at higher temperatures during which diffusion occurs, these clusters evolve into precipitates. In contrast, Sb and B are promising n- and p-type candidates for supersaturated dopant concentrations due to their relative stability against deactivation. This stability is believed to exist because these dopants deactivate through the precipitate mechanism. Deactivation does not occur until the dopants are able to diffuse over large distances and agglomerate together into macroscopic precipitates. In the case of antimony, at concentrations above 1x1021 cm-3, the dopant becomes unstable against deactivation, and we see the formation of a new coherent, inactive cluster. With this understanding of the underlying deactivation mechanism for each dopant, ways of slowing down or even eliminating deactivation can be investigated. *********************************************************** Yayoi Takamura PhD Candidate - Materials Science and Engineering Stanford University CISX Building Room 300 Stanford, CA 94305 650-725-0418 ************************************************************ -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: Abstract-Takamura.pdf Type: application/pdf Size: 6587 bytes Desc: not available URL: From nanwu at stanford.edu Wed Jul 16 13:43:57 2003 From: nanwu at stanford.edu (nanwu at stanford.edu) Date: Wed, 16 Jul 2003 13:43:57 -0700 Subject: Can't make reservation for SEM Hitachi Model S-800 Message-ID: <1058388237.3f15b90dd6b2e@webmail.stanford.edu> Hi, Everyone!~ I can't make my 3 p.m. to 5 p.m. reservation for the SEM Hitachi today so it's open for anyone else to use. =) Have a nice day, Nancy =) From qtang at snowmass.stanford.edu Thu Jul 17 01:47:25 2003 From: qtang at snowmass.stanford.edu (Qiang Tang) Date: Thu, 17 Jul 2003 01:47:25 -0700 Subject: Ph.D. Defense Announcement References: <5.1.0.14.0.20030716101002.00a69400@takamura.pobox.stanford.edu> Message-ID: <002201c34c40$0d090a20$269c0c80@strongstrong> University Ph.D. Oral Examination TiSi2-Nucleated Si Nanowires by Molecular Beam Epitaxy and Preliminary in situ Devices Qiang Tang Department of Materials Science and Engineering Stanford University Thursday, July 24th, 2003, 2:00pm Center for Integrated System Auditorium (CIS-101X) (Refreshments will be served at 1:45pm) Abstract As devices in modern integrated circuits become smaller and smaller, the required sub-100nm feature sizes become difficult and expensive to produce. New nano-scale assembling technology, such as catalyzed nanowires growth and quantum dot growth, may benefit integrated-circuit production by eliminating critical lithography step. In these self-assembled systems, small features are formed using chemical reactions and/or crystal growth with limited or coarse lithography. Among the metals that have been used to catalyze Si nanowire growth, the diffusivity and solubility of Ti in silicon are at least two orders of magnitude lower than that of Au, Fe, Zn, Ni, or Co at the same temperature. Therefore, Ti-catalyzed silicon nanowire is more compatible with integrated-circuit components and applications. Using TiSi2 islands as a catalyst, we have grown Si nanowires in molecular-beam epitaxy (MBE) with Si2H6 as a gas source. Approximately one monolayer of Ti was deposited on Si substrates and then annealed at high temperature to form TiSi2 islands, which can nucleate Si nanowires in the subsequent growth, with diameters mainly between 20 nm and 40 nm. Utilizing reflection high-energy electron diffraction (RHEED), transmission electron microscope (TEM), and scanning electron microscope (SEM) observations, most TiSi2 islands are identified as C49-TiSi2 with the orientation: Si[110]//TiSi2[100] (about 6% lattice mismatch) and Si(001)//TiSi2(010). These islands are relaxed and they do not nucleate Si nanowires, possibly due to a highly defective interface with the Si substrate. The Si nanowires, nucleated by other differently oriented C49 TiSi2 islands, selectively grow up. Better lattice matching at their TiSi2/Si interfaces are generally observed for major crystallographic planes. Abrupt change of growth direction (kinking) frequently happens during growth, typically accompanied by twinning crystals. Strain at the TiSi2/Si interface is the main reason for the frequent twinning and kinking. As and B have been used to dope Si nanowires during growth. The in situ p-n junctions, both inside the Si nanowire and between the Si nanowire and the substrate, display diode I-V behavior. A tungsten layer has also been deposited as a gate between the top contact and substrate. The gated structures show reasonable modulation effect, which shows that the in situ surrounding gate field effect transistor made by Si nanowire is possible. -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: abstract.pdf Type: application/pdf Size: 55664 bytes Desc: not available URL: From lvan at anvil.nrl.navy.mil Thu Jul 17 12:22:37 2003 From: lvan at anvil.nrl.navy.mil (Luan V Van) Date: Thu, 17 Jul 2003 12:22:37 -0700 Subject: E-beam resist questions Message-ID: <5.1.1.6.0.20030717121434.02760910@anvil.nrl.navy.mil> Hi, Does anyone have experience with the Shipley DUV positive UV-5 and negative UVN30 resists? I'm trying to pattern 200nm lines and rings on a Raith150 e-beam tool at 25kV at the Naval Research Lab (I'm a former SNF member). I'm having problems with reproducibility of the feature size and resist profile. The room I'm coating the resist in has relatively high humidity (70 to 85%). Has anyone had a stable process with these resists? What is the process latitude of these resists? Is there a recipe that you recommend using? Any info you can give me regarding these resists or suggestions for other resists would be greatly appreciated. Thanks. Luan Luan Van Naval Research Laboratory Code 6340 Bld 3 4555 Overlook Ave S.W. Washington, DC 20375 lvan at anvil.nrl.navy.mil 202-767-1679 office 202-767-5496 lab(raith) From jerabek at snf.stanford.edu Thu Jul 17 11:22:29 2003 From: jerabek at snf.stanford.edu (Paul Jerabek) Date: Thu, 17 Jul 2003 11:22:29 -0700 (PDT) Subject: LRS-18 Message-ID: To whom it may concern: LRS-18 laser mask writer is back on line.Micronic field engineering replaced failed (due to last week power failure) exposure laser and aligned it.I have written several mask succesfuly and they all look great. -Paul From Jane.Edwards at stanford.edu Thu Jul 17 15:22:28 2003 From: Jane.Edwards at stanford.edu (Jane Edwards) Date: Thu, 17 Jul 2003 15:22:28 -0700 Subject: International Workshop on Metal Gate/Work Function Science and Engineering-Second Announcement Message-ID: Second Announcement ? Register by August 15, 2003 International Workshop on Metal Gate/Work Function Science and Engineering http://www.stanford.edu/dept/chemistry/faculty/chidsey/public/Workfuncti on_Engineering/index.html Stanford University, Stanford, CA (Braun Auditorium) August 28-29, 2003 ?As we come closer to the limit of scaled CMOS, metal gate electrodes and high-K gate dielectrics are indispensable alternatives to polysilicon/silicon dioxide gates, and a broad spectrum of technical and scientific challenges are facing us. We believe this workshop will provide an exciting opportunity and forum to discuss metal gate and workfunction issues, and we strongly invite your participation.? Conference Organizers: Yoshio Nishi, Stanford University Paul McIntyre, Stanford University Luigi Colombo, Texas Instruments Chris Chidsey, Stanford University Agenda Thursday, August 28 1. Introduction and Overview, Y. Nishi 2. Overview on CMOS Transistor Requirements (Gate Stack, Channel) a. ?Metal gate work function needs from device perspective?, Y. Taur, b. ?CMOS scaling limits with high K/metal gate?, H. Iwai c. ?Planar CMOS and alternative structures?, D. Antoniadis 3. Physics of Workfunctions a. ?Theory of workfunctions?, W. Harrison b. ?Spectroscopic determination of workfunctions?, P. Pianetta 4. Metal Gate Approaches for CMOS a. ?High-k metal gate overview?, T. Nabatame, MIRAI project b. ?Dual layer metal approach?, S. Hung c. ?Single layer metal approach?, T.J. King d. ?Metal gate CMOS integration challenges?, M. Rodder e. ?Metal gate electrodes?, V. Misra Friday, August 29 5. Metal Dielectric Interface Structure and Physics a. ?Multiscale interface modeling?, K.J. Cho b. ?Local electronic structure of high-k gate stacks?, J. Robertson c. ?Gate/dielectric interface reactions?, R. Wallace 6. Mobility, High-k, SiON, Metal Gates and Strained Si (Theory and Experiment) a. ?Integration issues: metal gates on high mobility substrates?, S. Biesemans b. ?Material aspects of high K gate integration?, S. Guha c. ?Ge channel MOSFETs?, C.-O. Chui 7. Electrodes and Contacts a. ?Schottky barrier engineering?, D. Connelly b. ?Channel engineering and metal gates?, K. Uchida c. ?Application and issues of silicides and metal integration?, K. Goto d. ?Metal contacts and electrodes?, (pending) Panel Discussion - to be held at 7:30pm on Aug.28 after dinner at the Stanford Faculty Club Moderator: Paul McIntyre Panel: Bin Yu, R. Wallace, K. Goto, D. Antoniadis, R. Gassar (tentative) Registration (due August 15) is available online at http://www.stanford.edu/dept/chemistry/faculty/chidsey/public/Workfuncti on_Engineering/index.html $300 (regular attendees ? waived for invited speakers) $60 (students) -------------- next part -------------- An HTML attachment was scrubbed... URL: From Jane.Edwards at stanford.edu Thu Jul 17 15:25:04 2003 From: Jane.Edwards at stanford.edu (Jane Edwards) Date: Thu, 17 Jul 2003 15:25:04 -0700 Subject: Nanoscience and Nanotechnology 2003 Message-ID: Dear fellow SNF labmembers: As one of the invited speakers, I would like to bring to your attention a program on Nanoscience and Nanotechnology being offered through the Stanford Center for Professional Development. The program announcement is attached below. I hope to see you there. Best regards, Yoshio Nishi ************************************************************************ *************- Stanford Engineering & Science Institute Nanoscience and Nanotechnology 2003 August 18-22, 2003 Stanford University Campus Explore the universe of nanotubes and bucky balls. Expand your vision of a changed world, from the quality of our goods to the quality of our lives. Join leading Stanford University faculty and industry experts for an intensive examination of micro-realm topics from nanoscience fundamentals to nanotechnology applications. Complete details on faculty, individual courses and registration information may be found on the program website: http://proed.stanford.edu/?nano or call 650-723-9041. Program Topics and Faculty * Bionanotechnology and Biochips Peter Wagner (Zyomyx) * Computational Nanotechnology: Multiscale Modeling of Nanomaterials Kyeongjae Cho (Mechanical Engineering) * From the Bottom Up: Atomic and Molecular Assembly Hari Manoharan (Physics, Electrical Engineering,Materials Science) * Introduction to DNA Microarray Technology Martin J. Goldberg (Affymetrix Laboratories) * Microelectronics to Nanoelectronics Yoshio Nishi (Electrical Engineering, Stanford Nanofabrication Facility) * Nanoelectronics: Electrons in Reduced Dimensions and Future Devices David Goldhaber-Gordon (Physics) * Novel Patterning Techniques for Nanotechnology R. Fabian W. Pease (Electrical Engineering) * Organic Semiconductors and Electronics Michael McGehee (Materials Science) * Scanning Probe Microscopes Calvin Quate (Electrical Engineering, Applied Physics) * The Current Status of Carbon Nanotube Science & Technology Hongjie Dai (Chemistry) Enroll Now! For faculty guests, the early registration discount (less $200 for the five-day program and $100 for individual days) has been extended through July 25. To take advantage of this special price, please call to register (650-723-9041). -------------- next part -------------- An HTML attachment was scrubbed... URL: From dilee at stanford.edu Fri Jul 18 12:34:47 2003 From: dilee at stanford.edu (Dong-Ick Lee) Date: Fri, 18 Jul 2003 12:34:47 -0700 Subject: Pyrometer vendor please! Message-ID: <004d01c34d63$a6c2c830$cdda81c6@dongick> Dear members I am looking for the vendor of the pyrometer (noncontact thermometer by detecting IR from the material) which covers the low temperature range (0~400oC). Does anyone have the experience to buy the pyrometer? If so, please give me the recommendation on it. I would appreciate it much. Thanks, ----------------------------------------- Dong-Ick Lee Stanford Synchrotron Radiation Laboratory 2575 Sand Hill Road, Menlo Park, CA 94025 Work: (650) 926-5126 Fax: (650) 926-4100 Cell: (650) 776-6467 Web: www.stanford.edu/people/dilee ----------------------------------------- -------------- next part -------------- An HTML attachment was scrubbed... URL: From aageraci at stanford.edu Fri Jul 18 13:39:03 2003 From: aageraci at stanford.edu (Andrew Albert Geraci) Date: Fri, 18 Jul 2003 13:39:03 -0700 (PDT) Subject: MOSFET processing Message-ID: Hi, Is anyone in fab currently in the middle of MOSFET processing who has unused wafers? Ideally we're looking for some MOSFETs that haven't had the gate applied yet to apply a layer of indium oxide to. Any help would be much appreciated! Best, Andy Geraci aageraci at stanford.edu From una at stanford.edu Mon Jul 21 09:29:29 2003 From: una at stanford.edu (Anuranjita Tewary) Date: Mon, 21 Jul 2003 09:29:29 -0700 Subject: =?iso-8859-1?Q?MIT=B7Stanford=B7UC_Berkeley_Nanotechnology_?= Forum This Thursday Message-ID: <5.2.1.1.2.20030721092840.00b2c7f0@una.pobox.stanford.edu> >Following on the success of our first two events, >The MIT?Stanford?UC Berkeley >Nanotechnology Forum Presents > >Nanotech Investment Panel >Learn Why Prominent VCs are Interested in Nanotechnology >Moderator: >Tom Baruch - Founder and General Partner of CMEA Ventures > >Distinguished panelists: >Jennifer Fonstad - Managing Director of Draper Fisher Jurvetson >Maximilian Schroeck - Managing Director of Agilent Ventures >Alex Wong - General Partner at Apax Partners > > >Time and Location: >Thursday, July 24th, 2003, 6-9 PM >Hors d'oeuvres and networking at 6, program starts at 7 >TCSEQ auditorium at Stanford University > >Registration: >For event registration, details, and directions, please go to >www.mitstanfordberkeleynano.org. >Due to great interest in the event, we suggest you to register online at >your earliest convenience. > >About the MIT?Stanford?UC Berkeley Nanotechnology Forum: >The MSB Nanotechnology Forum is dedicated to promoting the burgeoning >field of nanotechnology by connecting ideas, technology, and people. We >have created a credible forum that combines high standards of inquiry with >superior access to luminaries in the promotion of this emerging field. Our >previous events have featured Nobel Laureate Steven Chu, Paul Alivisatos, >Meyya Meyyappan, Stan Williams, Steve Jurvetson, Hans Coufal and Waqar >Qureshi. Each event has been attended by more than 500 people, including >prominent presence from Fortune 500 companies, investment, entrepreneur, >and academic communities. > >The MSB Nanotechnology Forum primarily serves the 40,000+ alumni of MIT, >Stanford and the University of California, Berkeley who reside in Northern >California. However, our events are open to anyone interested or active in >the field of nanotechnology. The MIT?Stanford?UC Berkeley Nanotechnology >Forum is associated with the MIT Club of Northern California, a nonprofit >organization. > >Event Sponsors: > >1681d7.jpg > >168235.jpg >168283.jpg -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: 1681d7.jpg Type: image/jpeg Size: 23421 bytes Desc: not available URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: 168235.jpg Type: image/jpeg Size: 10149 bytes Desc: not available URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: 168283.jpg Type: image/jpeg Size: 19422 bytes Desc: not available URL: From afreeman at cytoplex.com Tue Jul 22 11:08:07 2003 From: afreeman at cytoplex.com (Alex Freeman) Date: Tue, 22 Jul 2003 11:08:07 -0700 (PDT) Subject: low stress nitride material properties Message-ID: <20030722180807.84B9541E8@sitemail.everyone.net> An embedded and charset-unspecified text was scrubbed... Name: not available URL: From jules83 at stanford.edu Tue Jul 22 12:47:13 2003 From: jules83 at stanford.edu (Julia R Greer) Date: Tue, 22 Jul 2003 12:47:13 -0700 Subject: Annealing furnace? Message-ID: Hello, Does anyone know whether there is a furnace somewhere with N2 ambient where I can anneal my gold samples? Thank you! -Julia -------------- next part -------------- A non-text attachment was scrubbed... Name: winmail.dat Type: application/ms-tnef Size: 3016 bytes Desc: not available URL: From mtang at snf.stanford.edu Tue Jul 22 16:45:42 2003 From: mtang at snf.stanford.edu (Mary Tang) Date: Tue, 22 Jul 2003 16:45:42 -0700 Subject: CAD PC's Message-ID: <3F1DCCA6.C25A90F6@snf.stanford.edu> Labmembers -- I've got good news and bad... The good news is that both PC's in the CAD room now have LEdit 10.0. They also have USB ports for saving data onto your favorite media. The bad news, I'm so terribly sad and ashamed to say, is that the data on Oook (the one nearest the door) data is inaccessible, at least right now. There is another PC (Gaspode) there now. Because, for various reasons, it was turning out to be difficult to back the old Oook drive up, I tried simply taking it out of Oook and placing it into Gaspode. Now, the old Oook drive won't spin up. I've been given a few suggestions as to how to troubleshoot this (apparently, not uncommon in an old drive), and if anyone else has (constructive) suggestions about how to access a 1995 vintage SCSI drive, I'd be glad to hear and try them. My humble apologies to those of you who have data on this drive. I ask for your understanding and patience -- Mary -- Mary X. Tang, Ph.D. National Nanofabrication Users' Network Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From mtang at snf.stanford.edu Wed Jul 23 14:05:06 2003 From: mtang at snf.stanford.edu (Mary Tang) Date: Wed, 23 Jul 2003 14:05:06 -0700 Subject: CAD PC - Oook! Message-ID: <3F1EF882.852C4DF2@snf.stanford.edu> Good news -- If you had CAD data on Oook (the CAD PC nearest the CAD room entrance), we got the hard drive to drive (I found an identical vintage model and swapped boards.) The files that were once on the Oook drive are now on the Gaspode system. Thanks for all your suggestions! Mary -- Mary X. Tang, Ph.D. National Nanofabrication Users' Network Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From scaccag at stanford.edu Thu Jul 24 16:28:16 2003 From: scaccag at stanford.edu (Luigi Scaccabarozzi) Date: Thu, 24 Jul 2003 16:28:16 -0700 (PDT) Subject: Nickel stress Message-ID: Hi all, does anybody has any experience/information about stress in thin Nickel films deposited with Innotec? I'm interested to know in particular if the stress is compressive or tensile, and the magnitude of the stress. I have 20 nm of Nickel on top of GaAs/AlGaAs and I have to get rid of it. I was thinking to use the top thin layer of GaAs (10 nm) as sacrificial layer, to liftoff the Ni, but it seems not to work very well and may need and intermediate layer. Any info will be appreciated. Thanks Gigi From michael.bell at stanford.edu Fri Jul 25 11:09:58 2003 From: michael.bell at stanford.edu (Michael Bell) Date: Fri, 25 Jul 2003 11:09:58 -0700 Subject: Brief coral outage scheduled for today at noon Message-ID: <000601c352d7$f5c34fd0$ab00a8c0@reef> Lab members, The network in the lab will go down for about 10 minutes at noon today for some minor configuration changes to the network switches. We apologize for any inconvenience this may cause. Regards, Mike Bell -------------- next part -------------- An HTML attachment was scrubbed... URL: From curlwang at stanford.edu Fri Jul 25 19:08:39 2003 From: curlwang at stanford.edu (Ke Wang) Date: Fri, 25 Jul 2003 19:08:39 -0700 (PDT) Subject: soldering on Pt Message-ID: Dear lab people, I have some Pt contacts (thin layers of Pt, ~1000A) on a glass wafer, and I wish to solder wires onto it. I was using common solder wires (Sn), but it didn't wet at all. I also tried soldering on hotplate (~100C), which didn't help either. I'm wondering if anybody has had experience soldering on Pt, and is willing to share with me. Special solder wires? Higher temperature? Maybe I should go to a jewler? Thanks, Ke _____________________________________________ Ke Wang PHD Candidate Department of Applied Physics, Stanford University CISX B113-14 Stanford, CA 94305-4070 Phone: (650)723-8040 From shott at snf.stanford.edu Sat Jul 26 11:24:59 2003 From: shott at snf.stanford.edu (John Shott) Date: Sat, 26 Jul 2003 11:24:59 -0700 Subject: MicroManipulator Probe Station is Operational ... Message-ID: <3F22C77B.7080900@snf.stanford.edu> SNF Lab Members: The MicroManipulator Probe Station is operational. I've posted a set of comments about what was prepared and some suggestions for proper use near the probe station. Happy probing, John From curlwang at stanford.edu Fri Jul 25 13:50:29 2003 From: curlwang at stanford.edu (Ke Wang) Date: Fri, 25 Jul 2003 13:50:29 -0700 (PDT) Subject: soldering on Pt Message-ID: Dear lab people, I have some Pt contacts (thin layers of Pt, ~1000A) on a glass wafer, and I wish to solder wires onto it. I was using common solder wires (Sn), but it didn't wet at all. I also tried soldering on hotplate (~100C), which didn't help either. I'm wondering if anybody has had experience soldering on Pt, and is willing to share with me. Special solder wires? Higher temperature? Maybe I should go to a jewler? Thanks, Ke _____________________________________________ Ke Wang PHD Candidate Department of Applied Physics, Stanford University CISX B113-14 Stanford, CA 94305-4070 Phone: (650)723-8040 From acremann at SLAC.Stanford.EDU Tue Jul 29 16:07:00 2003 From: acremann at SLAC.Stanford.EDU (Yves Acremann) Date: Tue, 29 Jul 2003 16:07:00 -0700 Subject: frontside protection during KOH backside etch Message-ID: <3F26FE14.F9FD2C49@ssrl.slac.stanford.edu> Hi I am looking around for a possibility to protect the frontside of my samples (which are pieces, not full wafers) for etching the backside with KOH. As we can not heat the sample to higher temperatures, I need to use some organic material as a protection layer. I was told that black wax can be used for that purpose, but it seams to be difficult to clean the wafer after that. Dies anyone have experience with black wax or other similar chemicals? Where can I get that stuff? Thanks Yves From lsmoore at stanford.edu Tue Jul 29 17:08:17 2003 From: lsmoore at stanford.edu (Lindsay Moore) Date: Tue, 29 Jul 2003 17:08:17 -0700 Subject: shipley 3612 processes Message-ID: <5.1.1.5.2.20030729170222.0355d6f0@lsmoore.pobox.stanford.edu> Has anyone used shipley 3612 and then made ohmic contact to a 2DEG or 2DHG? Also, is this resist compatable with piranha etch? thanks! Lindsay From rgrow at stanford.edu Thu Jul 31 00:15:50 2003 From: rgrow at stanford.edu (Randal James Grow) Date: Thu, 31 Jul 2003 00:15:50 -0700 (PDT) Subject: lost wafer Message-ID: Dear Labmembers, Sorry to pester you with extra email, but I'm looking for a lost wafer. It was in the ebeam passthrough in a single-wafer box labeled with the names Randy and Qian. I'm not sure if there was a date. It was coated with oxide and nitride and etched from the backside to make large (1 mm) nitride membranes. It had been broken up into probably three irregular pieces. I first put it in there in February, and the last time I saw it was probably May. If anyone remembers moving it somewhere to make room in the passthrough, please let me know. This is an important and useful wafer, though the irregular breakage may have made it look less so. Also, if you threw it away or something, please tell me that. I might be annoyed, but I'd rather know not to bother looking for it anymore. Thanks, Randy