Special Seminar: IBM High Speed Circuits

Ann Guerra guerra at par.stanford.edu
Tue Mar 9 16:30:07 PST 2004


		  SPECIAL SEMINAR

"High Speed Circuits in SiGe and CMOS:  From mm-wave to Backplane"

			IBM

Dr. Scott K Reynolds (Research Staff Member, PhD, Stanford University)
Dr. Mehmet Soyuer (Senior Manager, Research Staff Member, PhD, UC
			Berkeley)

		Monday, March 15, 2004
		   10:00-11:30 a.m.
			CIS-101
		  Stanford University


		        ABSTRACT

Advances in high speed circuit design, execution, and underlying
technology will be critical to meeting the communications requirements of
future wireless,  wired data communication, and backplane applications. In
the wireless arena, the recent development of advanced SiGe transistors
with fT and fmax values exceeding 200 GHz may enable low cost
implementation of very high data rate wireless communications systems
operating in the 60 GHz band, as well as low cost automotive radar systems
operating in the 77 GHz band.  At lower frequencies, such as in 2.4 or 5
GHz bands, CMOS as well as SiGe are vying for market share while meeting
stringent cellular and WLAN system requirements. For future wired data
communications systems, techniques enabling the achievement of higher data
rates will be of extreme importance.  Finally, in the backplane
environment, advanced digital CMOS technology must be applied to
increasingly challenging analog problems to achieve ever-higher data rates
while meeting strict power budgets.  In this talk, high speed circuit
design work in the Communication Technology department of IBM Research
will be described, focusing on  four main areas, namely, mm-wave wireless,
 comparison of W-CDMA RFIC designs in CMOS and SiGe, ultra-high speed
serial data communication, and backplane I/O.  In each area, the key
high-level design goals and challenges will be presented, followed by
presentation of circuit design and hardware results for critical
sub-blocks.





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