From mtang at snf.stanford.edu Mon Aug 1 13:42:40 2005 From: mtang at snf.stanford.edu (Mary Tang) Date: Mon, 01 Aug 2005 13:42:40 -0700 Subject: UC Berkeley Microlab Message-ID: <6.2.1.2.2.20050801133620.03d298d8@rissman.pobox.stanford.edu> Hi All, This is a reminder that we are planning to shutdown the furnace area for 1-2 weeks starting Monday, 8/15. Mary has arranged for backup support from Berkeley as per the attached memo. Mary should be back on Monday 8/8 and you can see/e-mail her to get more information. Paul Rissman ******************** Dear labmembers ? As you know, the planned furnace upgrade will result in loss of some furnace processing capability starting on August 15th. The UC Berkeley Microlab has kindly agreed to provide limited processing support for our labmembers. The ETR process modules are, as follows: LSN (1-24 wfrs) $1,521.50 LPCVDNIT1u (1-24 wfrs) 522.43 LPCVDNIT2u (1-24 wfrs) 741.88 LTO1/PSG2u (1-12 wfrs) 522.43 LTO2/PSG4u (1-12) 741.88 DPOLY/UPOLY1u (1-24) 522.43 DPOLY/UPOLY2u (1-24) 741.88 For industrial members, please add 50% overhead to these charges. If you would like to take advantage of these and related furnace services, please contact Mary Tang. -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From junxian at stanford.edu Tue Aug 2 11:36:57 2005 From: junxian at stanford.edu (Junxian Fu) Date: Tue, 02 Aug 2005 11:36:57 -0700 Subject: University PhD Dissertation Defense/ Junxtian Fu In-Reply-To: <6.2.1.2.2.20050801133620.03d298d8@rissman.pobox.stanford.e du> References: <6.2.1.2.2.20050801133620.03d298d8@rissman.pobox.stanford.edu> Message-ID: <6.1.2.0.2.20050802113452.01da1210@junxian.pobox.stanford.edu> Department of Applied Physics University Ph.D. Dissertation Defense Jun-Xian Fu Advisor: Prof. James S Harris, Jr. Title: Near-infrared Coherent Photo-detection with Indium Gallium Arsenide Based Optoelectronic Devices Monday, August 8, 2005, at 1:30 in CISX Auditorium Abstract Over the extremely broad electromagnetic spectrum, the near-infrared region (0.7-3um) is of great interests to physicists, chemists and biologists. Coherent photo-detection in the near-infrared as well as visible and other wavelengths is extremely useful in identifying coherent light sources from the noisy background and has great potential to be applied to single-molecule detection by surface-enhanced coherent anti-Stokes Raman scattering. Indium gallium arsenide (InGaAs) based optoelectronic devices have been extensively investigated in the fields of optical communication, night vision, environmental monitoring, gas detection and bio-sensing. The operating wavelength range for InGaAs extends from 800nm for gallium-rich material to 3um for indium-rich material. A range of InGaAs alloys with bandgap energies in the near infrared wavelength range were investigated by molecular beam epitaxy (MBE). This included strain-free standard In0.532Ga0.468As and In0.532Ga0.468AsNxSby lattice-matched to InP substrates, highly strained pseudomorphic InxGa1-xAs/InyGa1-yAs quantum structures and relaxed metamorphic thick Inx>0.8Ga1-xAs layers with cyclic arsenic-assisted in-situ annealed step-graded InAlAs buffer layers on GaAs and InP substrates. An InP/InAlAs/InGaAs heterojunction bipolar phototransistor (HPT) was designed, simulated and fabricated. The electrical and optical properties of the HPT were characterized. A compact standing-wave Fourier-transform interferometer system capable of coherent detection in the near-infrared region was demonstrated. The system only included a PZT-controlled scanning gold-coated mirror and a partial-transparent (3.8% single-path loss) InP/InAlAs/InGaAs HPT. The system demonstrated wide wavelength coverage of 1300-1580nm using a tunable laser and three other laser diodes combined by a 3dB fiber combiner. A new technique of identifying light sources using harmonic Fourier spectra was developed. The resolution of the demonstrated interferometer, which is not limited by the free scan range of the PZT-controlled mirror, is 37.5cm-1 for a mirror-scan range of 32um and could reach 1cm-1 with improved system design and elements selection. From izuleta at stanford.edu Wed Aug 3 11:29:01 2005 From: izuleta at stanford.edu (Ignacio A. Zuleta) Date: Wed, 3 Aug 2005 11:29:01 -0700 Subject: electronic shop here on campus? Message-ID: <200508031829.j73IT2K7007944@smtp3.Stanford.EDU> Dear Labmembers, Does anyone know if there is any reliable staffed electronics shop (similar to the various on-campus machine shops in type of operation) we can get help from here on campus? I need someone to build some transformers for my project. Any help would be appreciated. -ignacio Ignacio A. Zuleta ------------------------------------------ PhD Candidate, Zare Group Chemistry Department Stanford University 333 Campus Drive Rm17B Stanford, CA 94305 ------------------------------------------- Office: (650) 723-4398/4332 Cell: (650) 799-9225 Fax: (650) 725-0259 ------------------------------------------- -------------- next part -------------- An HTML attachment was scrubbed... URL: From jwc at snf.stanford.edu Wed Aug 3 13:53:07 2005 From: jwc at snf.stanford.edu (James Conway) Date: Wed, 03 Aug 2005 13:53:07 -0700 Subject: SOI wafers needed and query of labmembers who may be seeking same. Message-ID: <42F12EB3.2030106@snf.stanford.edu> Greetings: On behalf of several lab members working in the Ebeam Lab we are seeking some SOI wafers to aid in their research here at SNF. If you have quality SOI wafers, or slices, that you have archived and will no longer be needing please reply to this message. Please let us know what Si thickness and BOX layer thickness(es) you may have on hand. These users combined only need 2 - 6 wafers, and most are interested in working on 2 X 2 cm sq. pieces, but we are finding the minimum order from SOITec to be 10 - 12 for the wafer type they desire. We are currently obtaining quotations for these wafers. Estimates for cost are $340 - 380.00 US. Conversely if you are also seeking, or will be doing work on, SOI wafers in the near term future -- please reply to this message as well. Please let us know the optimal Silicon and Buried Oxide Layer thickness you desire. If there is enough interest we might be able to combine our orders and obtain a supply sufficient for all of our needs through the end of the year. Q: Do you think SOI wafers of some nominal standard type should be stocked and inventoried in the SNF Lab Stockroom? Thank you for the favor of your reply to: beamtools at snf.stanford.edu and of course CC to: jwc at snf.stanford.edu Thank you, James Conway Ebeam Technology Group SNF From xiangli at stanford.edu Wed Aug 3 14:30:33 2005 From: xiangli at stanford.edu (Xiang Li) Date: Wed, 3 Aug 2005 14:30:33 -0700 Subject: Missing Notebook at Wb-general area In-Reply-To: <42F12EB3.2030106@snf.stanford.edu> References: <42F12EB3.2030106@snf.stanford.edu> Message-ID: <1123104633.42f1377924f7f@webmail> Dear labmembers, Someone removed my notebook from the desk near the wb-general recently. Please contact me by email at xiangli at stanford.edu or phone at 650-387-5837 if you find a notebook with my name: Xiang Li and my phone # on the top of the cover. Thank you! Xiang Li From goldhab at stanford.edu Wed Aug 3 17:34:26 2005 From: goldhab at stanford.edu (David Goldhaber-Gordon) Date: Wed, 3 Aug 2005 17:34:26 -0700 Subject: Career Opportunity: Associate Director of Stanford Nano Center Message-ID: <1123115666.42f16292befc0@webmail.stanford.edu> Dear colleagues, As the Deputy Director of Stanford's new Center for Probing the Nanoscale, an NSF-funded Nanoscale Science and Engineering Center (NSEC), I would like to bring to your attention an opening for Associate Director of our Center. We are seeking a full-time Associate Director for the new Center for Probing the Nanoscale (CPN), an NSF-funded Nanoscale Science and Engineering Center (NSEC). The Associate Director will design, direct, and evaluate CPN's educational and industrial programs and partnerships; manage the day-to-day educational and outreach activities of the Center; monitor scientific operations; and work with Center PIs on stewardship of the core grant and on seeking new funding opportunities. The Associate Director will be one of two full-time staff members and, along with the Program Administrator/Financial Analyst, will be responsible for monitoring operations and will report to the Director. The successful candidate will be able to explain concepts in physical science to both nonexperts and experts, and will have, or be interested in acquiring, knowledge of nanoscale science and technology. A PhD in a science or engineering field is highly desired, but exceptional candidates with a Master's or Bachelor's will be considered. The successful candidate will help to set the directions and priorities of the Center. The position requires demonstrated outstanding communication and organizational skills; the ability to set priorities and enact them in a fluid and fast-paced environment; and, above all, a passion to facilitate learning and share the joy of science and technology. To apply, please go to the Stanford Careers website, http://jobs.stanford.edu, and search for position # 008432, where you can find a somewhat more detailed description of the Associate Director position (this should be up by Wednesday evening, August 3). You will be asked to submit a CV and cover letter. In your letter, please indicate how you heard about this position. If you have questions, please contact Laraine Lietz-Lucas, Program Administrator of CPN, at lietz at stanford.edu. We will begin screening applications August 15th, and will continue until we have filled the position. While we are eager to get an Associate Director in place soon, we are even more keen to find an outstanding partner to work with for years to come. Best wishes, David ---------------------------------------------------------------------------- David Goldhaber-Gordon goldhaber-gordon at stanford.edu Assistant Professor of Physics davidg at post.harvard.edu Stanford University (permanent forwarding) www.goldhaber-gordon.com (650) 725-2047 (lab) (650) 724-3709 (office) Address for letters or packages: Administrative Associate: David Goldhaber-Gordon Roberta Edwards Geballe Laboratory for Advanced Materials McCullough, Rm. 338 McCullough Building, Room 346 Phone: (650) 723-8028 476 Lomita Mall Fax: (650) 724-3681 Stanford, CA 94305-4045 email: redward at stanford.edu From peichen at stanford.edu Fri Aug 5 12:01:10 2005 From: peichen at stanford.edu (Pei-Chen Su) Date: Fri, 5 Aug 2005 12:01:10 -0700 Subject: low stress Poly Si deposition In-Reply-To: Message-ID: Dear friends, I'm interested in growing a low stress poly silicon with a few micros of thickness. They will be grown on a low stress Nitride on a clean wafer. Since there is not a specific low stress recipe for our tylanpoly, I'm wondering if any of you have the experience of growing the low-stress poly and would be willing provide me some info or suggestion. And if you have some stress info to the thin film made with existing recipe, I would also be very happy to learn. Thanks you and I appreciate you help! Best regards, Pei-Chen From amf at amfitzgerald.com Sun Aug 7 16:42:06 2005 From: amf at amfitzgerald.com (Alissa M. Fitzgerald) Date: Sun, 7 Aug 2005 16:42:06 -0700 Subject: Next SNF User's Meeting: Tuesday Aug. 16th, 4-5pm, CIS X Aud Message-ID: <20050807234209.47103642D6@mailgate3.dslextreme.com> Greetings Labmembers, There will be a SNF user's meeting on Tuesday Aug. 16th, 4-5pm, CIS X Auditorium. All are welcome to attend. **Please make an effort to be on time.** It is hard to hold a discussion when everyone walks in 15 mins. late. The meeting will end promptly at 5pm. Since our last meeting, Paul Rissman has posted some lab usage metrics on his office door. I encourage you to take a look and bring your feedback and comments to the meeting. Agenda (suggestions are welcome, please email me) - Furnace second sourcing options during Aug 15-30th shutdown - Review of lab usage metrics - Need input for next SNF Advisory Committee meeting (I will be attending on behalf of industrial users) - Problems/concerns/suggestions Hope to see you there! Regards, Alissa Fitzgerald Alissa M. Fitzgerald, Ph.D. A.M. Fitzgerald & Associates, LLC Technical Consulting Services MEMS | Materials | Sensor Systems 655 Skyway Suite 118 San Carlos, CA 94070 (650) 592-6100 tel/fax www.amfitzgerald.com -------------- next part -------------- An HTML attachment was scrubbed... URL: From jrgold at stanford.edu Mon Aug 8 10:37:10 2005 From: jrgold at stanford.edu (Jonathan Goldman) Date: Mon, 08 Aug 2005 10:37:10 -0700 Subject: PhD Defense Announcement - Jonathan Goldman, Tuesday, August 9th, 9:30 am Message-ID: <6.2.0.14.2.20050808103235.01d8e0b8@jrgold.pobox.stanford.edu> Title: Nuclear Spin Detection and Optical Pumping in Semiconductor Quantum Dots PhD Candidate: Jonathan Goldman Advisor: Prof. Yoshihisa Yamamoto Location: CISX-101 (Auditorium) Date/Time: 9:30am on Tuesday August 9th, 2005 (coffee and snacks served at 9am) Abstract: ----------- Quantum memory devices and scalable quantum computers are important objectives of current research efforts. Quantum computers promise to solve certain problems which are intractable on classical computers and may provide insight into unanswered questions in computational theory. Quantum memory would provide coherent storage of a `qubit' and could be used in conjunction with a quantum computer or in a quantum communication system. Both systems require a way of preparing qubits in a known state, a mechanism for measuring their states and addressing capability. Nuclear spins within a solid-state system have been proposed as one means for realizing a quantum computer. The preparation of nuclear spins in a known state and qubit readout remain a formidable challenge. Quantum dots provide a means of polarizing and measuring nuclear spins. We have observed the energy level shifts due to the nuclear spins in InAs quantum dots and we have measured the timescale for nuclear polarization to develop. Quantum dots are nano-scale regions of a small band-gap semiconductor embedded in a larger band-gap semiconductor which can trap a single electron-hole pair or exciton. The energy levels for the exciton are quantized and are affected by many parameters including hyperfine interactions with the nuclei from the lattice. There are between 10^4 and 10^5 nuclei within the dot and it is possible through optical pumping to align the nuclear spins in one direction. We can also use the interaction of the nuclear spins with the exciton to determine the average nuclear spin direction. Future work in this area may ultimately lead to useful applications for nuclear spins in the area of quantum information processing devices. -------------- next part -------------- An HTML attachment was scrubbed... URL: From mahnaz at snf.stanford.edu Mon Aug 8 13:37:56 2005 From: mahnaz at snf.stanford.edu (Mahnaz Mansourpour) Date: Mon, 08 Aug 2005 13:37:56 -0700 Subject: Yes oven Message-ID: <42F7C2A4.4020400@snf.stanford.edu> Hello all, YES oven is in a desperate need of a annual PM and we think we can not wait till December shut down. So Mario will initiate the pm on Thursday 8/11 at 11 am and the process will finish by Friday 8/12 around 11 am. Please plan accordingly. Secondly you can yes oven your wafers and keep them 3 days before the resist spin. We will repeat the Pm again during the Christmas shutdown. Sorry if this may cause any inconvenience for you but it needs to be done. mahnaz From zhangy at stanford.edu Mon Aug 8 21:14:37 2005 From: zhangy at stanford.edu (Yuan Zhang) Date: Mon, 8 Aug 2005 21:14:37 -0700 Subject: TiN dry etching Message-ID: <1123560877.42f82dadd203f@webmail.stanford.edu> Hi all, Does anybody have experience of TiN dry etch? I wonder which etching tool gives best result. Thank you for the attention. I really appreciate your help. Best, Yuan Yuan Zhang EE department From zhangy at stanford.edu Mon Aug 8 21:37:27 2005 From: zhangy at stanford.edu (Yuan Zhang) Date: Mon, 8 Aug 2005 21:37:27 -0700 Subject: TiN dry etching Message-ID: <1123562247.42f83307a12da@webmail.stanford.edu> Dear labmembers, I wonder if anybody has experience working on TiN dry etching? I need to dry etch the TiN using gold contaminated tool. Does anyone have any suggestions? Thanks for your attention. I really appreciate your help. Best, Yuan Yuan Zhang EE department From mdeal at stanford.edu Tue Aug 9 08:21:17 2005 From: mdeal at stanford.edu (Michael Deal) Date: Tue, 09 Aug 2005 08:21:17 -0700 Subject: NNIN REU convocation poster session Message-ID: <6.1.1.1.2.20050809080624.01e11bf0@mdeal.pobox.stanford.edu> This week SNF is hosting the annual convocation of the NNIN Research Experience for Undergraduates (REU) program. In the NNIN REU program, undergraduates from all across the country spend their summer working with graduate mentors and their groups on a nanosciene project at one of the 12 NNIN university sites. This year 12 REU students worked at SNF, coming from mostly small colleges and universities from across the country. At the convocation, all 80 NNIN REU students meet at one site (SNF this year) and present their work to each other. I would like to invite you to attend a poster session in which the NNIN REU students will post the figures from their presentations given earlier in the week and can discuss their work with you. The poster session will be held from 2:30 to 4pm on Friday, August 12. Note the location: 2nd floor hallway of CISX (the only place close by that we could get them all in one place.) Pizza will be served. So please drop by - the students are eager to show off their accomplishments and newly gained knowledge in nanotechnology. Information regarding the convocation can be obtained at: http://snf.stanford.edu/Access/RemoteUsers/reu.html There is limited seating for the convocation itself, but you can watch it live on the web: Live webcasting of the convocation: http://scpd.stanford.edu/scpd/courses/ProEd/nninreu_live.htm Again, we encourage you to attend the poster session. -Mike Deal, SNF -------------- next part -------------- An HTML attachment was scrubbed... URL: From shiwei20012002 at yahoo.com Tue Aug 9 09:06:20 2005 From: shiwei20012002 at yahoo.com (Wei Shi) Date: Tue, 9 Aug 2005 09:06:20 -0700 (PDT) Subject: selective etching Message-ID: <20050809160620.52677.qmail@web33306.mail.mud.yahoo.com> Hi, On the top of Al, there is a thin layer of silicon nitride (or silicon oxide). I want to etch off this insulation layer without any touch of Al. Wet etch is a little prefered. Does any buddy has this experience? Thanks in advance, Wei Shi Thanks, Wei __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com -------------- next part -------------- An HTML attachment was scrubbed... URL: From mahnaz at snf.stanford.edu Tue Aug 9 10:11:05 2005 From: mahnaz at snf.stanford.edu (Mahnaz Mansourpour) Date: Tue, 09 Aug 2005 10:11:05 -0700 Subject: [Fwd: Yes oven] Message-ID: <42F8E3A9.4090001@snf.stanford.edu> Hello all Due to few request from some labmembers who are trying to get as much work out of the lab this week as possible, we have changed the date on the YES oven pm. The new date to shut down YES oven will be Wednesday 17th at 8 am to Thursday 18th till 11 am. Please make a note of the new changes. mahnaz -------- Original Message -------- Subject: Yes oven Date: Mon, 08 Aug 2005 13:37:56 -0700 From: Mahnaz Mansourpour Organization: SNF To: Lab Hello all, YES oven is in a desperate need of a annual PM and we think we can not wait till December shut down. So Mario will initiate the pm on Thursday 8/11 at 11 am and the process will finish by Friday 8/12 around 11 am. Please plan accordingly. Secondly you can yes oven your wafers and keep them 3 days before the resist spin. We will repeat the Pm again during the Christmas shutdown. Sorry if this may cause any inconvenience for you but it needs to be done. mahnaz -------------- next part -------------- An HTML attachment was scrubbed... URL: From jerabek at snf.stanford.edu Tue Aug 9 13:29:59 2005 From: jerabek at snf.stanford.edu (Paul Jerabek) Date: Tue, 9 Aug 2005 13:29:59 -0700 (PDT) Subject: mask writer Message-ID: To whom it may concern, Micronic mask writer is down with laser interferometer problem. Micronic field service has been notified. -Paul From tparco2002 at yahoo.com Tue Aug 9 14:24:31 2005 From: tparco2002 at yahoo.com (Tony Parco) Date: Tue, 9 Aug 2005 14:24:31 -0700 (PDT) Subject: innotec available Message-ID: <20050809212432.6536.qmail@web52309.mail.yahoo.com> Hi, Sorry for the late notice, my samples are not ready from the vendor. The innotec is available between 9am - 1pm Wed. Aug. 10, 2005. Parco __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com From rcrane at snf.stanford.edu Tue Aug 9 14:31:32 2005 From: rcrane at snf.stanford.edu (Dick Crane) Date: Tue, 09 Aug 2005 14:31:32 -0700 Subject: Building evacuation report Message-ID: <42F920B4.20702@snf.stanford.edu> CIS, CISX and SNF fab dwellers, We had an evacuation (fire) alarm this morning around 1045. The alarm was false and caused by a water pressure surge which affected the western side of campus. The fire system monitor, upon seeing a pressure drop, correctly triggered the building wide alarm. Several buildings in our area suffered similar alarms. Campus Utilities Group is looking into the cause of the surge. The evacuation went well. Thank you for your cooperation. Sorry for the inconvenience, Dick Crane From mtang at snf.stanford.edu Wed Aug 10 11:36:15 2005 From: mtang at snf.stanford.edu (Mary Tang) Date: Wed, 10 Aug 2005 11:36:15 -0700 Subject: Process Backups during SNF Furnace Shutdown Message-ID: <42FA491F.6020908@snf.stanford.edu> Greetings labmembers -- As you know, the furnace shutdown is almost upon us (scheduled for 8/15-8/25 -- details in Dick's note of 7/5 at: http://snf.stanford.edu/cgi-bin/ezmlm-cgi?mss:1888:200507:oaipihhejecfefkiihod ) In case you are in need of furnace processing during this time, we've arranged for the UC Berkeley Microlab to provide processing services for the films/process listed below. All you need to do is to provide your Coral login and indicate: the number of wafers, their size, the type of film, thickness, and doping (if applicable.) Indicate whether your work is MOS clean or not. If you would like more detailed process info, you can check out the UCB Microlab website or contact Sia Parsa at parsa at eecs.berkeley.edu. Just drop your wafers off with one of the process staff members (include the appropriate info) and we'll FedEx to UCB with the proper paperwork. The UCB Microlab staff will do the processing. Your account will be charged accordingly (sorry, UCB's processing services do not fall under the SNF cap... By the way, please also note that industrial members are charged an additional overhead of 50%, above the prices listed below.) ETR module prices: LSN (1-24 wfrs) $1,521.50 LPCVDNIT1u (1-24 wfrs) 522.43 LPCVDNIT2u (1-24 wfrs) 741.88 LTO1/PSG2u (1-12 wfrs) 522.43 LTO2/PSG4u (1-12) 741.88 DPOLY/UPOLY1u (1-24) 522.43 DPOLY/UPOLY2u (1-24) 741.88 Please bear with us as the furnace upgrade/installation progresses. Any questions, please don't hesitate to get in touch. Thanks for your attention! Mary -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From rcandler at stanford.edu Wed Aug 10 19:31:08 2005 From: rcandler at stanford.edu (Rob Candler) Date: Wed, 10 Aug 2005 19:31:08 -0700 (PDT) Subject: Rob N Candler Orals Message-ID: Ph.D. Oral Examination, Stanford University Thermoelastic Dissipation in Silicon Micromechanical Resonators Rob N. Candler Advisor: Thomas W. Kenny Department of Electrical Engineering Time: 3:00 P.M. (refreshments will be served at 2:45 P.M.) Date: Tuesday, August 16, 2005 Location: Building 530, Room 127 Abstract Silicon micromechanical resonators have the potential to replace quartz crystal oscillators in many frequency reference applications. Quality factor, Q, is a measure of how resonators lose energy, and it impacts the equivalent electrical resistance for the mechanical resonator, which is important for designing oscillator circuits with these resonators. However, the different ways that resonators can lose energy (e.g. air damping, substrate loss, surface dissipation, thermoelastic dissipation (TED)) are not all completely understood. This work focuses on the investigation of thermoelastic dissipation, an energy loss mechanism whereby mechanical energy stored in the resonator is irrecoverably transferred to the thermal domain. Strain gradients lead to temperature gradients in the resonator. If these temperature gradients are allowed to relax (i.e. heat flows), the mechanical energy is irrecoverable. Silicon micromechanical resonators were fabricated in a single wafer vacuum encapsulation at pressures < 1 Pa. Novel resonator geometries have been investigated that reduce the impact of TED, while at the same time verifying the validity of novel finite element simulations that predict TED-limited Q. These resonators employ slots designed in the beams that disrupt the heat flow across the beam, altering the process of thermoelastic dissipation. An increase of Q of up to 4X (10,000 to 40,000) was seen with this method. As a result, we are now able to engineer the TED-limited Q for micromechanical resonant beams. From shott at snf.stanford.edu Thu Aug 11 05:34:45 2005 From: shott at snf.stanford.edu (John Shott) Date: Thu, 11 Aug 2005 05:34:45 -0700 Subject: New reservation deletion policy in Coral ... Message-ID: <42FB45E5.2070800@snf.stanford.edu> An HTML attachment was scrubbed... URL: From mtang at snf.stanford.edu Fri Aug 12 06:40:29 2005 From: mtang at snf.stanford.edu (Mary Tang) Date: Fri, 12 Aug 2005 06:40:29 -0700 Subject: Nanocomposites 2005 Message-ID: <42FCA6CD.1020603@snf.stanford.edu> Dear Labmembers: I'd like to direct your attention to Nanocomposites 2005: New Market and Commercial Applications, which takes place August 22-24 in San Francisco (described in more detail below.) As a part of their outreach efforts, the organizers have kindly provided us with two student registrations for this event. If you are an interested student, please get in touch with me. Thanks for your attention - Mary -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu ******************************************************* * *New Markets & Commercial Uses of Nanocomposites * */New Market and Commercial Applications/* will be the major theme of the 5^th World Congress *"Nanocomposites 2005" _August 22-24_*_, _Crowne Plaza Union Square, San Francisco. For complete info call *734-737-0507*, or click on the webpage: http://www.executive-conference.com/conferences/nano05_agenda.html *Register Now and Discover the Possibilities of Nanocomposites!* The 5th World Congress *"Nanocomposites 2005," is* *three full days with 34 oral presentations* and many poster presentations. The speakers are industry leaders and top scientists from around the world. This essential and most important event on nanocomposites includes 1. New commercial applications 2. Business prospects 3. New markets 4. Latest scientific discoveries 5. Technical breakthroughs. I hope to see you in San Francisco. Mrs. Shar Finnegan Meeting Planner 734-737-0507 shar at executive-conference.com -------------- next part -------------- An HTML attachment was scrubbed... URL: From mdeal at stanford.edu Fri Aug 12 06:42:00 2005 From: mdeal at stanford.edu (Michael Deal) Date: Fri, 12 Aug 2005 06:42:00 -0700 Subject: NNIN REU poster session reminder Message-ID: <6.1.1.1.2.20050812064137.01dfd850@mdeal.pobox.stanford.edu> Reminder: Visit the poster session of the NNIN Research Experience for Undergraduates (REU) convocation today at approx. 2:30-4pm. Located in the second floor hallway of CISX. 80 posters and undergraduates from across the country - All areas of nanotechnology. -Mike Deal, SNF From wtpark at stanford.edu Fri Aug 12 10:27:55 2005 From: wtpark at stanford.edu (Woo-Tae Park) Date: Fri, 12 Aug 2005 10:27:55 -0700 Subject: Ph.D. Oral Exam Announcement In-Reply-To: <002001c59915$89f169f0$e63140ab@prinzwhryu> Message-ID: <200508121727.j7CHRsQW019392@smtp3.Stanford.EDU> Ph.D. Oral Exam. Title: ENCAPSULATED SUB-MILLIMETER PIEZORESISTIVE ACCELEROMETERS FOR BIOMEDICAL APPLICATIONS Woo-Tae Park Advisor: Thomas W. Kenny Department of Mechanical Engineering Time: Wednesday, August 17th, 9:00am (Refreshments from 8:45am) Location: CISX-Auditorium Micromachined accelerometers have been introduced in the late 1970s and have been used in various applications. The applications range from inertial navigation and data logging in wells to body activity monitoring for pacemakers. Although the size of the accelerometers was sufficient for their applications, there were not many efforts in pushing the limits of accelerometer miniaturization. In this study, we utilized film deposition packaging technology and other modern microfabrication techniques to miniaturize the size and mass of the packaged accelerometers, two orders of magnitude smaller than any accelerometers ever reported. We used these ultra miniature accelerometers to offer sensing capabilities for biomedical applications which was not possible with any other means. A novel design of the accelerometer and packaging has been developed for miniaturization. The accelerometer consists of a proof mass suspended by a single high-aspect-ratio beam attached to the substrate. Piezoresistors are implanted on the sidewall of the beam to sense the maximum stress applied on the beam. A thick layer of epitaxial silicon is deposited on the accelerometer to form a mechanically robust yet compact package. The new packaging method enables reduction in die area up to 70% compared to conventional wafer bonded package. A new polyimide flexible circuit is also developed to route the signals from the ultra-miniature accelerometers to a conventional package. The new technology is used in experimental biomedical applications. The accelerometer is evaluated as an implantable sound sensor for cochlear implants which can possibly replace the external microphones. It is also used as an electrical stethoscope to measure respiratory and heart signal of neonatal mice. There are many other possible applications in the biomedical field such as imaging artifact reduction for live animal microendoscopy. This technology has the potential to open up new realms of motion sensing in the biomedical science and engineering. ========================================= Woo-Tae Park Graduate Researcher Stanford Microstructures and Sensors Laboratory O) 650-736-0044 L) 650-723-0277 ========================================= -------------- next part -------------- An HTML attachment was scrubbed... URL: From jerabek at snf.stanford.edu Fri Aug 12 10:34:20 2005 From: jerabek at snf.stanford.edu (Paul Jerabek) Date: Fri, 12 Aug 2005 10:34:20 -0700 (PDT) Subject: mask writer Message-ID: To whom it may concern, Micronic mask writer is back on line. Field service readjusted air jets on the stage. Written four plate so far and it works well. -Paul From mse.whu at stanford.edu Sun Aug 14 17:15:17 2005 From: mse.whu at stanford.edu (Wei Hu) Date: Sun, 14 Aug 2005 17:15:17 -0700 Subject: PMGI development process Message-ID: <1124064917.42ffde95219ee@webmail.stanford.edu> Hello, I am doing sub-100nm bilayer lift-off with PMGI(underlayer)/PMMA. Does anybody have the experience or recipe to develop PMGI to get an undercut profile? I tried MF319, but it didn't work well. The undercut rate is considerably slow. I wonder if surface wetting is a problem. Thanks! Wei -- Wei Hu Ph.D. Candidate Department of Materials and Engineering Stanford University From grupp at snowmass.Stanford.EDU Mon Aug 15 10:37:20 2005 From: grupp at snowmass.Stanford.EDU (Dan Grupp) Date: Mon, 15 Aug 2005 10:37:20 -0700 (PDT) Subject: PMGI development process In-Reply-To: <1124064917.42ffde95219ee@webmail.stanford.edu> Message-ID: I had great success with this. I seem to be missing my notenbook with my recipe, but i remember this: for 3000A thick PMGI, use LDD26W for 30s. if you have time, would suggest taking a wafer with just PMGI on it, and measuring etch rate in LDD26W (scratch an openning, dektak it before and after 10 s ldd26W). Note PMGI needs no extra exposure. I'll keep looking for my notebook. I think i baked PMGI at 200C, then PMMA at 180C. ZEP on top also worked great. -Dan On Sun, 14 Aug 2005, Wei Hu wrote: > Hello, > > I am doing sub-100nm bilayer lift-off with PMGI(underlayer)/PMMA. Does > anybody have the experience or recipe to develop PMGI to get an undercut > profile? I tried MF319, but it didn't work well. The undercut rate is > considerably slow. I wonder if surface wetting is a problem. > > Thanks! > > Wei > -- > Wei Hu > Ph.D. Candidate > Department of Materials and Engineering > Stanford University > > > > --------------------------------------------------------------------------- Dr. Daniel Grupp, Visiting Scholar Center for Integrated Systems Stanford University Stanford, CA 94305 (650) 724-6911 FAX: 723-4659 --------------------------------------------------------------------------- From amf at amfitzgerald.com Mon Aug 15 14:17:30 2005 From: amf at amfitzgerald.com (Alissa M. Fitzgerald) Date: Mon, 15 Aug 2005 14:17:30 -0700 Subject: Reminder: SNF User's Meeting- Tuesday Aug. 16th, 4-5pm, CIS X Aud Message-ID: <20050815211736.7835663031E@mailgate1.dslextreme.com> Hello Labmembers, There will be a SNF user's meeting on Tuesday Aug. 16th, 4-5pm, CIS X Auditorium. All are welcome to attend. **Please make an effort to be on time.** It is hard to hold a discussion when everyone walks in 15 mins. late. The meeting will end promptly at 5pm. Since our last meeting, Paul Rissman has posted some lab usage metrics on his office door. I encourage you to take a look and bring your feedback and comments to the meeting. Agenda - Furnace second sourcing options during Aug 15-30th shutdown - Review of lab usage metrics - Need input for next SNF Advisory Committee meeting (I will be attending on behalf of industrial users) - Problems/concerns/suggestions Hope to see you there! Regards, Alissa Fitzgerald Alissa M. Fitzgerald, Ph.D. A.M. Fitzgerald & Associates, LLC Technical Consulting Services MEMS | Materials | Sensor Systems 655 Skyway Suite 118 San Carlos, CA 94070 (650) 592-6100 tel/fax www.amfitzgerald.com -------------- next part -------------- An HTML attachment was scrubbed... URL: From ahazeghi at stanford.edu Tue Aug 16 08:44:12 2005 From: ahazeghi at stanford.edu (Arash Hazeghi) Date: Tue, 16 Aug 2005 08:44:12 -0700 Subject: W Thickness measurement Message-ID: <001701c5a279$595c7060$5b840c80@AHWK32> Hi, I have some wafers with CVD W layer which I want to measure the thickness, what is the best way to do this? thanks, Arash -------------- next part -------------- An HTML attachment was scrubbed... URL: From xhu at stanford.edu Thu Aug 18 13:17:44 2005 From: xhu at stanford.edu (Xuejiao Hu) Date: Thu, 18 Aug 2005 13:17:44 -0700 Subject: Ph.D. Oral Exam Announcement In-Reply-To: <200508121727.j7CHRsQW019392@smtp3.Stanford.EDU> Message-ID: <000001c5a431$e5209e00$08a60c80@xhu> Ph.D. Oral Exam Title: Micro/nano-scale Characterization and Modeling of Thermal Interface Materials for Electronics Packaging Candidate: Xuejiao Hu Advisor: Kenneth E. Goodson Department of Mechanical Engineering Time: Monday, August 22nd, 1:30pm (Refreshments from 1:15pm) Location: MERL Conference Room (418 Panama Street, 2nd floor, Room 203) Abstract: Thermal interface materials (TIMs) are used to thermally connect integrated circuits (ICs) to their cooling components. The performance of any thermal management solution for ICs, ranging from conventional heat sinks to advanced solutions like vapor chambers and microchannels, is limited by the thermal resistance of TIMs. This problem grows more acute with the increases in chip power densities and on-chip hotspots. However, in practice, the TIM performance always falls below expectation. Part of the problem is the confusion between the bulk behavior of attachment materials, often quoted by vendors, and their behavior in thin-film form within a package. Related to this problem is the fact that heat conduction physics in TIM layers is poorly understood due to a lack of microscopic characterization and modeling tools. This work is focused on extracting the microscopic physics behind the thermal behavior of modern TIMs by developing high-resolution experimental and modeling tools. Diffraction-limited infrared microcopy is used to measure both cross-sectional and through-wafer lateral variations in TIM properties. Measured data, along with the results from microscopic simulation and modeling, provide deeper insight into the impacts of microscopic TIM structures on TIM performance. The impacts investigated include: (1) the changes of particle distributions near TIM boundaries, which result in higher temperature gradients and yield additional boundary thermal resistances; (2) the force interactions between particle-particle and particle-boundaries, which limit the TIM bold-line thickness; (3) voids and other defects at TIM interfaces deteriorate local TIM heat conduction. This work is also dedicated to developing novel interface materials for next-generation electronics packaging applications with substantially improved thermal performance. Opportunities are nanostructured materials, particularly those related to carbon nanotubes (CNTs). Exploratory CNT-based solutions investigated in this work include (1) composites with homogeneous distributed CNTs and nickel particles; (2) interface structures with nanotubes vertically grown on silicon or metal substrates; (3) interface structures with two opposing CNT arrays. Heat conduction phenomena as well as possible mechanisms in these novel nanostructured materials are discussed. ------------------------------------------ Xuejiao Hu, PhD Candidate Stanford University Mechanical Engineering Department Building 530, Room 201 440 Escondido Mall Stanford, CA 94305-3030 650/736-0044 ------------------------------------------- -------------- next part -------------- An HTML attachment was scrubbed... URL: From choonghoyu at mail.utexas.edu Thu Aug 18 14:35:36 2005 From: choonghoyu at mail.utexas.edu (Choongho Yu) Date: Thu, 18 Aug 2005 14:35:36 -0700 Subject: Shadow mask Message-ID: <002201c5a43c$c7731c10$ea95fea9@VALUEDB8CC434B> Hi all, I am trying to fabricate a shadow mask to evaporate metals. I heard some of them made patterns on copper or aluminum sheets and etched them in order to evaporate metals through the etched holes. Would you let me know where to buy those copper or aluminum sheets? I was trying to use thin copper and aluminum foil, but they are too flexible to make patterns using a photoresist and to do etching for creating patterns. Any advice would be appreciated. Thank you for your help in advance. C.H. -------------- next part -------------- An HTML attachment was scrubbed... URL: From afflannery at comcast.net Thu Aug 18 16:59:37 2005 From: afflannery at comcast.net (Anthony Flannery) Date: Thu, 18 Aug 2005 16:59:37 -0700 Subject: Shadow mask In-Reply-To: <002201c5a43c$c7731c10$ea95fea9@VALUEDB8CC434B> Message-ID: <000401c5a450$e550e4b0$8f01a8c0@Ibscus3> Choongho, I've had a fair bit of success using wafers. I've done through-wafer DRIE to define it. Use double side polished, thinner wafers. Features aren't the finest, but the mask is robust and does not bend. Although the DRIE is long, it only has to be done once (per mask) Tony -----Original Message----- From: Choongho Yu [mailto:choonghoyu at mail.utexas.edu] Sent: Thursday, August 18, 2005 2:36 PM To: labmembers at snf.stanford.edu Subject: Shadow mask Hi all, I am trying to fabricate a shadow mask to evaporate metals. I heard some of them made patterns on copper or aluminum sheets and etched them in order to evaporate metals through the etched holes. Would you let me know where to buy those copper or aluminum sheets? I was trying to use thin copper and aluminum foil, but they are too flexible to make patterns using a photoresist and to do etching for creating patterns. Any advice would be appreciated. Thank you for your help in advance. C.H. -------------- next part -------------- An HTML attachment was scrubbed... URL: From sjo at stanford.edu Sat Aug 20 15:08:29 2005 From: sjo at stanford.edu (Sebastian J. Osterfeld) Date: Sat, 20 Aug 2005 15:08:29 -0700 Subject: Where can we buy a 6" Si3N4 target quickly? Message-ID: <4307A9DD.7050406@stanford.edu> Hello SNF labmembers, The process that we're partially carrying out in the SNF is completed in our own machine where we apply passivation to our sensors. We now have discovered that we will likely benefit from adding an Si3N4 layer, but we don't have the right target yet. Can someone recommend a place nearby where I can buy such a target quickly? I would also be willing to buy it off another research group, if you don't need yours anymore. Or maybe someone could lend me such a target for a day or two. We would use it in our clean ion beam sputter deposition machine. Target diameter is 6", thickness is arbitrary from 1/16" to 3/8", and typical targets are simply disks made from compressed and sintered Si3N4 powder. Any tips are greatly appreciated. For us the machines at the SNF are most likely unsuitable for Si3N4 deposition, because the required substrate temperatures of the wafer (350C or greater), which would randomize the magnetic orientation of a buried 20nm thin film sensor. Many thanks! Sebastian -- Sebastian J. Osterfeld PhD. Student / Shan X. Wang Group Dept. of Materials Science & Engineering Residential Mailing Address: 334 Olmsted Rd Apt 114 Stanford, CA 94305 Office Mailing Address: McCullough Building, Room 208A 476 Lomita Mall Stanford, CA 94305-4045 Home: (650) 331-1171 (Voice Mail) Cell: (650) 906-1946 Work: (650) 723-2939 Email: sjo at stanford.edu From jwc at snf.stanford.edu Mon Aug 22 10:04:30 2005 From: jwc at snf.stanford.edu (James Conway) Date: Mon, 22 Aug 2005 10:04:30 -0700 Subject: Shadow mask In-Reply-To: <002201c5a43c$c7731c10$ea95fea9@VALUEDB8CC434B> References: <002201c5a43c$c7731c10$ea95fea9@VALUEDB8CC434B> Message-ID: <430A059E.4080403@snf.stanford.edu> Greetings: Might be easier to contract out your shadow mask needs. One vendor I have had very nice results with is: Photo sciences 4677 Old Ironsides Drive, Santa Clara, CA 95054 Roger Horstman 408.850.0321 www.photo-sciences.com tell them James Conway sent you. Choongho Yu wrote: > Hi all, > I am trying to fabricate a shadow mask to evaporate metals. Iheard > some of them made patterns oncopper or aluminum sheets and etched them > in order to evaporate metals through the etched holes. Would you let > me know where to buy those copper or aluminum sheets? I was trying to > use thin copper and aluminum foil, but they are too flexible to make > patterns using a photoresist and to do etching for creating patterns. > Any advice would be appreciated. > Thank you for your help in advance. > C.H. -------------- next part -------------- An HTML attachment was scrubbed... URL: From rcrane at snf.stanford.edu Mon Aug 22 18:11:04 2005 From: rcrane at snf.stanford.edu (Dick Crane) Date: Mon, 22 Aug 2005 18:11:04 -0700 Subject: Furnace area disruption Tuesday 0800-1100 Message-ID: <430A77A8.4080208@snf.stanford.edu> Attention fab users. We will be moving the second Thermco furnace into position tomorrow morning, Tuesday, 8/23/05, between 0800 and 1100. This activity will affect (high particle count, movers in the fab, open lab doors, large objects blocking the aisle) the aisle way from wbgaas to wbsilicide. Please avoid this area if you can. Thanks and sorry for the inconvenience, Dick From rcrane at snf.stanford.edu Tue Aug 23 14:59:19 2005 From: rcrane at snf.stanford.edu (Dick Crane) Date: Tue, 23 Aug 2005 14:59:19 -0700 Subject: Loss of temp control Message-ID: <430B9C37.7010202@snf.stanford.edu> Fab users, Air temperature for the gowning room and the metalica/STSetch aisle will have a loss of control tomorrow, Wednesday, 8/24, 0700-1000, to allow repairs to be made to the heat exchanger. This area may feel warmer than the rest of the fab during the repair. Sorry for the inconvenience, Dick From rcrane at snf.stanford.edu Wed Aug 24 15:33:17 2005 From: rcrane at snf.stanford.edu (Dick Crane) Date: Wed, 24 Aug 2005 15:33:17 -0700 Subject: Furnace area almost ready Message-ID: <430CF5AD.5060209@snf.stanford.edu> Fab users, I'm happy to announce that the furnace area shutdown is over. Gas lines have been modified, tested, inspected, and signed off by Santa Claire County. The furnaces affected by this work have been checked for basic operations (temperature control and gas flow). Process staff is now checking growth rates. The furnaces should be available for use by this evening, Wednesday, 8/24. Watch Coral for further information. Thanks for your patience during this major shutdown, Dick From princeofdarknez at gmail.com Thu Aug 25 12:44:19 2005 From: princeofdarknez at gmail.com (Neel Shah) Date: Thu, 25 Aug 2005 12:44:19 -0700 Subject: APB: Missing labbook In-Reply-To: <430A77A8.4080208@snf.stanford.edu> References: <430A77A8.4080208@snf.stanford.edu> Message-ID: Last seen in the gowning room: small size cleanroom notebook. Has my name on the front in capital letters ("NEEL SHAH") along with the code for the drill room. Any info, please email me at nshah at hmc.edu ASAP. Thanks, Neel From ebasham32 at earthlink.net Thu Aug 25 14:02:41 2005 From: ebasham32 at earthlink.net (Eric) Date: Thu, 25 Aug 2005 14:02:41 -0700 Subject: Electroless plating solution vendor? Message-ID: Hello labmembers, Does anyone have recommendations for vendors that sell electroless plating solutions? I would be interested in copper, gold and zinc and I actually only need very small quantities for prototyping. Also I would appreciate any advice on plating copper over Al in SU8 grooves to make tall thin traces. Thanks! Eric -------------- next part -------------- An HTML attachment was scrubbed... URL: From mager at stanford.edu Thu Aug 25 15:36:35 2005 From: mager at stanford.edu (Morgan Mager) Date: Thu, 25 Aug 2005 15:36:35 -0700 Subject: SOI wafer Message-ID: <1125009395.430e47f36d9b1@webmail.stanford.edu> Does anyone have a small leftover piece of an SOI wafer they could let me have? Ideally, with a device layer <10um, but that's not critical. I don't really care what size the piece is, as long as it's more than a few mm. Thanks in advance if anyone can help out. -Morgan From kcrabb at stanford.edu Fri Aug 26 16:27:33 2005 From: kcrabb at stanford.edu (Kevin Crabb) Date: Fri, 26 Aug 2005 16:27:33 -0700 Subject: Aspect Ratio Pieces Message-ID: Hello All, I was wondering if anyone has any old and/or broken wafers you could donate to me. I am looking for: 1) feature sizes of roughly 10-100 microns 2) aspect ratios anywhere between 1:1 to 5:1. 3) prefer Si, but any material would be fine 4) ANY size pieces, from 4" wafer, to broken funny shaped 1cm or smaller size If you have any pieces you could donate to me, I would greatly appreciate it. Thank you, Kevin kcrabb at stanford.edu From mahnaz at snf.stanford.edu Mon Aug 29 09:50:47 2005 From: mahnaz at snf.stanford.edu (Mahnaz Mansourpour) Date: Mon, 29 Aug 2005 09:50:47 -0700 Subject: YES oven Message-ID: <43133CE7.50006@snf.stanford.edu> Hello all, I have asked Mike to put the YES oven down this morning 8/29/05. The gasket had became loose again and we need to cool the oven and take care of it. The oven should be up by 1 pm this afternoon. Sorry for any inconvenience this may cause. mahnaz