From kevhuang at stanford.edu Thu Jun 2 08:25:44 2005 From: kevhuang at stanford.edu (Kevin Huang) Date: Thu, 2 Jun 2005 08:25:44 -0700 Subject: Vapor HF etch rate at wbnitride Message-ID: <1117725944.429f24f826058@webmail.stanford.edu> Hi, Has anyone done vapor HF etching at wbnitride? What's the etch rate of SiO2, is it around 40 nm/minute or 400 nm/min. ? Thanks. Kevin From kevhuang at stanford.edu Thu Jun 2 08:27:17 2005 From: kevhuang at stanford.edu (Kevin Huang) Date: Thu, 2 Jun 2005 08:27:17 -0700 Subject: using the epi machine to get smooth sidewalls Message-ID: <1117726037.429f25554d157@webmail.stanford.edu> Hi, I've heard that people use the epi machine to get smooth side walls after an STS Etch run. Does anyone have any experience doing this and if so, what's the recipe you used? Thanks. Kevin From wibool at stanford.edu Thu Jun 2 08:51:03 2005 From: wibool at stanford.edu (Wibool Piyawattanametha) Date: Thu, 2 Jun 2005 08:51:03 -0700 Subject: Vapor HF etch rate at wbnitride In-Reply-To: <1117725944.429f24f826058@webmail.stanford.edu> Message-ID: <200506021551.j52Fp4Jr021599@smtp2.Stanford.EDU> Hi Kevin, The etch rates depend on the types of oxide, size of the chamber, temperature, etc. Please see the attached paper. I have not done it here but I did it in my old school. Please take an extreme caution while doing this etching. Best, WP Wibool Piyawattanametha, Ph.D. Stanford University Departments of Applied Physics, Biological Sciences, and Pediatrics James H. Clark Center (Bio-X) - Room W080 318 Campus Drive Stanford, CA 94305 Telephone: (650) 725-4097 Fax: (650) 724-5805 -----Original Message----- From: Kevin Huang [mailto:kevhuang at stanford.edu] Sent: Thursday, June 02, 2005 8:26 AM To: labmembers at snf.stanford.edu Subject: Vapor HF etch rate at wbnitride Hi, Has anyone done vapor HF etching at wbnitride? What's the etch rate of SiO2, is it around 40 nm/minute or 400 nm/min. ? Thanks. Kevin -------------- next part -------------- A non-text attachment was scrubbed... Name: a comparison btw wet HF and vapor HF etchings.pdf Type: application/pdf Size: 141584 bytes Desc: not available URL: From wibool at stanford.edu Thu Jun 2 09:07:13 2005 From: wibool at stanford.edu (Wibool Piyawattanametha) Date: Thu, 2 Jun 2005 09:07:13 -0700 Subject: using the epi machine to get smooth sidewalls In-Reply-To: <1117726037.429f25554d157@webmail.stanford.edu> Message-ID: <200506021607.j52G7EFF027561@smtp2.Stanford.EDU> Hi Kevin, Please find this paper. The answer is there. Ming-Chang M. Lee and Ming C. Wu, "3D Silicon Transformation using Hydrogen Annealing," Proc. Solid State Sensor, Actuator and Microsystems Workshop (Hilton Head 2004) Hilton Head Island, South Carolina, June 6-10, 2004. Best, WP Wibool Piyawattanametha, Ph.D. Stanford University Departments of Applied Physics, Biological Sciences, and Pediatrics James H. Clark Center (Bio-X) - Room W080 318 Campus Drive Stanford, CA 94305 Telephone: (650) 725-4097 Fax: (650) 724-5805 -----Original Message----- From: Kevin Huang [mailto:kevhuang at stanford.edu] Sent: Thursday, June 02, 2005 8:27 AM To: labmembers at snf.stanford.edu Subject: using the epi machine to get smooth sidewalls Hi, I've heard that people use the epi machine to get smooth side walls after an STS Etch run. Does anyone have any experience doing this and if so, what's the recipe you used? Thanks. Kevin From kenny at cdr.stanford.edu Thu Jun 2 10:02:17 2005 From: kenny at cdr.stanford.edu (Thomas Kenny) Date: Thu, 2 Jun 2005 10:02:17 -0700 Subject: using the epi machine to get smooth sidewalls In-Reply-To: <200506021607.j52G7EFF027561@smtp2.Stanford.EDU> References: <200506021607.j52G7EFF027561@smtp2.Stanford.EDU> Message-ID: All - I am concerned about this line of discussion. The epi machine in CIS has been very fragile, expensive to maintain, and is the focal point of many research projects in several groups because of its capabilities for deposition. The fact that it can also be used as a high-temperature H2 annealing station is not itself a good reason to let it be used as such. I believe this would be a little like using the e-beam system to remove edge bead on some of our wafers, or using the aligner/bonder to assemble plastic parts from the student shops. these things are possible, but they are also very bad ideas. If there is a serious interest in a H2 annealing process for STS sidewall smoothing, we should prepare a dedicated furnace tube for that process. I think this would be a very popular capability. Otherwise, I strongly oppose the concept of using the epi as a generic, lab-wide tool to smooth STS sidewalls. the costs of the repairs to the epi after just a few months of such use would far exceed the cost of making a dedicated H2 annealing process in a furnace tube. tk From saraswat at cis.stanford.edu Thu Jun 2 11:12:03 2005 From: saraswat at cis.stanford.edu (saraswat) Date: Thu, 2 Jun 2005 11:12:03 -0700 Subject: using the epi machine to get smooth sidewalls In-Reply-To: <200506021607.j52G7EFF027561@smtp2.Stanford.EDU> References: <200506021607.j52G7EFF027561@smtp2.Stanford.EDU> Message-ID: <9f93b454b4834993405d2671b6d49bfe@cis.stanford.edu> Hi All, The epi machine is a very delicate piece of equipment, very old and very expensive to maintain. A large number of students use it for depositing ultrathin layers Si, SiGe and Ge for fabricating nanodevices. The heteroepitaxial growth of Ge or SiGe on Si depends critically on fine tuning of the reactor. A slight change in the reactor parameters totally throws off the quality of the grown layers. I fully agree with Tom Kenny that it will be foolish idea to use this reactor to smooth out the STS etch profiles. Krishna Saraswat ------ On Jun 2, 2005, at 10:02 AM, Thomas Kenny wrote: > All - > > I am concerned about this line of discussion. The epi machine in CIS > has been very fragile, expensive to maintain, and is the focal point > of many research projects in several groups because of its > capabilities for deposition. > > The fact that it can also be used as a high-temperature H2 annealing > station is not itself a good reason to let it be used as such. I > believe this would be a little like using the e-beam system to remove > edge bead on some of our wafers, or using the aligner/bonder to > assemble plastic parts from the student shops. these things are > possible, but they are also very bad ideas. > > If there is a serious interest in a H2 annealing process for STS > sidewall smoothing, we should prepare a dedicated furnace tube for > that process. I think this would be a very popular capability. > > Otherwise, I strongly oppose the concept of using the epi as a > generic, lab-wide tool to smooth STS sidewalls. the costs of the > repairs to the epi after just a few months of such use would far > exceed the cost of making a dedicated H2 annealing process in a > furnace tube. > > tk On Jun 2, 2005, at 9:07 AM, Wibool Piyawattanametha wrote: > Hi Kevin, > > Please find this paper. The answer is there. > > Ming-Chang M. Lee and Ming C. Wu, "3D Silicon Transformation using > Hydrogen > Annealing," Proc. Solid State Sensor, Actuator and Microsystems > Workshop > (Hilton Head 2004) Hilton Head Island, South Carolina, June 6-10, 2004. > > Best, > > WP > > Wibool Piyawattanametha, Ph.D. > Stanford University > Departments of Applied Physics, Biological Sciences, and Pediatrics > James H. Clark Center (Bio-X) - Room W080 > 318 Campus Drive > Stanford, CA 94305 > Telephone: (650) 725-4097 > Fax: (650) 724-5805 > > -----Original Message----- > From: Kevin Huang [mailto:kevhuang at stanford.edu] > Sent: Thursday, June 02, 2005 8:27 AM > To: labmembers at snf.stanford.edu > Subject: using the epi machine to get smooth sidewalls > > Hi, > I've heard that people use the epi machine to get smooth side > walls > after an STS Etch run. Does anyone have any experience doing this and > if > so, what's the recipe you used? > > Thanks. > > Kevin > > > From vidyagv at gmail.com Thu Jun 2 17:01:18 2005 From: vidyagv at gmail.com (Vidya V) Date: Thu, 2 Jun 2005 17:01:18 -0700 Subject: Missing a box with masks! Message-ID: <616a357905060217014fd6fb06@mail.gmail.com> Hi! All, I am missing a box which has some chrome plated masks in it. It is a typical plastic box that is provided by SNF when we get the masks made by Mr.Jerabek. It has ARRI and Woo Ho Lee on it. If found, can you please reply to this email with details as to how I can pick it up from you? Thanks, Vidya From rcrane at snf.stanford.edu Thu Jun 2 17:24:27 2005 From: rcrane at snf.stanford.edu (Dick Crane) Date: Thu, 02 Jun 2005 17:24:27 -0700 Subject: Acid Waste Drain shutdown Monday Message-ID: <429FA33B.6000802@snf.stanford.edu> SNF lab users and CISX lab users: On Monday, June 6, from 0700 to 1000, the building's acid waste neutralizer system will be shut down replacement of pH probes and signal transmitters and replacement of UPSs. Please do not dump any acid (or base) wastes during this time. The system can still accept DI rinse water during the changeout. This upgrade will help prevent unscheduled shutdowns in the future. SNF lab users: Any hot pot dumps must be completed before 0700. HF drains are unaffected and can be used normally. Thanks for your patience, Dick From rissman at stanford.edu Fri Jun 3 07:58:17 2005 From: rissman at stanford.edu (Paul Rissman) Date: Fri, 03 Jun 2005 07:58:17 -0700 Subject: safety glasses Message-ID: <5.1.1.5.2.20050603074958.018b7ef8@rissman.pobox.stanford.edu> Hi All, It has come to my attention that lab users have been observed without safety glasses, and worse still, working around wet benches. I can't say strongly enough how careless and foolish it is to work around chemicals without proper eye protection. One's sight is a great gift which we should never take for granted or unnecessarily risk. In fact, I would encourage any labmember whose glasses do not have side shields, to get them equipped with that additional protection. Please remember to always wear glasses in the lab. If you observe someone without eye protection, encourage them to go back to the gowning room and get a pair. Thanks for your help. Paul From suriadi at stanford.edu Mon Jun 6 08:28:07 2005 From: suriadi at stanford.edu (Suriadi Arief Budiman) Date: Mon, 6 Jun 2005 08:28:07 -0700 Subject: Polyimide In-Reply-To: <1115074111.4276ae3f57f6d@webmail.stanford.edu> Message-ID: <000001c56aac$5741dae0$0ea20c80@arief> Dear fellow labmembers, I need to have a patterned Polyimide layer on my wafer, and I only need it on 2 wafers of mine - I'm wondering if anybody has a little amount of Polyimide that you would not mind letting me borrow some. Looking forward certainly to hearing back from anybody who can help me with this. Thanks and best regards, suriadi From aageraci at stanford.edu Mon Jun 6 10:57:21 2005 From: aageraci at stanford.edu (Andrew Albert Geraci) Date: Mon, 6 Jun 2005 10:57:21 -0700 (PDT) Subject: Si wafer crystal orientation Message-ID: Hi, Does anyone know if it is standard for 001-oriented SOI wafers to have the device layer crystal orientation with the large flat along the 010 or 100 direction? (as opposed to 110 direction) Thanks, Andy Geraci From rcrane at snf.stanford.edu Wed Jun 8 08:47:28 2005 From: rcrane at snf.stanford.edu (Dick Crane) Date: Wed, 08 Jun 2005 08:47:28 -0700 Subject: Acid waste neutralizer is down Message-ID: <42A71310.702@snf.stanford.edu> Fab and CISX lab wetbench users, The acid (and base) waste neutralizer system for both SNF and CISX suffered a major failure early this morning and is not working. The faulty caustic pump is being replaced and neutralizer chemicals being refilled. Noon today is the earliest time estimate for resuming normal operation. I will send out an announcement and post the entry door when the system is up. Thanks for your patience, Dick From rcrane at snf.stanford.edu Wed Jun 8 10:00:33 2005 From: rcrane at snf.stanford.edu (Dick Crane) Date: Wed, 08 Jun 2005 10:00:33 -0700 Subject: Acid waste system is back up Message-ID: <42A72431.6030401@snf.stanford.edu> Fab and CISX lab wetbench users, The acid (and base) waste neutralizer system for both SNF and CISX has been repaired. The system is up and ready for use. Thanks for your patience, Dick From mcvittie at snf.stanford.edu Wed Jun 8 10:02:12 2005 From: mcvittie at snf.stanford.edu (Jim McVittie) Date: Wed, 08 Jun 2005 10:02:12 -0700 Subject: Plasma Etching Seminar -- Thursday afternoon Message-ID: <42A72494.56B00A6E@snf.stanford.edu> June Plasma Etch Users Group Meeting on Conductor Etching Cost: Free Sponsor: American Vacuum Society Chair: Jim McVittie, SNF Time: 2:15 to 4:30, Thursday, June 9 Location: National Semiconductor Auditorium, 955 Kifer Rd., Sunnyvale, CA Directions: >From 101: Go south on Lawrence Expressway. Turn right on Kifer Rd. Turn right into the driveway of the National Semiconductor Auditorium (955 Kifer Rd.) and find parking in the rear parking lot. The auditorium is on the West Side of the building and can be entered from the door in the rear next to the company park. *** Metal Etch: Challenges and Opportunities*** Jeff Stokes, Applied Materials, Conductor Etch Division Metal etch has been an industry standard for decads of generations of IC devices. Even now, advanced memory customers use metal etch systems for the patterning of the interconnect lines on the latest set of chips. Although the focus of extremely high etch control often is with the advanced front end, such as logic gate, there are still significant requirements for etching Al metal lines. Given the advanced design rules even for Al etch, it is important to have a robust, production proven processes which give good profiles and good across wafer uniformity. These requirements present challenges especially in the context of providing reliable etch with good thruput and low operating costs. Although, metal etch has often been associated with the standard of Al interconnect lines, there is increasing interest and development work on other applications. Some of these uses for metal etch are gaining in interest and in capability. One application is the case of TiN for use as a hard mask to avoid resist poisoning for the low-k dielectric in damascene processes. Part of the capability is to use integrated metrology at the step of TiN etch to control the CD's which can impact the device performance. As a more complex application, the use of metal etch for front end metal gates is being actively explored. In addition, there are other uses such as MRAM's and FeRAM's which require advanced metal etch hardware and processing. This talk will cover the challenges of providing the capabilities for the highly demanding Al connect process, as well as provide a brief overview of other metal etch applications, current capabilities, and future directions. ***Uniformity Control Knobs for the Dual Frequency Poly Etcher*** Lee Chen, TEL The experimental results of a capacitively coupled (ccp) dual-frequency poly etcher are presented. The etcher has a 60MHz plasma source (the top electrode) and a 13.56MHz biased wafer-electrode. 3 additional control knobs are implemented to further expand its control over CD-uniformity while maintaining its overall simplicity and reliability. The 1st knob is a 2-zone temperature wafer-electrode (2-zone ESC) and it is a strong knob for CD-uniformity since the wafer temperature affects feature-side-wall reactivity strongly. The 2nd knob is the 2-zone gas whose primary effect is on the neutral species' radial distribution. Its second-order effect is on the plasma density's radial uniformity. The 3rd knob is a device called IC-Unit which is a wafer-electrode VHF Impedance Control Unit. Its primary function is to adjust the plasma's uniformity. The wafer-electrode's VHF impedance can move the plasma radially and has a strong effect on the radial uniformity of the etch rate. As an example, 35nm poly-width (85nm gate-litho) with 3s=2.5nm can be achieved with the optimized 2-zone ESC and IC-Unit settings. ***Unraveling the complex processes in a Fluorocarbon plasma*** M.J. Goeckner, University of Texas at Dallas The chemistry of fluorocarbon plasmas are perhaps one of the most complex processes known. In general it can be thought of as the interactions between three main scientific subsystem, plasma physics, gas phase chemistry/physics and surface phase chemistry/physics. To understand this complexity one simply needs to consider how a given reactive gas-phase specie might interact with a surface. Does it stick to the surface? Does it chemically react with the surface? Does it promote film growth? How does this interaction change the gas composition? Does an altered gas-phase chemistry alter the plasma? Understanding these interactions is key to producing better models of plasmas, allowing the optimization of complete process systems and hence improved product yield. This talk will review how various groups, including our group at UTD, are attacking this complex problem and a small sample of the results observed to date. Based on this knowledge, we discuss possible future studies. -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: mcvittie.vcf Type: text/x-vcard Size: 422 bytes Desc: Card for Jim McVittie URL: From mahnaz at snf.stanford.edu Wed Jun 8 13:52:53 2005 From: mahnaz at snf.stanford.edu (Mahnaz Mansourpour) Date: Wed, 08 Jun 2005 13:52:53 -0700 Subject: Chemical clean out Message-ID: <42A75AA5.7030301@snf.stanford.edu> Hello all, Please ...please take a few minutes and check the yellow cabinets for any nonstandard material you have in there. The cabinets have passed the status of being full long time a go. We need to clean up and make room for few new labmembers whom patiently been waiting for space. I would appreciate if you do it by Monday 6/13 other wise, I will cleanup and I will charge you my time for any old and expired bottles that I find and get rid of. Any help is greatly appreciated and be considered as community help. mahnaz From mahnaz at snf.stanford.edu Wed Jun 8 15:26:52 2005 From: mahnaz at snf.stanford.edu (Mahnaz Mansourpour) Date: Wed, 08 Jun 2005 15:26:52 -0700 Subject: Lost/found Message-ID: <42A770AC.9040803@snf.stanford.edu> Hello all, The lost and found in the gowning room is pretty full. I m talking about the one behind the mirror in the gowning room, please take a look and take your stuff , I see quiet few masks in there. On Monday 6/13 I will box them and take them to NO NAME LAND and no one will ever see them again. mahnaz From luharuka at gmail.com Fri Jun 10 19:13:57 2005 From: luharuka at gmail.com (Rajesh Luharuka) Date: Fri, 10 Jun 2005 19:13:57 -0700 Subject: Scanning Vibrometer Message-ID: <6c578a4c05061019137ec47949@mail.gmail.com> Dear All, I am in urgent need of a scanning vibrometer to capture 3-D dynamic motion of a MEMS stucture. I was wondering if there is one on-campus or near-by. I will greatly appreciate any information/advise regarding this. Many Thanks, Rajesh -- -------------- next part -------------- An HTML attachment was scrubbed... URL: From kupnik at stanford.edu Wed Jun 15 11:26:05 2005 From: kupnik at stanford.edu (Mario Kupnik) Date: Wed, 15 Jun 2005 10:26:05 -0800 Subject: Dielectric strength of SiO2 depending on temperature ??? Message-ID: <200506151725.j5FHPgqZ018739@smtp-roam.Stanford.EDU> Hi all, Does anyone know (or a reference) how the dielectric strength of thermal grown SiO2 (dry oxidation, > 1 micron) behaves over a wide temperature range, i.e. from 300K up to 1300K !!! I know that it will go down drastically with temperature. I found a lot of information for room temperature and temperatures up to 400K but nothing for this range. Thanks a lot ! Mario Kupnik Edward L. Ginzton Laboratory Stanford University 450 Via Palou Stanford, CA 94305-4088 Phone: 650-723-0150 Fax: 650-725-3890 E-mail: kupnik at stanford.edu From rcrane at snf.stanford.edu Fri Jun 17 09:09:18 2005 From: rcrane at snf.stanford.edu (Dick Crane) Date: Fri, 17 Jun 2005 09:09:18 -0700 Subject: Campus wide power outage Message-ID: <42B2F5AE.9030200@snf.stanford.edu> Fab users: At 0637 this morning, Friday, June 17, we experienced a campus wide electrical power outage which lasted until 0750. Aside from emergency power circuit users (exhaust air, neutralizer, toxic gas system, some lighting), the fab was totally shut down. We are now in the process of turning equipment back on and running qual tests. As of 0900 wet benches are up, most furnaces are up (but need qual test), most etchers are up, most metal dep tools are down for cryo regens, almost all tools in litho are up, Hitachi ebeam and Raith are down. Coral status does not reflect tool status at the moment but will within an hour. Thank you for your patience, Dick From marco.rolandi at gmail.com Tue Jun 21 15:26:33 2005 From: marco.rolandi at gmail.com (Marco Rolandi) Date: Tue, 21 Jun 2005 15:26:33 -0700 Subject: photolithography hystory book Message-ID: Hello, does anybody know of a good book, review article or website on the history of photolithography for semiconductor fabrication? I do not need anything too detailed, but something with the dates of the milestones and with and explanation of why is it called lithography. Thanks, Marco. -- ----------------------------------------------------------------- Marco Rolandi PhD Candidate Department of Applied Physics Dai Group Department of Chemistry Stanford University Stanford, 94305 phone: (650) 725-9156 -------------- next part -------------- An HTML attachment was scrubbed... URL: From wingcat at pacbell.net Tue Jun 21 16:00:48 2005 From: wingcat at pacbell.net (Adrian Tymes) Date: Tue, 21 Jun 2005 16:00:48 -0700 (PDT) Subject: photolithography hystory book In-Reply-To: Message-ID: <20050621230048.21722.qmail@web81606.mail.yahoo.com> http://en.wikipedia.org/wiki/Lithography and follow links from there, as relevant to your query. Also google on "history of lithography". --- Marco Rolandi wrote: > Hello, > does anybody know of a good book, review article or website on the > history > of photolithography for semiconductor fabrication? > I do not need anything too detailed, but something with the dates of > the > milestones and with and explanation of why is it called lithography. > Thanks, > Marco. > > -- > ----------------------------------------------------------------- > Marco Rolandi > PhD Candidate Department of Applied Physics > > Dai Group > Department of Chemistry > Stanford University > Stanford, 94305 > phone: (650) 725-9156 > From amf at amfitzgerald.com Mon Jun 27 20:41:06 2005 From: amf at amfitzgerald.com (Alissa M. Fitzgerald) Date: Mon, 27 Jun 2005 20:41:06 -0700 Subject: Need Cr/Au? Upcoming vendor run info. Message-ID: Hello labusers, We are outsourcing two chrome/gold depositions this week: Run #1: 500A Au over 50A Cr. Run #2: 3000A Au over 100A Cr. If you would like to batch your wafers into either run, please contact me asap. Your wafers must be ready to go by 12pm on Wed 6/29. We can only take whole 4" wafers (silicon, glass, quartz ok). Cost is $50/wafer. First come first served. Please send me an email if you are interested in hearing about future opportunities to piggyback on our outsourcing runs. Regards, Alissa 650 520 4438 cell Alissa M. Fitzgerald, Ph.D. A.M. Fitzgerald & Associates, LLC Technical Consulting Services MEMS | Materials | Sensor Systems 655 Skyway Suite 118 San Carlos, CA 94070 (650) 592-6100 tel/fax www.amfitzgerald.com -------------- next part -------------- An HTML attachment was scrubbed... URL: From mtang at snf.stanford.edu Tue Jun 28 13:13:42 2005 From: mtang at snf.stanford.edu (Mary Tang) Date: Tue, 28 Jun 2005 13:13:42 -0700 Subject: Temporary loss of temp control Message-ID: <42C1AF76.5030901@snf.stanford.edu> Hello -- We've just been informed by facilities of a steam valve failure. This is being replaced now, but the failure may regretfully result in some loss of temperature control in the lab. If you have sensitive processing in the litho area, please be aware of this. Mary -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From rcrane at snf.stanford.edu Tue Jun 28 15:00:42 2005 From: rcrane at snf.stanford.edu (Dick Crane) Date: Tue, 28 Jun 2005 15:00:42 -0700 Subject: Fab temperature is under control again Message-ID: <42C1C88A.9090103@snf.stanford.edu> Back to normal operation: The high pressure steam modulating valve has been successfully replaced and the fab temperatures are returning to normal. Thanks for your patience, Dick -------- Original Message -------- Subject: Temporary loss of temp control Date: Tue, 28 Jun 2005 13:13:42 -0700 From: Mary Tang Organization: Stanford Nanofabrication Facility To: labmembers at snf.stanford.edu Hello -- We've just been informed by facilities of a steam valve failure. This is being replaced now, but the failure may regretfully result in some loss of temperature control in the lab. If you have sensitive processing in the litho area, please be aware of this. Mary -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu -------------- next part -------------- An HTML attachment was scrubbed... URL: From s_harshal at yahoo.com Thu Jun 30 12:20:04 2005 From: s_harshal at yahoo.com (Harshal Surangalikar) Date: Thu, 30 Jun 2005 12:20:04 -0700 (PDT) Subject: "unique" situation! Message-ID: <20050630192004.33844.qmail@web30502.mail.mud.yahoo.com> Hello All, I have a unique situation with my wafers that I wanted to share to see if anyone has had a similar/close experience and any ideas/ suggestions about the same. i am processing double-side polished wafers to put a stack of nitride-PSG-nitride films. the steps were as follows: - wbdiff clean - NEWLSN nitride dep for 2.25 hrs (target thickness ~ 1um) -wbdiff clean - PSG400 for 1.25 hrs (SiH4=22, PH3= 86,target thickness ~ 2.1 um) - inert anneal, 1000AN, 2hrs. After the anneal step, one side (back side in BPSG furnace) in all the wafers shows a damaged and whitish residue-like appearance for the PSG layer that is not seen on the front side, the front sides show normal PSG color. I am not sure why the discoloration should occur only on the back side except for the reason that the back sides were facing inside in the bpsg furnace and may have had less deposition than the front side. any ideas? many thanks for your time and help, harshal.