"How To Choose Your Foundry Partner" Feb 9, 7pm, Palo Alto, MIT Club of N. CA Semiconductor Entrepreneurship

Alissa M. Fitzgerald amf at amfitzgerald.com
Tue Jan 31 18:05:41 PST 2006

Dear Labmembers,
Please see below for an event of general interest...
*this event is open to the public*
Best regards,


From: MITCNC [mailto:mitcnc at en25.com] 
Sent: Saturday, January 28, 2006 11:50 AM
To: amf at amfitzgerald.com
Subject: MITCNC EVENT: How To Choose Foundry; Feb.09, 7pm, Palo Alto

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The MIT Club of Northern California Semiconductor Entrepreneurship Series


How to choose your Foundry Partner 


Date: February 9th, 2006 Thursday

Event Time: 7pm (6:30 networking)

Venue: Cooley Godward LLP - Hanover St. Campus 
Location: 3175 Hanover Street, Palo Alto [directions]

Cost: $20 preregistration/$30 at the door (includes food/beverage)

Online registration at: http://www.mitcnc.org/Events_Single.asp?eventID=1199


Contact: kashyap_sunil at yahoo.com


Gone are the days when chip designers could hand over their design to a
foundry and expect good yields. Nowadays, to achieve predictable yields,
designers must weigh device manufacturability against chip performance. This
phenomenon has resulted in multiple collaborations among different sectors
of the chip industry. Over the last year we have focused on how EDA tools
and services are helping bridge the gap between design and manufacturing.
Given the difficulty of changing from one foundry to another, it is all the
more important that a fabless semiconductor company choose its partner
wisely. This event will feature a panel discussion focusing on how a fabless
startup should approach making this critical decision. The panel will
consist of people with first-hand experience in selecting a foundry partner
and negotiating and implementing such deals. 


Topics to be examined in more detail include: 


7    Key factors in evaluating foundries and picking a partner

7    Things to look for beyond technological capability

7    Given the high switching cost (especially for cutting edge technology),
what to do when the relationship with the foundry partner falters

7    Under what circumstances is a US foundry preferable?

7    Do all roads lead to TSMC?




1.	Rich Redelfs, Venture Partner, Foundation Capital Ex-CEO of Atheros 

Rich joined Foundation Capital after 20+ years in networking and
communications, a combination of start-up entrepreneurial as well as large
company intrapreneurial experience. Most recently, he was president and CEO
of Atheros Communications (NASDAQ: ATHR) which he joined as a start-up with
21 engineers and an office manager. He built the company into the leading
provider of Wi-Fi wireless semiconductors. Rich has an MBA from Harvard
Business School and a BSIE from Purdue.

2.	Markus Lutz, COO and Executive VP, SiTime 

Mr. Lutz is the initial inventor of InChipMEMS technology, which allows
vacuum-sealed MEMS structures to be manufactured in ultra-pure wafer
cavities with integrated CMOS and shipped in low-cost industry standard
packages. SiTime is using this key intellectual property to bring to market
the lowest cost, high performance resonators and oscillators, which are
1/8th the size of leading-edge competitive timing devices. Mr. Lutz received
his Diplom Ingenieur Elektrotechnik at the Technical University of Munich in
1992. He started his career at Robert Bosch GmbH in Reutlingen, Germany,
where over 4 years he invented and managed the development of Bosch's first
silicon based MEMS gyroscope, now a $200M/year business. Markus holds 35
patents, authored and co-authored 14 publications.

3.	Marco Zuniga, Vice President of IC Technology and Process
Development, Volterra 

Marco Zuniga co-founded Volterra and has been Volterras Vice President of
IC Technology and Process Development since July 2004. Dr. Zuniga holds a
B.S.E.E. from the University of Texas at Austin, and an M.S.E.E. and Ph.D.
in electrical engineering from the University of California at Berkeley.

4.	Michael Buehler-Garcia, Managing Director, Alanza Technologies 

Alanza Technologies is a consulting company for semiconductor markets.
Michael has worked throughout the semiconductor industry; as an executive at
multinational corporations such as Chartered Semiconductor, Cadence Design
Systems, and Motorola; in addition to working at emerging companies such as
PDF Solutions and iRoC Technologies, one of the leaders in soft error

5.	Dipak Shah, VP of Engineering, Xambala 

A seasoned entrepreneur and industry veteran with 24+ years of engineering,
design, development and general management experience for networking and
telecom semiconductor components including high performance switch fabric
chip sets, ATM SARs, Mutiport Ethernet switch chip sets and Ethernet PHY
products. He was previously founder and CEO of PetaSwitch, a Switch Fabrics
solutions startup. He held various senior management positions at HotRail
which was subsequently acquired by Connexant and Silicon Dynamics. He holds
BSEE, MSEE degrees and multiple patents for various data communication


Arati Prabhakar, Partner, USVP 

Arati Prabhakar joined U.S. Venture Partners in 2001 after 15 years of
working with world-class engineers and scientists across many fields to brew
new technologies. At USVP, her focus is fabless semiconductor and
semiconductor manufacturing opportunities. She serves on the boards of
Leadis Technology (NASDAQ: LDIS), Kleer, SiBeam, Pivotal Systems,
Arradiance, and Kilopass. Arati was a program manager and then director of
the Microelectronics Technology Office at DARPA from 1986 to 1993. In 1993,
President Clinton appointed Arati Director of the National Institute of
Standards and Technology, where she led the 3,000 person staff until 1997.
Arati then joined Raychem as Senior Vice President and Chief Technology
Officer. Arati serves on advisory committees for Stanford, Berkeley,
Caltech, and UC Santa Barbara. She is a Fellow of the IEEE. Arati received
her B.S. in Electrical Engineering from Texas Tech University. She received
an M.S. in Electrical Engineering and a Ph.D. in Applied Physics from the
California Institute of Technology.

About the Event Series:

The MIT Semiconductor Entrepreneurship Series is a resource for those
interested in founding, funding and growing new ventures in the area of
semiconductor design and manufacturing. The series provides: 
   - a venue for networking amongst entrepreneurs and other interested
   - opportunities for entrepreneurs to meet leaders in the industry and
learn from their experiences 
   - perspectives from analysts and investors regarding opportunities for
starting new ventures  

Events are normally held at 7pm on the second Thursday of the month at
Cooley Godward in Palo Alto, and feature a refreshments and networking
session, followed by a panel discussion or keynote presentation. The series
is open to the public. 

Since its founding in 2002, the Semiconductor Entrepreneurship Series has
attracted a growing community of attendees drawn from semiconductor design
and manufacturing, including independent entrepreneurs and consultants to
the industry, as well as legal, investment, and market research
professionals.  To see descriptions of recent events, please visit:

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