Seminar by K. Stokbro on nanoscale electronic devices 12/13 4:15PM

Eric Darve darve at
Mon Dec 3 10:02:19 PST 2007


Kurt Stokbro will be giving a talk in EDUC128 at 4:15PM on modeling
the electronic properties of nanoscale devices. Refreshments will be
served at 4PM.

Dr Kurt Stokbro, born 1965, is an educated physicist, co founder and
CEO of Atomistix Inc. He has previously held positions at the
Technical University of Denmark and Copenhagen University, where he
has coordinated a number of EU and Danish-funded R&D projects. Dr.
Stokbro has published more than 50 papers and review articles in
international journals, held a large number of lectures as invited
speaker and has organized 3 international conferences in nanoscience.
Dr Stokbro is external adviser to the International Research
Committee(IRC) in Nanotechnology at University of Cambridge, the
Center for Computational Atomic-scale Materials Design(CAMD) at the
Technical University of Denmark and member of the modeling sector of
the International Technology Roadmap for Semiconductors (ITRS). The
scheme for ab initio calculations of quantum transport, developed by
Dr. Stokbro and co-workers, has become the de facto standard for
electron transport calculations and has laid the foundation for
Atomistix A/S.

Kurt is staying at Stanford until the end of the quarter so feel free
to email him if you wish to meet with him.

Where: EDUC128
When: 12/13 4:15PM-5:30PM

Speaker: Kurt Stokbro
Department of Computer Science, University of Copenhagen (DIKU)
Universitetsparken 1, 2100 Copenhagen, Denmark

Title: First principles modeling of the electrical properties of
nanoscale devices

Abstract: The minimum feature size of electronic devices is
approaching the atomic scale and at this scale the quantum nature of
electrons start to alter the device behavior in new ways. The new
effects requires modifications of the device geometries and
introduction of new device materials and I will in my introduction
give a brief overview of some of the most recent developments in the
semiconductor industry and what can be anticipated in the future.

For successful introduction of the new technologies it is important
with reliable modeling tools that allow for testing and optimizing the
new materials and device geometries. However, many of the atomic-scale
effects are not included in the current modeling tools used in the
semi-conductor industry and as member of the International Technology
Roadmap for the Semiconductors (ITRS - I have
been involved in putting forward a list of modeling challenges that
must be addressed in order to model semiconductor devices below the
32 nm node.

In this talk I will discuss my research in the field of quantum
transport based on Density Functional Theory within the Non
Equilibrium Greens Function formalism, NEGF-DFT and how this
methodology can be used to address the challenges in the ITRS roadmap.
The methodology has so far been applied to new emerging device
geometries based on carbon nanotubes, 1-D graphene sheets, molecules,
atomic wires, or magnetic materials and I will present results from
these studies.

These emerging devices are still rather exotic and are expected to
enter the market more that 10 years out in the future. In order make
the tools able to model more traditional semiconductor device
geometries and thereby address more near time challenges in the
semiconductor industry, it is necessary to develop new more efficient
and highly parallel algorithms that can treat systems with many
thousand atoms. In the Nanopar ( project at
Copenhagen University we are looking into new algorithms that give
O(N) scaling of computational time with system size and which speed-up
state of the art algorithms by orders of magnitude. I will present
the most recent results in this project and discuss our future path
towards enabling large scale device simulations comprising millions of

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