Post-CMOS processing of a state-of-the-art CMOS chip
sher at slac.stanford.edu
Fri Jan 26 17:44:42 PST 2007
Members of Pierre Jarron's group at CERN have deposited amorphous silicon on top of chips in an attempt to make radiation sensors.
From: closega at gmail.com on behalf of Gael Close
Sent: Fri 1/26/2007 4:40 PM
To: labmembers at snf.stanford.edu
Subject: Post-CMOS processing of a state-of-the-art CMOS chip
Dear lab members,
I would like to know if anyone has some experience in the fabrication
of micro-structures on top of a state-of-the-art CMOS chip from a
Specifically, has anyone ever contacted a post-frabricated
devices/wires to a underlying CMOS circuitry.
I have browsed the litterature, and it seems to be rather common in
the MEMS community. It would be very helpful if one of you is willing
to share his/her experiences.
Center for Integrated Systems, CISX-300
Stanford University, California
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