Post-CMOS processing of a state-of-the-art CMOS chip

[Parker, Sherwood]

Members of Pierre Jarron's group at CERN have deposited amorphous silicon on top of chips in an attempt to make radiation sensors.
 
Sherwood Parker

________________________________

From: closega at gmail.com on behalf of Gael Close
Sent: Fri 1/26/2007 4:40 PM
To: labmembers at snf.stanford.edu
Subject: Post-CMOS processing of a state-of-the-art CMOS chip



Dear lab members,

I would like to know if anyone has some experience in the fabrication
of micro-structures on top of a state-of-the-art CMOS chip from a
foundry.

Specifically, has anyone ever contacted a post-frabricated
devices/wires to a underlying CMOS  circuitry.

I have browsed the litterature, and it seems to be rather common in
the MEMS community. It would be very helpful if one of you is willing
to share his/her experiences.

Thank you,
-Gael

--
Gael Close
PhD Candidate
Center for Integrated Systems, CISX-300
Stanford University, California
+1-650-450-3567