thermal oxide coverage in deep vias

Steve Zhuang xzhuang at
Fri Mar 9 21:35:22 PST 2007

Dear lab members,

I have a question regarding thermal oxidation coverage in deep vias.  I have
20-um diameter, 300-um deep vias on a 400-um thick silicon wafer.  Now when
I do wet oxidation and grow 1-um thick oxide on the wafer surface, will the
oxide coverage be uniform even at the bottom of the vias?  I know for
through-wafer vias the thermal oxide coverage is good.  But now my vias are
not all the way through the wafer.  Anyone had such experience?


Steve Zhuang
Khuri-Yakub Group

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