Reminder: Ph.D. Dissertation Defense (Tomorrow, 10am, Packard 101) -- Ching-Huang Lu

Ching-Huang Lu ratiug at stanford.edu
Mon Mar 19 14:30:38 PDT 2007



" Bilayer Metal Gate Electrodes with Tunable Work Function: Behavior, Mechanism, and Device Characteristics"

 

Ching-Huang Lu

Department of Materials Science and Engineering

Advisor: Prof. Yoshio Nishi

 

 

Date:  Tuesday, March 20th, 2007

Time: 10AM (Refreshments served at 09:45 AM)

Place: Packard 101





Abstract:

 

            To eliminate poly depletion and to reduce gate leakage current, metal gate/high-k dielectric structures are needed for future CMOS technology.  However, it is challenging to engineer the work function of metal gate electrodes and to integrate them with high-k dielectrics.  A metal bilayer structure has the ability to adjust the gate work function by varying the bottom layer thickness.  In this work, I will discuss this unique work function behavior, investigate the possible mechanisms, and apply this structure to MOSFET devices with high-k dielectrics.

 

           The work function of bilayer metal gates exhibits a gradual transition of the work function as the bottom layer thickness increases from 0 to 6-10nm.  With properly selected metal pairs, bilayer metal gates are capable of tuning the work function across the entire Si band edge.  The work function tuning behavior is seen for many metal systems and on both SiO2 and high-k dielectrics.

  

Several possible mechanisms for the work function behavior were investigated, including carrier redistribution, non-uniform thin film deposition, and thermally-activated metal/metal reaction and interdiffusion. Compositional and the electrical analysis of gate stacks were performed to understand the work function behavior before and after annealing.  The results point to a diffusion mechanism that saturates after an initial annealing. 

 

            Besides the ability to tune the work function, the thin bottom layers can act as buffer/etch-stop layers. In contrast to the traditional dual metal gate process, gate dielectrics can be protected from possible damage or contamination by employing selective etching of one top metal layer from the thin bottom metal layer. This integration scheme was demonstrated to achieve dual work function metal gates on high-k dielectrics by utilizing bilayer metal electrodes and a selective metal wet etch process.  Furthermore, gate-last MOSFETs with bilayer metal gate were fabricated to investigate device characteristics including the threshold voltage controllability and the mobility behavior.
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