Raymond Woo Ph.D. Defense (Mon Dec. 8, 1pm, Packard 202)

Raymond Woo rwoo at stanford.edu
Tue Dec 2 11:20:34 PST 2008

Come for the food, stay for the free live entertainment.

Band-to-Band Tunneling Transistors for Low Power Logic Applications

University Oral Examination
Raymond Woo
Department of Electrical Engineering
Stanford University
Advisor: James D. Plummer

Date: Monday, December 8, 2008
Time: 1pm (Refreshments served at 12:45pm)
Location: Packard Room 202


As MOSFET gate lengths are scaled below 45nm, fundamental physical 
limitations are for the first time presenting barriers to further 
scaling. Among the most important of these barriers is the ‘kT/q’ 
limitation which, due to the thermal distribution of carriers, limits 
the rate at which a MOSFET can be turned on or off with respect to 
applied gate voltage. This means that as supply voltages are reduced, 
leakage power is increasing exponentially.

This presentation first provides a review of the MOSFET leakage power 
problem as well as a systematic study of all of the possible ways to 
overcome the ‘kT/q’ limitation. Next, I focus on a specific novel 
device, the Band-to-Band Tunneling (BTBT) transistor, which has the 
potential to beat the ‘kT/q’ limit. Simulation and experimental studies 
will be presented that provide a thorough understanding of BTBT devices 
and their scaling properties. The use of different channel materials and 
device structures are examined to explore the design space of BTBT 
transistors and to gain insight into the practical prospects for these 
devices to outperform MOSFETs.

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