Reminder: Ph.D. Oral Examination- Jeong-Hee Ha - Feb.7th,2PM

[Jeong-Hee Ha]

"ATOMIC SCALE EXPERIMENTAL AND THEORETICAL STUDIES OF HIGH-K GATE  
DIELECTRIC INTERFACES"

Jeong-Hee Ha
Department of Materials Science and Engineering

Advisor: Prof. Paul C. McInyre
Co-Advisor: Prof. Kyeongjae (KJ) Cho

Thursday, February 7th, 2008
2:00 PM (Refreshments served at 1:45 PM)
Packard Bldg. Rm 202
?????? For several decades, silicon semiconductor devices have been  
dramatically scaled down to sub-100 nm MOSFET channel lengths in order  
to achieve higher device density and performance. In this regime,  
high-k dielectrics which can give large gate capacitances with  
dielectric films that are physically thicker than corresponding  
silicon oxide or oxynitride gate dielectrics are needed to reduce the  
substantial gate leakage current resulting from direct quantum  
mechanical tunneling across the dielectric layer.

???? Recently research and development on materials selection for  
alternative gate stack has converged on HfO2 based high-k oxides  
(HfO2, HfSiO4, or HfSiON). In 2007, Intel and IBM also announced their  
plan to introduce Hf-based high-k for their 45nm production. In  
general, those high-k oxides are deposited in a process which results  
in controlled formation of an ultra-thin SiO2-like passivation layer  
on the Si (100) surface. This SiO2-based interface layer provides the  
advantages of relatively low defect density afforded by the Si/SiO2  
interface. However, defects at the internal dielectric interface  
between HfO2 and SiO2 may produce fixed charge and threshold voltage  
instability under bias. In this talk, careful analysis is presented to  
elucidate intrinsic properties of this HfO2/SiO2 interface and to gain  
knowledge of possible solutions for problems associated with interface  
defects.

???? The first part of the presentation contains the results of a  
phase separation study of initially-intermixed HfO2/SiO2 interfaces by  
in-situ low angle x-ray scattering technique. Due to the positive heat  
of mixing (?Hmix>0), the initially-intermixed HfO2/SiO2 interface  
experiences phase separation upon high temperature annealing up to  
750˚C, which results in a sharper interface. The extracted activation  
enthalpy for phase separation was 2.06 ± 0.15 eV. Considering the  
thermal budget of typical CMOS processes, the HfO2/SiO2 interface will  
encounter this phenomenon during device fabrication. The second part  
of the talk summarizes the results of density functional theory (DFT)  
simulations performed on atomistic models of the HfO2/SiO2 interface.  
The simulations show that the HfO2/SiO2 interface introduces occupied  
midgap states within the band gap. This is a result of  
undercoordinated Hf atoms at the interface, and the mid gap states  
provide a source of positive fixed charge when non-bonding electrons  
on the interface Hf atoms are depleted by Fermi level change. Possible  
remedies of Vfb/Vth shifts by chemical passivation of the HfO2-SiO2  
interface are suggested based on these simulations. Finally, a study  
of oxygen transfer from metal gate into high-k dielectrics is  
presented. Because alternative metal gates are being developed along  
with high-k dielectrics, how the HfO2/SiO2 interface will be affected  
by the presence of the metal gate layer is an important issue.  
Experimental studies of oxygen transfer from W metal gates to the  
dielectric stack upon high-temperature annealing is provided using  
transmission electron microsopy (TEM), Fourier transform infrared  
spectroscopy (FTIR), synchrotron radiation photoemission spectroscopy  
(SR-PES), and current-voltage (CV) measurements.???
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://snf.stanford.edu/pipermail/labmembers/attachments/20080205/7379c56a/attachment.html>