From tberg at stanford.edu Tue Jul 1 06:42:20 2008 From: tberg at stanford.edu (Ted Berg) Date: Tue, 01 Jul 2008 06:42:20 -0700 Subject: LTO Upgrade Message-ID: <486A343C.5030004@stanford.edu> Hello All, As part of the effort to continually improve the. lab, LTO/BPSG will be giong down in approximately 3 weeks for a gas jungle retrofit. This will bring the gas delivery system close to current technology. It will also make the system more maintainable. At this point the furnace will be down for approximately 3 weeks ( for retrofit as well as process qual/characterization). Please try and complete any work that needs this tool by this time. If you have any serious conflicts please advise one of the staff ASAP. Thanks for your cooperation in advance. Ted From karnold at berkeley.edu Tue Jul 1 08:48:37 2008 From: karnold at berkeley.edu (Kam Arnold) Date: Tue, 1 Jul 2008 08:48:37 -0700 Subject: Looking for advice on wafer bonding In-Reply-To: <20080701064018.23255.qmail@server266.com> References: <20080701064018.23255.qmail@server266.com> Message-ID: Direct silicon-silicon fusion bonding is quite strong (can be stronger than the silicon itself, if wafers are clean, etc.) It is a high timperature process, though, and highly degraded by particles. The standard Berkeley fusion bonding process is described here: http://microlab.berkeley.edu/labmanual/chap1/1.3.html#MOD36 A colleague, Erik Shirokoff, has done a lot of wafer bonding research. He is currently using spun-on BCB, I believe. -Kam On Mon, Jun 30, 2008 at 11:40 PM, ben.jian wrote: > Dear labmembers, > > I have been doing silicon-silicon wafer bonding for years using gold-silicon > eutectic bonding. While this is a reasonable wafer bonding method, it > leaves much to be desired. Briefly, the bond is not very strong - > frequently even ultrasonic cleaning can break the bonded chip stack. > > I am looking for a better silicon-silicon wafer bonding process. Factors to > consider include process simplicity, bonding yield/strength, tolerance to > dust particle, etc. If every step can be performed at SNF, it would be > always better. A lower temperature process is desirable. > > Your kind advice is greatly appreciated. > > Ben Jian > > -- Kam Arnold Graduate Student Researcher UC Berkeley Physics Department 351 LeConte Hall Berkeley, CA 94720-7300 Office: 1 510 643 8161 Fax: 1 510 643 5204 From mtang at stanford.edu Tue Jul 1 17:27:39 2008 From: mtang at stanford.edu (Mary Tang) Date: Tue, 01 Jul 2008 17:27:39 -0700 Subject: Venture Clinic, Thursday, 7/10, 2 pm, CIS 101 Message-ID: <486ACB7B.70600@stanford.edu> Dear Labmembers: With deepest apologies for the mixup last time, we're please to another visit with Shahin Farschi: Are you thinking about starting a company to commercialize your research? Shahin Farschi, an Associate from Lux Capital, will be moderating a Venture Clinic. This will be Thursday, July 10, at 2 pm in CIS 101. The aim of the clinic is to provide an informal forum for researchers interested in brainstorming with a venture capitalist on ways to commercialize research. Technical discussions should be limited to what has been already disclosed or published. For more information, contact: Shahin Farshchi, Ph.D. Associate Lux Capital Management, LLC T: 925.323.2784 http://www.luxcapital.com -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From jkoma at stanford.edu Wed Jul 2 18:50:27 2008 From: jkoma at stanford.edu (Jason David Komadina) Date: Wed, 02 Jul 2008 18:50:27 -0700 Subject: copy toner in KOH? Message-ID: <20080702185027.nzi47bexhc08c0k8@webmail.stanford.edu> This may be an odd request, does anyone know if the Press-n-Peel method (www.techniks.com) resists a KOH bath? Thanks, Jason From ytanster at gmail.com Sat Jul 5 17:06:25 2008 From: ytanster at gmail.com (Mike Tan) Date: Sat, 5 Jul 2008 17:06:25 -0700 Subject: SU-8 Message-ID: <249e3dc70807051706l65460198i2cebe063573f844d@mail.gmail.com> Dear Labmembers, I am trying a new product from microchem, the SU-8 3000, but it always create several large bubbles on my wafer regardless of how I cleaned the surface. I am considering switching to either SU-8 2015, 2025, or 2035, but I would like to try it out before buying a whole bottle of it. Would anyone let me try out a small amount of either one of the SU-8(s) for single wafer usage? Thank you very much for your consideration. Mike -------------- next part -------------- An HTML attachment was scrubbed... URL: From rameshgopalan at yahoo.com Sun Jul 6 09:27:30 2008 From: rameshgopalan at yahoo.com (Ramesh Gopalan) Date: Sun, 6 Jul 2008 09:27:30 -0700 (PDT) Subject: Wet-etch of Ti Message-ID: <169220.72639.qm@web32703.mail.mud.yahoo.com> Hello: ?????????? I am trying to wet-etch off about 0.1-0.5um of Titanium deposited on Si substrate wafer - with Kapton (a polyimide, Teflon-like chemically resistant film) masking off areas that I dont want etched off. ??? Any suggestions on which chemistry/ bench ?I should use to etch Ti (I dont think the wbenches have the combination 10H2O:1H2O2:1H2SO4 - that is often suggested) - mix my own? thanks for any suggestions, Ramesh Gopalan (rgopalan) -------------- next part -------------- An HTML attachment was scrubbed... URL: From liuzh at stanford.edu Mon Jul 7 17:24:19 2008 From: liuzh at stanford.edu (Zihong (Bill) Liu) Date: Mon, 7 Jul 2008 20:24:19 -0400 Subject: Seminar: Organic semiconductors for flexible electronics Message-ID: <200807080024.m680OIe9012373@smtp-roam.Stanford.EDU> Organic semiconductors for flexible electronics July 11, 1:30-2:30 CISX-Auditorium Henning Sirringhaus Professor, Cambridge University, UK Chief Scientist, PlasticLogic Conjugated polymer semiconductors offer new opportunities for the controlled manufacturing of active electronic circuits by a combination of solution processing and direct printing. We will review current understanding of their device physics with a particular emphasis on understanding the electronic structure of polymer heterointerfaces governing the device performance. Recent advances include realization of ambipolar organic transistors which allow easy integration of information processing and light-emission functions. We will also review recent progress towards manufacturing of organic transistor circuits by high-resolution printing techniques for applications in displays and low-cost intelligent labels. Henning Sirringhaus is the Hitachi Professor of Electron Device Physics at the Cavendish Laboratory. He has been working in the field of organic transistor devices since 1997. He has an undergraduate and PhD degree in physics from ETH Z?rich (CH). From 1995-1996 he worked as a postdoctoral research fellow at Princeton University (USA) on a-Si TFTs for active-matrix liquid crystal displays. He is co-founder and Chief Scientist of Plastic Logic Ltd., a technology start-up company commercialising printed organic transistor technology. He was awarded the Mullard award of the Royal Society in 2003. His scientific interests include the charge transport physics of molecular, and polymeric semiconductors, the development of printing-based nanopatterning techniques, and the use of scanning probe techniques for electrical characterization of functional nanostructures. -------------- next part -------------- An HTML attachment was scrubbed... URL: From erichall at stanford.edu Mon Jul 7 22:29:08 2008 From: erichall at stanford.edu (Eric Hall) Date: Mon, 7 Jul 2008 22:29:08 -0700 Subject: Missing Bottle of SU-8 2035 Message-ID: <605b98f60807072229u76d0c7a2u78442060470089f4@mail.gmail.com> My lab keeps a bottle of SU-8 2035 in the personal chemicals storage bin in the flammables cabinet, registered to me (Eric Hall). Today I discovered that the bottle had disappeared. I checked around the photolithography area and could not locate it. It was last accounted for on Thursday night, when one of my labmates placed it back in the cabinet. I do not have a problem with someone using small amounts of our personal chemicals if they ask. However, I do not like the fact that someone has not only used this chemical without asking, but also didn't see fit to return it to its proper location. If you know anything about this, please let me know. Thank you. Eric -------------- next part -------------- An HTML attachment was scrubbed... URL: From kimsangb at stanford.edu Mon Jul 7 22:53:03 2008 From: kimsangb at stanford.edu (SangBum Kim) Date: Mon, 7 Jul 2008 22:53:03 -0700 Subject: Firmware and bios update for 81104A pulse generator Message-ID: <000e01c8e0be$e33b46e0$a9b50c80@sangbumhome> Dear labmembers, I am trying to update firmware and bios for Agilent (or HP) 81104A. It turns out I need "2MB SRAM PCMCIA memory card (Agilent p/n 1819-0083 and p/n 0950-3380 or equivalent)" to update, which is quite expensive. Can I borrow it if anyone has one? I need it only once to update the firmware and bios. Thanks, SangBum -------------- next part -------------- An HTML attachment was scrubbed... URL: From hnguyen0 at stanford.edu Tue Jul 8 08:18:37 2008 From: hnguyen0 at stanford.edu (Houbi Nguyen) Date: Tue, 8 Jul 2008 08:18:37 -0700 Subject: Oxide etching Message-ID: <818455CE-8851-440F-90F6-6AA47CF4F619@stanford.edu> Hello everyone. I have a question regarding native oxide etching. Does anyone know of a method by which I can strip off native oxide (i.e., for a pre-diffusion cleaning) without using a fluorine- containing mixture, specifically HF? Thanks for the help. Houbi -------------- next part -------------- An HTML attachment was scrubbed... URL: From tberg at stanford.edu Tue Jul 8 12:30:37 2008 From: tberg at stanford.edu (Ted Berg) Date: Tue, 08 Jul 2008 12:30:37 -0700 Subject: LTO going down JULY 21 Message-ID: <4873C05D.7020704@stanford.edu> Hello All, It is semi-official LTO will be going down on Monday the 21st of July for the retrofit. The plan is for about 2weeks of downtime assuming no glitches. Please plan accordingly and allow a week or so for possible glitches. Thanks in advance for your cooperation. ted From mtang at stanford.edu Tue Jul 8 12:45:44 2008 From: mtang at stanford.edu (Mary Tang) Date: Tue, 08 Jul 2008 12:45:44 -0700 Subject: Maskmaking questions? Get answers, today at 2 pm Message-ID: <4873C3E8.8080207@stanford.edu> Hi all -- Bill Martin, our itinerate maskmaking expert, will be dropping by at 2 pm today. If you have any maskmaking questions, he'll be available to answer them. We'll be in the cubicle area by CIS 41. M -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From mtang at stanford.edu Thu Jul 10 09:00:20 2008 From: mtang at stanford.edu (Mary Tang) Date: Thu, 10 Jul 2008 09:00:20 -0700 Subject: Reminder: Today -- Venture Clinic, Thursday, 7/10, 2 pm, CIS 101 Message-ID: <48763214.2080709@stanford.edu> Are you thinking about starting a company to commercialize your research? Shahin Farschi, an Associate from Lux Capital, will be moderating a Venture Clinic. This will be Thursday, July 10, at 2 pm in CIS 101. The aim of the clinic is to provide an informal forum for researchers interested in brainstorming with a venture capitalist on ways to commercialize research. Technical discussions should be limited to what has been already disclosed or published. For more information, contact: Shahin Farshchi, Ph.D. Associate Lux Capital Management, LLC T: 925.323.2784 http://www.luxcapital.com From goldhab at stanford.edu Thu Jul 10 13:23:28 2008 From: goldhab at stanford.edu (goldhab at stanford.edu) Date: Thu, 10 Jul 2008 13:23:28 -0700 Subject: Career Opportunity: Associate Director of Stanford Nano Center Message-ID: <20080710132328.jlo224sqskscg8gs@webmail.stanford.edu> Dear colleagues, As the Deputy Director of Stanford's Center for Probing the Nanoscale, an NSF-funded Nanoscale Science and Engineering Center (NSEC), I would like to bring to your attention an opening for Associate Director of our Center. We are seeking a full-time Associate Director for the new Center for Probing the Nanoscale (CPN), an NSF-funded Nanoscale Science and Engineering Center (NSEC). The Associate Director will evolve, direct, and evaluate CPN's educational and industrial programs and partnerships; manage the day-to-day educational and outreach activities of the Center; monitor scientific operations; and work with Center PIs on stewardship of the core grant and on seeking new funding opportunities. The Associate Director will be one of two full-time staff members and, along with the Program Administrator/Financial Analyst, will be responsible for monitoring operations and will report to the Director. The successful candidate will be able to explain concepts in physical science to both nonexperts and experts, and will have, or be interested in acquiring, knowledge of nanoscale science and technology. A PhD in a science or engineering field is highly desired, but exceptional candidates with a Master's or Bachelor's will be considered. Experience with education at the K-12 or community college level is also highly desired, especially work on curriculum or assessment of educational programs. The successful candidate will help to set the directions and priorities of the Center. The position requires demonstrated outstanding communication and organizational skills; the ability to set priorities and enact them in a fluid and fast-paced environment; and, above all, a passion to facilitate learning and share the joy of science and technology. To apply, please go to the Stanford Careers website, http://jobs.stanford.edu, and search for position # 31176, where you can find a somewhat more detailed description of the Associate Director position (just posted today, July 10, 2008). You will be asked to submit a CV and cover letter. In your letter, please indicate how you heard about this position. If you have questions, please contact Laraine Lietz-Lucas, Program Administrator of CPN, at lietz at stanford.edu. We will begin screening applications July 21st, and will continue until we have filled the position. While we are eager to get an Associate Director in place soon, we are even more keen to find an outstanding partner to work with for years to come. Best wishes, David ---------------------------------------------------------------------------- David Goldhaber-Gordon goldhaber-gordon at stanford.edu Assistant Professor of Physics davidg at post.harvard.edu Stanford University (permanent forwarding) www.goldhaber-gordon.com (650) 725-2047 (lab) (650) 724-3709 (office) Address for letters or packages: Administrative Associate: David Goldhaber-Gordon Roberta Edwards Geballe Laboratory for Advanced Materials McCullough, Rm. 338 McCullough Building, Room 346 Phone: (650) 723-8028 476 Lomita Mall Fax: (650) 724-3681 Stanford, CA 94305-4045 email: redward at stanford.edu From liuzh at stanford.edu Thu Jul 10 20:20:38 2008 From: liuzh at stanford.edu (Zihong (Bill) Liu) Date: Thu, 10 Jul 2008 23:20:38 -0400 Subject: Reminder- Seminar: Organic semiconductors for flexible electronics Message-ID: <200807110320.m6B3KbXI010205@smtp-roam.Stanford.EDU> Organic semiconductors for flexible electronics July 11, 1:30-2:30 CISX-Auditorium Henning Sirringhaus Professor, Cambridge University, UK Chief Scientist, PlasticLogic Conjugated polymer semiconductors offer new opportunities for the controlled manufacturing of active electronic circuits by a combination of solution processing and direct printing. We will review current understanding of their device physics with a particular emphasis on understanding the electronic structure of polymer heterointerfaces governing the device performance. Recent advances include realization of ambipolar organic transistors which allow easy integration of information processing and light-emission functions. We will also review recent progress towards manufacturing of organic transistor circuits by high-resolution printing techniques for applications in displays and low-cost intelligent labels. Henning Sirringhaus is the Hitachi Professor of Electron Device Physics at the Cavendish Laboratory. He has been working in the field of organic transistor devices since 1997. He has an undergraduate and PhD degree in physics from ETH Z?rich (CH). From 1995-1996 he worked as a postdoctoral research fellow at Princeton University (USA) on a-Si TFTs for active-matrix liquid crystal displays. He is co-founder and Chief Scientist of Plastic Logic Ltd., a technology start-up company commercialising printed organic transistor technology. He was awarded the Mullard award of the Royal Society in 2003. His scientific interests include the charge transport physics of molecular, and polymeric semiconductors, the development of printing-based nanopatterning techniques, and the use of scanning probe techniques for electrical characterization of functional nanostructures. -------------- next part -------------- An HTML attachment was scrubbed... URL: From mtang at stanford.edu Fri Jul 11 18:13:21 2008 From: mtang at stanford.edu (Mary Tang) Date: Fri, 11 Jul 2008 18:13:21 -0700 Subject: Nanoimprint Presentation, Monday, July 14, 2 pm, CISX Auditorium Message-ID: <48780531.5060008@stanford.edu> Hi all -- Dr. Bo Pi, from Nanolithography Solutions, will be here to talk about his company's technology on Monday, July 14, at 2 pm in the CISX Auditorium. Nanolitho Solutions has licensed HP's nanoimprint technology and is looking for researchers to partner with. The system consists of a module that fits into a standard contact aligner, such as the ones at SNF. For more information about Nanolitho Solutions: http://www.eetimes.com/showArticle.jhtml;jsessionid=A2OEDSFKZN0OAQSNDLPCKHSCJUNN2JVN?articleID=199902421 -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From mzi9890 at yahoo.com Sat Jul 12 16:39:59 2008 From: mzi9890 at yahoo.com (Mohammed Islam) Date: Sat, 12 Jul 2008 16:39:59 -0700 (PDT) Subject: power glitch Message-ID: <283991.87125.qm@web83510.mail.sp1.yahoo.com> All, There was a power glitch at around 4:15pm Saturday. The following tools are effected: All Tylan furnaces All Dryteks STS2 Etcher Karlsuss1 MRC Pquest Metalica There may be more Mohammed -------------- next part -------------- An HTML attachment was scrubbed... URL: From jhpark9 at stanford.edu Sat Jul 12 16:50:11 2008 From: jhpark9 at stanford.edu (JinHong Park) Date: Sat, 12 Jul 2008 16:50:11 -0700 Subject: Problem "Power off" Message-ID: <20080712165011.48jv93ofeskg0sgs@webmail.stanford.edu> Hi all, Furnaces (tylan 1-12, but thermco is fine), epi (1 and 2), and RTA (Ag4100 and 4108) were suddenly turned off at around 4:30pm on Sat. Jin-Hong -- JinHong Park (Ph.D. Candidate) Department of Electrical Engineering, Stanford University Cubicle 45, B113, Center for Integrated Systems(CISX), 420 Via Palou, Stanford, California, 94305 From edmyers at stanford.edu Sat Jul 12 19:56:06 2008 From: edmyers at stanford.edu (Ed Myers) Date: Sat, 12 Jul 2008 19:56:06 -0700 Subject: SNF Power Glitch, 7-12-08 Message-ID: <6.2.5.6.2.20080712195149.0261fae0@stanford.edu> All, The fab is recovering from a short power glitch late this afternoon. Most of the tools have been restarted, but we are waiting on some of the metal deposition cryo's to recover and the ASML. In addition the burn box for the ASM epi and STS PECVD are still in fault. Please review comments in Coral before running any of the tools. The tool you want may be fine, waiting for recovery or down until further notice. Sorry for the interruption, SNF Staff From candacec at stanford.edu Sun Jul 13 11:44:24 2008 From: candacec at stanford.edu (Candace Chan) Date: Sun, 13 Jul 2008 11:44:24 -0700 Subject: TiSi2 Message-ID: <487A4D08.4060701@stanford.edu> Hi all, Does anyone have a process already developed for making TiS2 contacts to Si using a thin Ti film? If so, can you tell me what it is and what instruments you use? Thanks in advance, Candace -- Candace K. Chan Ph.D. Student, Department of Chemistry Stanford University McCullough Building Room 209 476 Lomita Mall Stanford, CA 94305 -------------- next part -------------- An HTML attachment was scrubbed... URL: From mtang at stanford.edu Mon Jul 14 11:32:12 2008 From: mtang at stanford.edu (Mary Tang) Date: Mon, 14 Jul 2008 11:32:12 -0700 Subject: SNF Process Clinic, Today, 2 pm Message-ID: <487B9BAC.60802@stanford.edu> Hi all -- SNF staff will be on hand today, from 2-4 pm, for the biweekly process clinic. Bring your process questions, runsheets, and mask layouts. Senior labmembers are also welcome to offer expertise. Your SNF Staff -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From jkoma at stanford.edu Mon Jul 14 17:27:46 2008 From: jkoma at stanford.edu (Jason Komadina) Date: Mon, 14 Jul 2008 17:27:46 -0700 Subject: alumina bonding to si wafer? Message-ID: <487BEF02.6090101@stanford.edu> Does anyone have suggestions for bonding anodized aluminum oxide to a silicon wafer? Sacrificial layer on either/both is okay. Thanks, Jason From englund at stanford.edu Tue Jul 15 10:38:07 2008 From: englund at stanford.edu (Dirk Englund) Date: Tue, 15 Jul 2008 10:38:07 -0700 Subject: OSA/SPIE Seminar: Dr. David Fattal / HP Labs, Tuesday July 22 4:00pm In-Reply-To: <7f014b6b0801201552u64574c4er5474931ed6f3f653@mail.gmail.com> References: <7f014b6b0801201552u64574c4er5474931ed6f3f653@mail.gmail.com> Message-ID: <905C43E9-18BE-4262-ABFD-3E8AA133AED9@stanford.edu> The OSA / SPIE Stanford Student Chapter presents: Dr. David Fattal HP Labs, Palo Alto Title: Plasmonic LED for 10GHz direct modulation bandwidth: design and experiment Tuesday, July 22, 2008 4:15pm, Ginzton building, AP 200 Refreshments at 4:00pm Abstract Vertical Cavity Surface Emitting Lasers (VCSELs) are the de-facto choice for optical communication links less than 300~m long. They are reliable, efficient and are capable of modulation at speeds that exceed 10~Gb/s, but they are often the most costly element in the link. As the need for optical links moves from the campus to the server rack and to the board, the cost of the optoelectronics has been one of the key factors preventing widespread adoption at these shorter distance scales. Light Emitting Diodes (LED), with their simple epitaxial growth and device structure, provide a reliable, inexpensive alternative to laser-based systems in short-haul links. The main drawback of LEDs is their limited modulation speed (<800~Mb/s for commercially available devices, 2~Gb/s for research devices). In an LED, carriers recombine by spontaneous emission, a usually slow (> ns) process. One way to increase the LED speed is to heavily p-dope the semiconductor material, insuring a high hole concentration and electron-hole recombination rate. This technique has its limits since dopants also act as non-radiative recombination centers which eventually degrade the light production efficiency. Here we propose a low-cost solution to increase the device speed while maintaining high efficiency: a tensily strained quantum well interacting with Surface Plasmon Polaritons of moderate strength at 800 nm. We will take a pedagological approach in explaining how to simulate the structure numerically, and will present initial experimental results. An LED of this kind has the potential to accelerate the penetration of short- haul optical interconnections in a number of applications. About our Speaker David Fattal is a staff scientist in the Quantum Research Science group at HP Labs in Palo Alto, California. He received his Ph.D. in Physics from Stanford university, where he worked on quantum information science in the group of Prof. Yoshihisa Yamamoto. He holds a BS in mathematical physics from Ecole Polytechnique (France). --++**==--++**==--++**==--++**==--++**==--++**==--++**== studentosa mailing list studentosa at lists.stanford.edu https://mailman.stanford.edu/mailman/listinfo/studentosa Dirk Englund Grad. Student - Appl. Physics - Stanford U. cvitae.org/englund/ -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: Fattal_2008_07_22.pdf Type: application/pdf Size: 702171 bytes Desc: not available URL: -------------- next part -------------- An HTML attachment was scrubbed... URL: From mahnaz at stanford.edu Wed Jul 16 11:20:34 2008 From: mahnaz at stanford.edu (Mahnaz Mansourpour) Date: Wed, 16 Jul 2008 11:20:34 -0700 Subject: Discontinuation of LDD26W Message-ID: <487E3BF2.1040305@stanford.edu> Hello all, The Environmental Protection Agency ( EPA) began regulating the use of *Perfluoroalkyl sulfonates * and more specific to us, perfluorooctyl sulfonates. What does all this mean? Roham & Hass ( Shipley) will not make or deliver any Ldd26W ( our developer) that we use with 3612 resist which contain this chemical by *January of 2009.* This means that December will be the last of the shipment of the developer. I like to switch even earlier if would be possible. I have started running experiment with other developers and that will take some time for me. I am running the process side by side and then do SEM and then repeat it one more time to prove that all is under control. *I have created a recipe #8 on SVGDEV2 for me please leave it alone so I do not have to program it every time. * I am trying to do this as efficiently and quickly as possible and share the information with you so you have enough time to confirm the change for yourself . I am sure that the change will most likely be transparent to your process. The dead line I have given my self would be till September and if all goes well then you will have enough time to confirm that for your self if you choose to. If you have concerns/suggestions or have some extra time that you can put toward community service, let Mary or I know and we will put that toward a good use. My apology for sending out duplicate emails. mahnaz From jcdoll at stanford.edu Wed Jul 16 15:54:33 2008 From: jcdoll at stanford.edu (Joey Doll) Date: Wed, 16 Jul 2008 15:54:33 -0700 Subject: Measuring Piezoelectric Coefficients Message-ID: <945664f50807161554re153ca4qfe431078d27d216e@mail.gmail.com> Hi All -Does anyone have experience measuring the piezoelectric coefficient of thin films? I'm working with aluminum nitride specifically, and am hopeful that someone has advice or a working setup on campus that I could try out before choosing a long term solution. Thanks! Joey -------------- next part -------------- An HTML attachment was scrubbed... URL: From mtang at stanford.edu Wed Jul 16 18:21:26 2008 From: mtang at stanford.edu (Mary Tang) Date: Wed, 16 Jul 2008 18:21:26 -0700 Subject: Meeting minutes posted Message-ID: <487E9E96.7090602@stanford.edu> Hi all -- For those of you who missed the last Labmembers' meeting, slides and info have been posted (link on the SNF home page.) Also, summaries of various quality circle meetings have been posted as well. The next Process Grand Rounds will be on Friday, July 25, at 11:30 am in CIS 101. The next Labmembers' Meeting will be on Friday, August 1, from 11-12 in the CISX Auditorium. Just a reminder: all labmembers are welcome to attend, participate, and contribute. Your SNF Staff -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From shimm at stanford.edu Wed Jul 16 23:25:45 2008 From: shimm at stanford.edu (Joon Shim) Date: Wed, 16 Jul 2008 23:25:45 -0700 Subject: Ph.D. Oral Examination- Joon Hyung Shim - July 23rd (Wed) @10am Message-ID: <2E40DC55E8024CD28D08BD0218E8AAA6@JoonPC> Nanoscale Thin Film Ceramic Fuel Cells Joon Hyung Shim Department of Mechanical Engineering Advisor: Fritz B. Prinz Wednesday, July 23rd, 2008 10:00AM (Refreshments served @9:45AM) MERL Conference Room (203) The ceramic fuel cell (CFC) refers to fuel cells employing solid state ceramic electrolytes, including two types of fuel cells: the solid oxide fuel cell (SOFC) and the proton-conducting oxide fuel cell (PCOFC). Ion conducting ceramics require high operation temperatures of about 700~1000?C for reasonably active charge transfer reactions at the electrode-electrolyte interface and ion transport through the electrolyte. This high operational temperature has limited CFC applications due to thermal instability of equipped devices. The goal of this study is to minimize Ohmic losses and activation losses at the electrolyte and electrode-electrolyte interface respectively by engineering CFC components to run fuel cells at reduced temperatures. As a method of engineering SOFC electrolytes, we proposed to fabricate ceramic membranes at the nanometer scale. We have successfully fabricated free-standing 60 nm yttria-stabilized zirconia (YSZ) films, the most common electrolyte material for SOFCs, using atomic layer deposition (ALD). In fuel cell tests with porous platinum electrodes, ALD YSZ showed a maximum power density of 270mW/cm2 at 350?C, which is a significant improvement from the expected performance estimated from reference values. We found that the performance enhancement originated from an increase in exchange current density at the electrode-electrolyte interface. An oxygen isotope (O18) experiment was used to trace oxide ion diffusion, and it was found that the oxygen-oxide ion exchange rate at the ALD YSZ surface was enhanced compared to the rate in bulk YSZ single crystals, while diffusivity in ALD YSZ films was found to be equal to that of bulk YSZ. This enhancement in the ALD YSZ films was also confirmed in O18 spatial mapping measured by nano-resolution secondary ion mass spectrometry (NanoSIMS). We have also studied nanoscale yttrium-doped barium zirconate (BYZ) electrolytes as electrolytes for PCOFCs. Thin BYZ films were grown epitaxially on MgO(100) single crystals using pulsed laser deposition (PLD), and conductivity was measured using electrochemical impedance spectroscopy (EIS). X-ray diffraction (XRD) and atomic force microscopy (AFM) data confirmed that BYZ becomes polycrystalline with the formation of grains that negatively affect proton conduction as it grows thicker, and grain growth decreases conductivity by 2~3 times. Freestanding 130nm thick PLD BYZ was tested as an electrolyte in a PCOFC with porous platinum electrodes. A maximum power density of 120mW/cm2 at 450?C was measured, which is lower than the expected performance based on reference data. This low performance is due to a low exchange current density rooted in low catalytic activity at cathodes. To solve this problem, we performed ALD of BYZ and found that ALD leads to improved quality of the BYZ surface, showing a higher exchange current density and exhibiting an improved maximum power density of 140mW/cm2 at 400?C. We also confirmed that ALD BYZ fuel cells can operate with methanol as a fuel. -------------- next part -------------- An HTML attachment was scrubbed... URL: From mbaran at stanford.edu Thu Jul 17 13:53:43 2008 From: mbaran at stanford.edu (Maureen Baran) Date: Thu, 17 Jul 2008 13:53:43 -0700 Subject: Cell Phone left in the Gowning Room Message-ID: <20080717205343.D80DF65ACD0@smtp2.stanford.edu> A cell phone was left in the gowning room a short time ago. If you are missing your phone please come by my cubicle (# 41) on the first floor and pick it up. Maureen Maureen Baran Stanford Nanofabrication Facility Lab Services Administrator mbaran at stanford.edu 650-725-3664 -------------- next part -------------- An HTML attachment was scrubbed... URL: From kathrynt at stanford.edu Thu Jul 17 15:03:20 2008 From: kathrynt at stanford.edu (Kathryn Todd) Date: Thu, 17 Jul 2008 15:03:20 -0700 Subject: copper etch Message-ID: <4070ecc80807171503k6c04df09mb538adc8febf08c9@mail.gmail.com> Hello, We are looking to try out a copper etchant before buying some ourselves. If you use any kind of copper etchant and have a few mL that you would be willing to give us, we would be very grateful. -Kathryn From dwlee at stanford.edu Fri Jul 18 09:22:36 2008 From: dwlee at stanford.edu (Dok Won Lee) Date: Fri, 18 Jul 2008 09:22:36 -0700 Subject: University Ph.D. Oral Examination - Dok Won Lee Message-ID: <20080718092236.6223u5oc8wkoo8co@webmail.stanford.edu> "Integrated Inductor with Magnetic Core: A Realistic Option" Dok Won Lee Department of Materials Science and Engineering Advisor: Prof. Shan X. Wang Friday, July 25th, 2008 9:00 AM (Refreshments served at 8:45 AM) CIS-X Auditorium Abstract: Nowadays cell phones and laptop computers are playing important roles in our everyday lives, and the demand for more portable electronic devices continues to increase rapidly. This is currently driving the integration or embedding of passive components, which would replace off-chip discrete modular assemblies. However, poor properties of integrated inductors have been a critical factor limiting the overall performance of radio-frequency (RF) circuits and hence the realization of system-on-a-chip (SoC) or system-in-package (SiP) circuits for portable electronics. Use of magnetic core with high permeability in the integrated inductor was proposed decades ago to significantly increase the inductance by the relative permeability of the magnetic material used. However, the inductance enhancements reported so far have been limited and not well explained. In addition, the use of magnetic core comes with the cost of introducing magnetic power losses. This needs to be well understood in order to make the magnetic inductor practical and useful. In this talk, I present the high performance integrated inductors using a solenoid design with a magnetic layer. A set of analytical models was developed to describe the device properties of integrated solenoid inductors. Using the models, design parameters were optimized to achieve a high inductance while maintaining the lateral device area < 1 mm^2 and the coil resistance < 1 ohm. The integrated inductors were fabricated on Si wafers using copper as the conductor layer and CoTaZr alloy as the magnetic core layer. A polyimide planarization process was developed as the preceding step for the magnetic core formation. The inductance of the fabricated inductor was as high as 70.2 nH measured at 10 MHz with DC resistance of 0.67 ohm and the device area of 0.88 mm^2. This is an enhancement by a factor of 34 from the air core inductor with the identical geometry, and the resulting inductance density was 80 nH/mm^2. By shrinking the lateral dimensions while maintaining the vertical dimensions unchanged, the inductance density further increased to 219 nH/mm^2 without affecting the coil resistance significantly. The measured device properties and the calculations using the analytical models show good agreements. The resistance of the magnetic inductor increased significantly with the frequency due to the introduction of magnetic power losses at high frequencies, and the frequency-dependent resistance and quality factor of the magnetic inductor were also in excellent agreement with the calculations. The device properties of the integrated magnetic inductors are well understood with the analytical models developed and can be further optimized for applications and frequency ranges of interest. The integrated magnetic inductors can now be reliably designed and fabricated for various applications, enabling the realization of the RF integrated electronics. -- Dok Won Lee, Ph.D candidate Materials Science and Engineering, Stanford University McCullough BLDG Rm.208, 476 Lomita Mall, Stanford, CA 94305-4045 Phone:650-723-4015 | Fax:650-736-1984 From yoonyoung.chung at stanford.edu Fri Jul 18 13:32:57 2008 From: yoonyoung.chung at stanford.edu (Yoonyoung Chung) Date: Fri, 18 Jul 2008 13:32:57 -0700 Subject: SiO2 sputtering Message-ID: <7dc35a890807181332y4c5aac53ha2445c58dca35d8a@mail.gmail.com> Dear labmembers, Is there anyone who did SiO2 sputtering before? I am developing my process for sputtered ~10 nm SiO2. I am concerning the roughness and density of the film. I would like to get advice if some labmembers have previous experience. Thanks. Yoonyoung -- Yoonyoung Chung Ph.D. Candidate Department of Electrical Engineering Stanford University Email: yoonyoung.chung at stanford.edu --------------------------------------------------------- Final judge is by Nature itself From dhkim81 at stanford.edu Fri Jul 18 18:02:34 2008 From: dhkim81 at stanford.edu (Donghyun Kim) Date: Fri, 18 Jul 2008 18:02:34 -0700 Subject: Donghyun Kim: Ph.D. Oral Defense Abstract Message-ID: <00b001c8e93b$20f26d40$f56440ab@donghyunoffice> PhD Thesis Oral Examination Candidate : Donghyun Kim Advisor: Prof. Krishna Saraswat Time : 9:15 am (Refreshments served at 9:00 am) Date : Thursday, July 24, 2008 Location : CISX-101 Auditorium http://campus-map.stanford.edu/index.cfm?ID=04-055 Title: Theoretical Performance Evaluations of NMOS Double Gate FETs with High Mobility Materials : Strained III-V, Ge and Si Abstract As Si CMOSFET technology scales down to nanometer scale, it becomes extremely difficult to keep the same drive current due to limitations of channel mobility (?), gate oxide scaling and parasitics. Currently, strained-Si is the dominant technology for high performance MOSFETs and increasing the strain provides a viable solution to scaling. However, looking into future nanoscale MOSFETs, it becomes important to look at novel channel materials such as strained SixGe(1-x) and strained III-Vs and new device structures. There are two fundamental problems with these candidates. First, the main advantage of small transport mass to have high injection velocity may be undermined by low density of states which reduces the inversion charge and hence reduces drive current. Second, due to their small effective masses and small band gap combined with high electric fields applied in nanometer-scale devices, large band to band tunneling (BTBT) leakage current is a big concern. To understand the physics and the performance limitation of nanoscale MOSFETs with high mobility channel materials, we have developed first, a new BTBT model which takes into account complete real and complex band structure, direct/phonon-assisted tunneling, and quantum confinement effect, second, a quantum transport simulator and third, a local pseudo-potential method (LPM) to calculate real and complex band structures of strained semiconductors. While the BTBT models in commercially available TCAD tools largely fail to predict accurate current even in silicon, our model is well matched to experimental results of PIN diodes fabricated on Si, Ge and GaAs, and heterostructure SiGe pMOSFETs. We have investigated and benchmarked Double-Gate (DG) n-MOSFETs with different channel materials (GaAs, InAs, InSb, Ge and Si). Our results show that with gate oxide thickness of 0.7 nm, small density of states (DOS) of these materials does not significantly limit the on-current (ION) and high ? materials still show higher ION than Si. However, the high ? small bandgap materials like InAs, InSb and Ge, suffer from excessive BTBT current and poor SCE, which limits their scalability. InP has significantly higher ION and shorter intrinsic delay at a reduced IOFF,BTBT when compared to Si. Strained (uniaxial and biaxial) InxGa1-x As may have a very good tradeoff between the excellent transport properties of InAs and the low leakage of GaAs. Full quantum ballistic simulations with new BTBT models based on the bandstructures calculated by LPM shows that at a l00nA/ ? m Ioff specification, 4% biaxial compressive strained In0.75Ga0.25As (111) NMOS DGFET outperforms other InGaAs compositions because of the excellent transport properties and reduced leakage current with strain engineering. The power dissipation in nanoscale-MOSFET becomes a huge concern. Reducing VDD is limited by fundamental 60mV/dec turn-off. Band-to Band Tunneling FET (zener mode TFET) is being investigated to overcome 60mV/dec sub-threshold slope, where the transport is dictated by tunneling through a source barrier (instead of diffusion over the barrier). We have experimentally demonstrated a DG, s-Ge, TFET exhibiting record Ion (240uA/um). We have developed a novel quantum transport TFET simulator and our simulations show that the lateral heterostructure is the most scalable approach to solving the ambipolar problem in TFETs. -------------- next part -------------- An HTML attachment was scrubbed... URL: From mtang at stanford.edu Tue Jul 22 09:10:52 2008 From: mtang at stanford.edu (Mary Tang) Date: Tue, 22 Jul 2008 09:10:52 -0700 Subject: Maskmaking Clinic, Tuesday, 7/22, 3-5 pm Message-ID: <4886068C.9090605@stanford.edu> Hi all -- Bill Martin, representing Compugraphics, will be here to answer your maskmaking questions. Bring your questions, bring your files. Bill will be here at 3 pm today. We'll meet in the cubicle area next to Maureen's office. Mary -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From englund at stanford.edu Tue Jul 22 09:37:39 2008 From: englund at stanford.edu (Dirk Englund) Date: Tue, 22 Jul 2008 09:37:39 -0700 Subject: Today @ 4pm: Plasmonic LED for 10GHz direct modulation bandwidth: David Fattal / HP Labs In-Reply-To: References: Message-ID: <4C74D3AB-225E-4223-A1B7-B4B65F2C9570@stanford.edu> Reminder - today's talk: The OSA / SPIE Stanford Student Chapter presents: Dr. David Fattal HP Labs, Palo Alto Title: Plasmonic LED for 10GHz direct modulation bandwidth: design and experiment Tuesday, July 22, 2008 4:15pm, Ginzton building, AP 200 Refreshments at 4:00pm Abstract Vertical Cavity Surface Emitting Lasers (VCSELs) are the de-facto choice for optical communication links less than 300~m long. They are reliable, efficient and are capable of modulation at speeds that exceed 10~Gb/s, but they are often the most costly element in the link. As the need for optical links moves from the campus to the server rack and to the board, the cost of the optoelectronics has been one of the key factors preventing widespread adoption at these shorter distance scales. Light Emitting Diodes (LED), with their simple epitaxial growth and device structure, provide a reliable, inexpensive alternative to laser-based systems in short-haul links. The main drawback of LEDs is their limited modulation speed (<800~Mb/s for commercially available devices, 2~Gb/s for research devices). In an LED, carriers recombine by spontaneous emission, a usually slow (> ns) process. One way to increase the LED speed is to heavily p-dope the semiconductor material, insuring a high hole concentration and electron-hole recombination rate. This technique has its limits since dopants also act as non-radiative recombination centers which eventually degrade the light production efficiency. Here we propose a low-cost solution to increase the device speed while maintaining high efficiency: a tensily strained quantum well interacting with Surface Plasmon Polaritons of moderate strength at 800 nm. We will take a pedagological approach in explaining how to simulate the structure numerically, and will present initial experimental results. An LED of this kind has the potential to accelerate the penetration of short- haul optical interconnections in a number of applications. About our Speaker David Fattal is a staff scientist in the Quantum Research Science group at HP Labs in Palo Alto, California. He received his Ph.D. in Physics from Stanford university, where he worked on quantum information science in the group of Prof. Yoshihisa Yamamoto. He holds a BS in mathematical physics from Ecole Polytechnique (France). -------------- next part -------------- An HTML attachment was scrubbed... URL: From shimm at stanford.edu Wed Jul 23 00:36:07 2008 From: shimm at stanford.edu (Joon Shim) Date: Wed, 23 Jul 2008 00:36:07 -0700 Subject: Reminder: Ph.D. Oral Examination- Joon Hyung Shim - July 23rd (Wed) @10am Message-ID: Nanoscale Thin Film Ceramic Fuel Cells Joon Hyung Shim Department of Mechanical Engineering Advisor: Fritz B. Prinz Wednesday, July 23rd, 2008 10:00AM (Refreshments served @9:45AM) MERL Conference Room (203) The ceramic fuel cell (CFC) refers to fuel cells employing solid state ceramic electrolytes, including two types of fuel cells: the solid oxide fuel cell (SOFC) and the proton-conducting oxide fuel cell (PCOFC). Ion conducting ceramics require high operation temperatures of about 700~1000?C for reasonably active charge transfer reactions at the electrode-electrolyte interface and ion transport through the electrolyte. This high operational temperature has limited CFC applications due to thermal instability of equipped devices. The goal of this study is to minimize Ohmic losses and activation losses at the electrolyte and electrode-electrolyte interface respectively by engineering CFC components to run fuel cells at reduced temperatures. As a method of engineering SOFC electrolytes, we proposed to fabricate ceramic membranes at the nanometer scale. We have successfully fabricated free-standing 60 nm yttria-stabilized zirconia (YSZ) films, the most common electrolyte material for SOFCs, using atomic layer deposition (ALD). In fuel cell tests with porous platinum electrodes, ALD YSZ showed a maximum power density of 270mW/cm2 at 350?C, which is a significant improvement from the expected performance estimated from reference values. We found that the performance enhancement originated from an increase in exchange current density at the electrode-electrolyte interface. An oxygen isotope (O18) experiment was used to trace oxide ion diffusion, and it was found that the oxygen-oxide ion exchange rate at the ALD YSZ surface was enhanced compared to the rate in bulk YSZ single crystals, while diffusivity in ALD YSZ films was found to be equal to that of bulk YSZ. This enhancement in the ALD YSZ films was also confirmed in O18 spatial mapping measured by nano-resolution secondary ion mass spectrometry (NanoSIMS). We have also studied nanoscale yttrium-doped barium zirconate (BYZ) electrolytes as electrolytes for PCOFCs. Thin BYZ films were grown epitaxially on MgO(100) single crystals using pulsed laser deposition (PLD), and conductivity was measured using electrochemical impedance spectroscopy (EIS). X-ray diffraction (XRD) and atomic force microscopy (AFM) data confirmed that BYZ becomes polycrystalline with the formation of grains that negatively affect proton conduction as it grows thicker, and grain growth decreases conductivity by 2~3 times. Freestanding 130nm thick PLD BYZ was tested as an electrolyte in a PCOFC with porous platinum electrodes. A maximum power density of 120mW/cm2 at 450?C was measured, which is lower than the expected performance based on reference data. This low performance is due to a low exchange current density rooted in low catalytic activity at cathodes. To solve this problem, we performed ALD of BYZ and found that ALD leads to improved quality of the BYZ surface, showing a higher exchange current density and exhibiting an improved maximum power density of 140mW/cm2 at 400?C. We also confirmed that ALD BYZ fuel cells can operate with methanol as a fuel. -------------- next part -------------- An HTML attachment was scrubbed... URL: From ahazeghi at stanford.edu Tue Jul 22 23:32:10 2008 From: ahazeghi at stanford.edu (Arash Hazeghi) Date: Tue, 22 Jul 2008 23:32:10 -0700 Subject: Free GUI software for processing SPM RAW images Message-ID: <20080722233210.dni8b2nn28scks0s@webmail.stanford.edu> Hi, I am looking for a free GUI software for Windows that can process SPM (AFM) RAW images, I have tried a couple so far but they had awkward interfaces and bugs. I'd appreciate your recommendations. Thanks, Arash From phani at stanford.edu Wed Jul 23 08:44:28 2008 From: phani at stanford.edu (Naga Phani Aetukuri) Date: Wed, 23 Jul 2008 08:44:28 -0700 Subject: Free GUI software for processing SPM RAW images In-Reply-To: <20080722233210.dni8b2nn28scks0s@webmail.stanford.edu> References: <20080722233210.dni8b2nn28scks0s@webmail.stanford.edu> Message-ID: <488751DC.3040108@stanford.edu> Hey, I use WSxM version 4.0 to process AFM and MFM images. I know version 2.2 is pretty good too. You might find them at www.nanotec.es. Hope that helps, Phani. Arash Hazeghi wrote: > Hi, > I am looking for a free GUI software for Windows that can process SPM > (AFM) RAW images, I have tried a couple so far but they had awkward > interfaces and bugs. I'd appreciate your recommendations. > > Thanks, > Arash > > > > From ndhuang at stanford.edu Wed Jul 23 16:02:14 2008 From: ndhuang at stanford.edu (ndhuang) Date: Wed, 23 Jul 2008 16:02:14 -0700 Subject: Au thin film stick onto Ti substrate Message-ID: <04ec01c8ed18$25b07b20$a7204f86@win.slac.stanford.edu> Dear labmember, I am looking for someway to adhere Au thin film(1um) to Ti substrate without any glue or tape. One way to do it is sputtering Ti to Au film which will be extremly time consuming since i need very thick Ti layer. Does anyone have experience with adhesion of Au to Ti substrate that I can borrow? All the best, Ningdong From dwlee at stanford.edu Thu Jul 24 08:43:36 2008 From: dwlee at stanford.edu (Dok Won Lee) Date: Thu, 24 Jul 2008 08:43:36 -0700 Subject: Reminder: University Ph.D. Oral Examination - Dok Won Lee Message-ID: <20080724084336.itilixe28s8840c8@webmail.stanford.edu> "Integrated Inductor with Magnetic Core: A Realistic Option" Dok Won Lee Department of Materials Science and Engineering Advisor: Prof. Shan X. Wang Tomorrow (Friday, July 25th, 2008) 9:00 AM (Refreshments served at 8:45 AM) CIS-X Auditorium (Rm. 101) Abstract: Nowadays cell phones and laptop computers are playing important roles in our everyday lives, and the demand for more portable electronic devices continues to increase rapidly. This is currently driving the integration or embedding of passive components, which would replace off-chip discrete modular assemblies. However, poor properties of integrated inductors have been a critical factor limiting the overall performance of radio-frequency (RF) circuits and hence the realization of system-on-a-chip (SoC) or system-in-package (SiP) circuits for portable electronics. Use of magnetic core with high permeability in the integrated inductor was proposed decades ago to significantly increase the inductance by the relative permeability of the magnetic material used. However, the inductance enhancements reported so far have been limited and not well explained. In addition, the use of magnetic core comes with the cost of introducing magnetic power losses. This needs to be well understood in order to make the magnetic inductor practical and useful. In this talk, I present the high performance integrated inductors using a solenoid design with a magnetic layer. A set of analytical models was developed to describe the device properties of integrated solenoid inductors. Using the models, design parameters were optimized to achieve a high inductance while maintaining the lateral device area < 1 mm^2 and the coil resistance < 1 ohm. The integrated inductors were fabricated on Si wafers using copper as the conductor layer and CoTaZr alloy as the magnetic core layer. A polyimide planarization process was developed as the preceding step for the magnetic core formation. The inductance of the fabricated inductor was as high as 70.2 nH measured at 10 MHz with DC resistance of 0.67 ohm and the device area of 0.88 mm^2. This is an enhancement by a factor of 34 from the air core inductor with the identical geometry, and the resulting inductance density was 80 nH/mm^2. By shrinking the lateral dimensions while maintaining the vertical dimensions unchanged, the inductance density further increased to 219 nH/mm^2 without affecting the coil resistance significantly. The measured device properties and the calculations using the analytical models show good agreements. The resistance of the magnetic inductor increased significantly with the frequency due to the introduction of magnetic power losses at high frequencies, and the frequency-dependent resistance and quality factor of the magnetic inductor were also in excellent agreement with the calculations. The device properties of the integrated magnetic inductors are well understood with the analytical models developed and can be further optimized for applications and frequency ranges of interest. The integrated magnetic inductors can now be reliably designed and fabricated for various applications, enabling the realization of the RF integrated electronics. -- Dok Won Lee, Ph.D candidate Materials Science and Engineering, Stanford University McCullough BLDG Rm.208, 476 Lomita Mall, Stanford, CA 94305-4045 Phone:650-723-4015 | Fax:650-736-1984 From mtang at stanford.edu Thu Jul 24 15:27:24 2008 From: mtang at stanford.edu (Mary Tang) Date: Thu, 24 Jul 2008 15:27:24 -0700 Subject: Missing stress quartz calibration standards Message-ID: <488901CC.6020303@stanford.edu> Dear labmembers -- Two 4" thick quartz rounds which are used as calibration standards for film stress measurements have been missing for several weeks. They were last seen next to the FSM stress test system across from Metalica. They are about one centimeter thick and were kept wrapped in cleanroom wipes. If you happen to see these in the lab, please let a staff member know. By the way, the new Flexus 2320 stress measurement tool is here and is functional (as far as we can tell, without the reference standards.) There are no operating procedures as yet and a couple more accessories need to be ordered, but it is usable. If you'd like to use it, contact me. Thanks, Mary -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From mtang at stanford.edu Thu Jul 24 15:33:32 2008 From: mtang at stanford.edu (Mary Tang) Date: Thu, 24 Jul 2008 15:33:32 -0700 Subject: Labmembers' Meeting, Friday, 8/1/08 (No Grand Rounds 7/25) Message-ID: <4889033C.7030905@stanford.edu> Hi everyone -- Just to let you know -- no Grand Rounds (originally scheduled for Friday, 7/25). Instead, we'll do a roll-up in the Labmembers' Meeting next Friday, 8/1/08, from 11-12, in the CISX Auditorium. The agenda will be: - General announcements - Quality Circle roll-up - SNF Project Update Hope to see you there! Your SNF Staff -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From nlatta at stanford.edu Thu Jul 24 16:31:25 2008 From: nlatta at stanford.edu (Nancy Latta) Date: Thu, 24 Jul 2008 16:31:25 -0700 Subject: Bake Sale! Message-ID: <488910CD.7020803@stanford.edu> Dear Fellow Building Occupants and Labmembers, Many of you will remember Jane Edwards from when she was our colleague at SNF. And many of you will remember the wonderful baked goodies she sold as a fundraiser for the 3-Day Walk for Breast Cancer four years ago. Jane has decided to do the 2008 Breast Cancer 3-Day Walk in September benefiting Susan G. Komen for the Cure in memory of Maureen Rochford, our friend and colleague, who passed away this May. Last time Jane raised over $4000 and hopes to exceed that for this year's Walk. She describes the Walk as 'one of those rare occasions that truly changes your life'. So please support this cause, honor Maureen R and enjoy some very tasty cookies, lemon bars and fruit breads by dropping by Maureen Baran's office (CIS141) on Monday 28 July and purchasing goodies. The sale will continue until all the treat items are gone. Thank you for your support, -Nancy From mtang at stanford.edu Mon Jul 28 10:36:54 2008 From: mtang at stanford.edu (Mary Tang) Date: Mon, 28 Jul 2008 10:36:54 -0700 Subject: Process Clinic Today, 7/28, 2 pm Message-ID: <488E03B6.2050604@stanford.edu> Hi all -- Just a reminder that there's a process clinic today, Monday, 7/28, at 2 pm, in the cubicle area near Maureen's office. Keith Best, the Applications Lab Director at ASML, will be here to field questions as well. Bring your process flows, bring your processing questions, and bring your layouts -- and see you this afternoon! Mary -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From mbaran at stanford.edu Mon Jul 28 11:39:23 2008 From: mbaran at stanford.edu (Maureen Baran) Date: Mon, 28 Jul 2008 11:39:23 -0700 Subject: Jane Edwards' AWSOME Bake Sale is Today Message-ID: <20080728183922.3E14060DF4C@smtp3.stanford.edu> Dear All, Just a Reminder that Jane Edwards is having an AWSOME Bake Sale today. Please come over to Office #141 on the first floor and participate by either buying a treat or donating to the "2008 Breast Cancer 3 Day Walk". Jane is walking in memory of Maureen Rochford who was an AWESOME friend and admin. I will be at my desk through the lunch hour so; you can buy a treat to go along with your lunch or afternoon coffee. Thank you, Maureen Maureen Baran Stanford Nanofabrication Facility Lab Services Administrator mbaran at stanford.edu 650-725-3664 -------------- next part -------------- An HTML attachment was scrubbed... URL: From mbaran at stanford.edu Mon Jul 28 14:36:06 2008 From: mbaran at stanford.edu (Maureen Baran) Date: Mon, 28 Jul 2008 14:36:06 -0700 Subject: Bake Sale SOLD OUT!!! Message-ID: <20080728213607.A866F60EB6B@smtp3.stanford.edu> Dear All, Thank you so much for all your support with the Bake Sale - we sold due to your generosity and Jane's great baking abilities. Maybe there will be more bake sales in the future. Maureen Maureen Baran Stanford Nanofabrication Facility Lab Services Administrator mbaran at stanford.edu 650-725-3664 -------------- next part -------------- An HTML attachment was scrubbed... URL: From xzhuang at stanford.edu Mon Jul 28 19:39:33 2008 From: xzhuang at stanford.edu (Steve Zhuang) Date: Mon, 28 Jul 2008 19:39:33 -0700 Subject: help on tsuprem4 Message-ID: <20080728193933.rwiyjztx1c8840cs@webmail.stanford.edu> Dear labmembers, Does anyone know how to run tsuprem4 on the university unix/linux machines? I used to be albe to run it a few months ago but now the program won't start. Any input is appreciated. Steve From mtang at stanford.edu Tue Jul 29 07:59:12 2008 From: mtang at stanford.edu (Mary Tang) Date: Tue, 29 Jul 2008 07:59:12 -0700 Subject: ASML Presentation on 3D Align - Wed., 7/30, 1 pm CIS 101 Message-ID: <488F3040.1010302@stanford.edu> Greetings labmembers: Paul Yick, the ASML site engineer, will be giving a short presentation about the 3-D align upgrade recently installed and qualified on the ASML system here at SNF. 3D align, by the way, is a custom feature not generally available on standard systems and we are fortunate that ASML has chosen to showcase this capability here. In brief: 3D-Align is an ASML Enabling Technology that combines Front-side alignment (FSA) and back-side alignment (BSA). It comprises of a special 3D-Align exposure table (with embedded optics for wafer alignment) and the electronics (and software) to route the alignment signal to the detector. It is particularly useful for aligning device layers to thick epi, thick plated metal (in the case of MEMS devices) and color photoresist. It is cost effective as alignment marks are no longer printed on the front-side of the wafer & the number of process steps may also be reduced. Normally, FTFA (Front-to-Front Alignment) is used on critical layers & BTBA (Back-to-Back Alignment) for non-critical layers. FTBA (Front-to-Back Alignment) is also a good alternative. Paul's presentation will be on Wednesday, July 30, at 1 pm in CIS 101. Your ASML Team -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From Jfu at exponent.com Tue Jul 29 22:33:22 2008 From: Jfu at exponent.com (Jason Fu) Date: Tue, 29 Jul 2008 22:33:22 -0700 Subject: FW: Die saw at Stanford or elsewhere Message-ID: <113F6EB3099A9945ACB6B6AD8F7A390901F84E51@EXCHANGE0.exponent.com> Hi, everyone, Is there a die saw in the lab or such service elsewhere in the area that could be used to cut hard glasses and oxides such as zirconia and titania? Thanks, Jason -------------- next part -------------- An HTML attachment was scrubbed... URL: From tberg at stanford.edu Wed Jul 30 06:05:58 2008 From: tberg at stanford.edu (Ted Berg) Date: Wed, 30 Jul 2008 06:05:58 -0700 Subject: Ebeam PM Message-ID: <48906735.70603@stanford.edu> Hello All, Just a note to let everyone know the Hitachi Ebeam tool will be down for a bit over a week for annual PM. Hopefully all nagging issues will be resolved. Thanks for your understanding. ted From mbaran at stanford.edu Thu Jul 31 11:29:31 2008 From: mbaran at stanford.edu (Maureen Baran) Date: Thu, 31 Jul 2008 11:29:31 -0700 Subject: FW: Found An RSA SecurID Token by the Barlett Printer this morning Message-ID: <20080731182932.81797659C72@smtp2.stanford.edu> Dear All, The actual name of this device is "RSA SecurID". I'm concerned that someone might be going crazy trying to find it. Maureen Maureen Baran Stanford Nanofabrication Facility Lab Services Administrator mbaran at stanford.edu 650-725-3664 _____ From: Maureen Baran [mailto:mbaran at stanford.edu] Sent: Thursday, July 31, 2008 9:54 AM To: labmembers at stanford.edu; cis-building at cis.stanford.edu Subject: Found Security Token by the Barlett Printer this morning Dear All, A Security Token has been found by the Bartlett printer. If you know what this is and you would like it back please come to my cubicle # 41 and pick it up. Maureen Maureen Baran Stanford Nanofabrication Facility Lab Services Administrator mbaran at stanford.edu 650-725-3664 -------------- next part -------------- An HTML attachment was scrubbed... URL: From mtang at stanford.edu Thu Jul 31 17:27:22 2008 From: mtang at stanford.edu (Mary Tang) Date: Thu, 31 Jul 2008 17:27:22 -0700 Subject: Labmembers' Meeting Postponed to Friday, Aug. 8, 1 pm Message-ID: <4892586A.1070306@stanford.edu> Hi all -- Just wanted to let you know that the Labmembers' Meeting has been postponed to next Friday, Aug. 8, from 1-2 pm in the CISX Auditorium. Ed will be back and we should have results to report on the tylanbpsg/LTO upgrade and qual as well as updates on several other activities. Hope to see you there! Mary -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu