PhD Orals - Yuan Zhang, June 10, 2009, 9am, Packard 101

Yuan Zhang zhangy at stanford.edu
Thu Jun 4 11:20:40 PDT 2009


 

 

Nanoscale Phase Change Memory: Device Structure and Materials
Characterization

 

PhD Oral Examination

Speaker: Yuan Zhang, Department of Electrical Engineering, Stanford
University

PhD Advisor: Prof. H.-S. Philip Wong

 

Time: 9am (refreshments served at 8:45am)

Date: Wednesday, June 10, 2009

Location: Packard 101

 

Abstract:

 

Modern digital system requires the capability of storing and retrieving
large amounts of information at very high speed. Non-volatile solid state
memories retains information when the power is turned off and is now the
mainstream data storage device for many applications including personal
electronics such as iPOD, mobile phones, and netbooks. The market for
non-volatile memory (NVM) technology has grown substantially in recent
years. However, Flash memory, the dominant NVM technology, is facing
fundamental scaling challenges. In view of this, research in various new
memory technologies have been explored and accelerated. Among these
exploratory memory technologies, phase change memory (PCM) is one of the
most promising candidates, given its simple structure, good scalability,
high speed, and long endurance.

 

This talk consists of two parts.  In the first part, germanium nanowire
diode was implemented as selection device for PCM array. Unidirectional
programming and reading for PCM cell requires a selection device in a memory
array structure to enable large array sizes. Having a diode selection device
can not only reduce the read disturbance and leakage power, but also have
the potential to further increase the array density, by three-dimensional
stacking of cross-point memory layers. Germanium nanowire pn junction diode
is a good candidate for selection device because it has good scalability,
requires low processing temperature and has high conductivity. We
demonstrated a phase change memory cell structure utilizing in-situ doped
crystalline germanium nanowire diode integrated with a phase change memory
cell. The vertical nanowire diode served as the bottom electrode and the
memory cell selection device. Electrical measurement showed low reset
current and rectifying programming behavior. This method provides a possible
path toward high-density, 3D cross-point memory arrays.

 

In the second part of the talk, we addressed the scalability for both phase
change materials and phase change memory devices. Phase transition
properties of commonly used phase change materials for both thin blanket
films and nanodot samples were studied using x-ray diffraction, and size
dependence of the phase change properties was observed. We employed
self-assembly diblock copolymer patterning to fabricate sub-20nm phase
change nanodots.  This diblock copolymer patterning technique was
additionally utilized to fabricate devices with small contact areas to lower
the reset programming current. Reduced reset current was achieved compared
to a conventional structure. The device can be further scaled by patterning
a single self-assembled contact hole in each cell to demonstrate device
scalability below 20 nm.

 

 

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