Eun Ji Kim's Dissertation Defense Thursday 3/19 2pm Packard 202

Eun Ji Kim eunjik at stanford.edu
Tue Mar 17 08:28:08 PDT 2009


Interface and Defect Study of High Permittivity Dielectrics on Si and III-V
semiconductors

Eun Ji Kim
Advisors: Prof. Paul C. McIntyre
Prof. Krishna C. Saraswat

Date: Thursday, Mar. 19, 2009
Time: 2:00 PM (Refreshments served at 1:45 PM)
Location: Packard Bldg. Rm. 202


        In an effort to decrease electronic device dimensions and improve
device performance, high permittivity dielectrics have been introduced to
metal-oxide-semiconductor field effect transistors (MOSFETs). Even though
replacing SiO2 with high permittivity dielectrics enabled aggressive device
scaling, however, the introduction of new materials gave rise to fundamental
problems that could lead to device performance degradation, such as
reduction of the effective carrier channel mobility and threshold voltage
instabilities. Unsatisfied dangling bonds at the interface of the high
permittivity dielectrics and Si, intrinsic and extrinsic point defects in
high permittivity dielectrics, and remote phonon scattering are believed to
cause degradation of device performance. To understand the limitations to
the performance of MOSFETs with high permittivity dielectrics, it is
critical to probe phonon modes and defect states directly in high-k
dielectrics.
        Inelastic electron tunneling spectroscopy (IETS) is employed to
study soft phonon modes and defect states in HfO2 grown by atomic layer
deposition (ALD) on Si. Observed spectral features suggest that monoclinic-
and tetragonal- HfO2 vibrational modes exist in the annealed HfO2 while
crystalline HfO2 vibrational modes are not detected in the as-deposited
samples, consistent with selective area electron diffraction analysis. In
addition to soft phonon modes of HfO2, changes in amplitude and energy of
spectral features were observed as the bias condition changes. We attribute
these features to defect-related states in HfO2 and analyze them in terms of
electron energy states in the HfO2 bandgap and reported oxygen vacancy
states in HfO2.
        For further device scaling, III-V compound semiconductors are
receiving increasing attention for channel replacement in the
metal-oxide-semiconductor (MOS) technology beyond 22 nm node because of
their high intrinsic electron mobility. Unlike SiO2 that exhibits excellent
passivating properties on Si with low interface state densities, there
typically exists a large density of defect states at the interface of III-V
semiconductors and their native oxides. Previous research on GaAs showed
that less than 1 % of a monolayer of chemisorbed O2 can pin the Fermi level
at the semiconductor surface. Therefore, suppressing oxidation of the III-V
semiconductors’ surface prior to and during gate dielectric deposition could
be essential to achieving device performance superior to that of silicon in
nanoscale devices. Several different approaches have been demonstrated to
prepare III-V semiconductor-based MOS devices. However, previously attempted
methods resulted in frequency-dependent flat band voltage (Vfb) shift,
charge trapping in the dielectrics and a relatively high density of
interface trap states, possibly from unintentional oxidation of the III-V
channel.
        We used In0.53Ga0.47As (100) channels that were capped with an
arsenic layer after channel epitaxial growth to avoid III-V oxidation during
exposure of the samples to air. The As capping layer was thermally desorbed
in-situ in a load-locked ALD reactor prior to Al2O3 gate dielectric
deposition. By preventing subcutaneous oxidation of the channel surface, we
obtained unpinned Al2O3/In0.53Ga0.47As interfaces with a low density of
interface states. The C-V characteristics show a hysteresis of less than 40
mV and relatively small frequency dispersion in accumulation. The surface
potential swing (0.44~1.2 eV) calculated using the Berglund integral
suggests the absence of a high density of midgap interface states. The
observation of near-ideal flat band voltage values for Pt- and Al-electroded
MOS capacitors indicates the absence of a significant interface dipole. The
temperature-independence of the frequency dispersion of the accumulation
capacitance and its scaling with measurement frequency are consistent with
tunneling of carriers into defects in the Al2O3 layer, border traps. This
also indicates a low interface state density for these devices.
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