From jwpchen at stanford.edu Sat May 1 11:34:58 2010 From: jwpchen at stanford.edu (Peter Chen) Date: Sat, 01 May 2010 11:34:58 -0700 Subject: Seminar - Nanogenerator for Electric Clothing, Liwei Lin, Tue 5/4 4-5pm 101X Message-ID: <4BDC7452.7080207@stanford.edu> Nanogenerator for Electric Clothing Prof. Liwei Lin Dept. of Mechanical Engineering, UC Berkeley Tuesday, May 4, 4:00-5:00 Allen 101X Auditorium Abstract: A self-powering system that harvests its operating energy directly from the environment/body movement is an attractive proposition for sensing, personal electronics and security technologies. Mechanical energy scavengers by orderly electrospun piezoelectric nanofibers enable energy generation which could eventually lead to ?electric clothing.? This talk will introduce recent results on the demonstration of a single nanogenerator made of polyvinylidene fluoride (PVDF) via the in-situ stretching and poling electrospinning process. Results show that energy conversion efficiency of nanogenerator could be 10 times higher than large scale structures made of the same material. The capability of demonstrating electrospun nanofiber as possible power generator could have a profound impact in various application areas, including energy harvesting, strain sensing, and actuation sources. Bio: Professor Liwei Lin received his Ph.D. degree from the University of California, Berkeley, in 1993 and is now Chancellor?s Professor at the Mechanical Engineering Department and Co-Director at Berkeley Sensor and Actuator Center, an NSF/Industry/University research cooperative center. He served as the Vice-Chair for graduate study for the Mechanical Engineering department from 2006~2009. His research interests are in design, modeling and fabrication of micro/nano structures, sensors and actuators as well as mechanical issues in micro/nano systems including heat transfer, solid/fluid mechanics and dynamics. Dr. Lin is the recipient of the 1998 NSF CAREER Award for research in MEMS Packaging and the 1999 ASME Journal of Heat Transfer best paper award for his work on micro scale bubble formation. He led the effort in establishing the MEMS sub-division in ASME and served as the founding Chair of the executive committee for the MEMS division in ASME. He holds 13 U.S. patents in the area of MEMS and NEMS. From edmyers at stanford.edu Mon May 3 08:30:14 2010 From: edmyers at stanford.edu (Ed Myers) Date: Mon, 03 May 2010 08:30:14 -0700 Subject: AppNano AFM Probes Presentation Reminder Message-ID: <6.2.5.6.2.20100503082902.028e6cf8@stanford.edu> >From: Ed Myers >Subject: AppNano AFM Probes Presentation > >Stanford Nanofabrication Facility and AFM Lab Member Community, > >AppNano AFM Probes Technology will be on campus Tuesday, May 4th to >give a presentation on their latest probe technology. The >presentation will begin at 12 noon in room Paul Allan 101. Please >refer to the attached flier for complete details. The presentation >will last approximately one hour and will highlight several recent >AFM tip technologies and developments. > >A free lunch will be provided to registered guests. To reserve your >pizza lunch and the option of free AFM tip samples please reply to >info at appnano.com with your name and contact information (email and >phone number) and the AFM probe part number. > >To request sample probes please visit www.appnano.com and suggest >the probe part number you are most interested in obtaining. >You may select one part number out of the following series of probes : >ACT, ACL, FORT, SHOCON, SICON and HYDRA. > >For additional information on the presentation please contact: >mhuey at appnano.com -------------- next part -------------- A non-text attachment was scrubbed... Name: Applied NanoStructures.docx Type: application/msword Size: 14222 bytes Desc: not available URL: From smeister at stanford.edu Mon May 3 08:29:09 2010 From: smeister at stanford.edu (Stefan Meister) Date: Mon, 03 May 2010 08:29:09 -0700 Subject: Ph.D. Oral Examination: Stefan Meister (May 12th, 10AM) Message-ID: <4BDEEBC5.2020508@stanford.edu> Title: In situ TEM study of nanoscale phase-change memory cells Advisor: Prof. Yi Cui Time: Wednesday, May 12th at 10 AM (refreshments served at 9:45AM) Location: CIS-X Auditorium Abstract: Phase-change memory (PCM) utilizes the large difference in resistivity between the crystalline and amorphous phases of chalcogenide materials to store information. Studies have shown excellent scalability, fast switching speeds and high endurance making this technology a promising candidate for future non-volatile memory. While industry is making steady progress towards implementing PCM, there are still many open questions concerning the operation of an actual device. For example, the size and shape of the amorphous region in a working device is largely unknown. Similarly, the critical threshold electric field required to switch to the conductive state, is not well understood. Finally, PCM devices often show large variability in their electrical behavior for unclear reasons. To address these questions, we have developed a technique to switch individual PCM cells inside a transmission electron microscope allowing us to directly correlate electrical behavior with structural changes. We demonstrate reversible switching of Germanium-Antimony-Telluride (Ge2Sb2Te5) lateral phase-change cells and show various degrees of amorphization which result in changes in electrical behavior. Specifically, the electrical behavior is influenced by the purity of the amorphous domain, which can vary from completely amorphous to an amorphous matrix with a high density of nanocrystals interspersed. We find that the makeup of the amorphous domain strongly depends on the geometry of the bridge and the applied pulse. We measured a threshold field of approximately 4 V/um, which is much smaller than what has been reported by other experiments (30-55 V/um). These insights can assist in the design of better lateral phase-change cells capable of reproducible switching with minimal resistance fluctuation in each state. Since it is not clear which material will ultimately show the best properties for use in PCM and there is a need to make phase-change materials in the nanoscale for fundamental investigations, we developed the vapor-liquid-solid growth of GeTe phase-change nanowires (NWs). The NWs show a large resistance contrast upon switching. With the in situ TEM technique we discovered that the NWs can switch via a different mechanism that consists of opening and closing of voids giving rise to large differences in resistivity. -- Stefan Meister Ph.D. Candidate, Cui Group Materials Science and Engineering Stanford University McCullough Bldg., Rm 209 476 Lomita Mall Stanford, CA 94305 -------------- next part -------------- A non-text attachment was scrubbed... Name: Ph.D. Defense, Abstract, Stefan Meister.pdf Type: application/pdf Size: 19311 bytes Desc: not available URL: From mtang at stanford.edu Mon May 3 09:15:40 2010 From: mtang at stanford.edu (Mary Tang) Date: Mon, 03 May 2010 09:15:40 -0700 Subject: Process Clinic, Today - 2-3:30 Message-ID: <4BDEF6AC.8080504@stanford.edu> Greetings labmembers -- There is a Process Clinic today (Monday) from 2-3:30 pm in the cubicle area outside of Maureen's office. Experienced people will be on hand to answer questions and brainstorm ideas to address process issues. Bring your ideas, process questions, your process runsheets, SpecMat request, device layouts, and whatever else. (Senior labmembers are most welcome to help advise!) Your SNF staff -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From edmyers at stanford.edu Tue May 4 08:50:44 2010 From: edmyers at stanford.edu (Ed Myers) Date: Tue, 04 May 2010 08:50:44 -0700 Subject: Today's AppNano AFM Probes Presentation Message-ID: <6.2.5.6.2.20100504084901.05953998@stanford.edu> Stanford Nanofabrication Facility and AFM Lab Member Community, AppNano AFM Probes Technology will be on campus Tuesday, May 4th to give a presentation on their latest probe technology. The presentation will begin at 12 noon in room Paul Allan 101. Please refer to the attached flier for complete details. The presentation will last approximately one hour and will highlight several recent AFM tip technologies and developments. A free lunch will be provided to registered guests. To reserve your pizza lunch and the option of free AFM tip samples please reply to info at appnano.com with your name and contact information (email and phone number) and the AFM probe part number. To request sample probes please visit www.appnano.com and suggest the probe part number you are most interested in obtaining. You may select one part number out of the following series of probes : ACT, ACL, FORT, SHOCON, SICON and HYDRA. For additional information on the presentation please contact: mhuey at appnano.com -------------- next part -------------- A non-text attachment was scrubbed... Name: Applied NanoStructures.docx Type: application/msword Size: 14222 bytes Desc: not available URL: From pruitt at stanford.edu Wed May 5 13:11:49 2010 From: pruitt at stanford.edu (Beth Pruitt) Date: Wed, 5 May 2010 13:11:49 -0700 Subject: seminar thursday 415pm, bill king Message-ID: seminar tomorrow: Thursday 4:15pm, Thornton 110 Prof. William King, UIUC M.E. Thermomechanical Probes at the Nanometer Scale The properties of materials depend upon temperature, and the ability to control temperature fields at the nanometer scale enables new capabilities for nanomechanical characterization and nano-manufacturing. This talk provides a broad overview on research into thermal and thermomechanical processing at the nanometer scale. The first part of the talk describes nanoscale probe tips with integrated thermal elements capable of measuring temperature-dependent physical, electrical, and chemical properties on the 10 nm scale. Such measurements enable quantitative material identification well below the diffraction limit of conventional spectroscopy. The second part of the talk describes nanomanufacturing with these probe tips. Such tips can form three-dimensional features in polymers, metals, and semiconductors with 10 nm resolution and include both mechanical forming and thermally-activated chemical reactions. The properties of these nanostructures will be described, as will the scale-up of these manufacturing techniques to conventional scales. William P. King is Associate Professor and Willett Faculty Scholar in the Department of Mechanical Science and Engineering an affiliate of the Department of Materials Science and Engineering at the University of Illinois Urbana-Champaign. He received the Ph.D. (2002) degrees in mechanical engineering from Stanford University. He was worked at the IBM Zurich Research Laboratory and was formerly on the Faculty at Georgia Tech. Dr. King is the winner of the CAREER award from the National Science Foundation (2003), the PECASE award from the Department of Energy (2005), and the Young Investigator Award from the Office of Naval Research (2007). He was named Young Manufacturing Engineer by the Society of Manufacturing Engineers (2006). In 2006, Technology Review Magazine named him to the TR35-one of the people under the age of 35 whose innovations are likely to change the world. In 2007 his innovations were selected for an R&D 100 Award and a Micro/Nano 25 Award and in 2008 he won his second R&D 100 Award. In 2009 he won the ASME Bergles-Rohsenow Award for Young Investigator in Heat Transfer. He has authored over 100 journal articles, is co-founder of two companies, and is a member of the Defense Sciences Research Council. From jypeng at stanford.edu Thu May 6 22:36:28 2010 From: jypeng at stanford.edu (Jammie Peng) Date: Thu, 6 May 2010 22:36:28 -0700 Subject: MRS & IEEE Alumni Careers Panel: VIEWPOINTS - Insights from different career stages in MSE and EE Message-ID: Stanford MRS and Stanford IEEE presents Alumni Careers Panel *VIEWPOINTS* Insights from different career stages in MSE and EE Thursday, May 13, 2010 In McCullough Bldg. Rm. 115 Starts at 5:30pm * * *Limited Seating! RSVP below by 5/11 for complementary dinner!* [image: wesling.jpg] [image: florando_jeff_150x193.jpg] [image: JB_headshot.png] *Paul Wesling*, Emeritus Vice President of Publications, CPMT - 1966 BS Electrical Engr, 1968 MS Materials Sci/Engr *Jeff Florando*, Engineer, LLNL ? 1992 BS Ceramic Engr, 2002 PhD Materials Sci/Engr *Josh Baylor*, Design Engineer, Intersil ? 2006 BS Electrical Engr If you have trouble viewing or submitting this form, you can fill it out online: http://sites.google.com/site/stanfordmrs/events/rsvp-for-seminar Name * Email * Major/Department * Degree Program * - BS - MS - PhD - Post-Doc - Other: Year in Program * - 1st year - 2nd year - 3rd year - 4th year - 5th year or more National MRS Member * - Yes - No Stanford MRS Mailing List * - I am part of the mailing list. - Please add me to the mailing list. - I do not want to join the mailing list. Dietary Restrictions - Vegetarian - Other: Question for the speaker or topic of discussion Powered by Google Docs Report Abuse- Terms of Service - Additional Terms *Jammie Peng* Alumni Relations Director and E-Commerce Officer *Stanford Materials Research Society* Email jypeng at stanford.edu mrs.stanford.edu -------------- next part -------------- An HTML attachment was scrubbed... URL: From jwpchen at stanford.edu Sat May 8 03:19:04 2010 From: jwpchen at stanford.edu (Peter Chen) Date: Sat, 08 May 2010 03:19:04 -0700 Subject: seminar - Tues 5/11, 4-5pm, Allen 101X - Michel Maharbiz - Building interfaces from the synthetic to the organic: cyborg beetles, antibody zippers and other things Message-ID: <4BE53A98.70408@stanford.edu> Tuesday, May 11, 4:00-5:00 Allen 101X Auditorium Building interfaces from the synthetic to the organic: cyborg beetles, antibody zippers and other things Prof. Michel Maharbiz Dept. of EECS, UC Berkeley Abstract: The ongoing miniaturization of computation, sensing and communication coupled with advances in the understanding of biological process will fuel a push to engineer systems at the interface of the organic and the solid-state. In this talk, I?ll give a brief overview of efforts in my group in these directions, with an intent to delve deeply into two topics: so-called ?cyborg insects? (or the remote radio control of insect flight) and antibody zippers, a nanochemomechanical device recently developed in my group. Bio: Michel M. Maharbiz is an Associate Professor with the Department of Electrical Engineering and Computer Science at the University of California, Berkeley. He received his Ph.D. from the University of California at Berkeley for his work on microbioreactor systems under Prof. Roger T. Howe (EECS) and Prof. Jay D. Keasling (ChemE). His work let to the foundation of Microreactor Technologies, Inc. which was recently acquired by Pall Corporation. Dr. Maharbiz has been a GE Scholar and an Intel IMAP Fellow. Professor Maharbiz?s current research interests include building micro/nano interfaces to cells and organisms and exploring bio-derived fabrication methods. His group is also known for developing the world?s first remotely radio-controlled cyborg beetles; this was named one of the top ten emerging technologies of 2009 by MIT?s Technology Review (TR10). Michel?s long-term goal is understanding developmental mechanisms as a way to engineer and fabricate machines. From alexneu at stanford.edu Fri May 7 19:49:59 2010 From: alexneu at stanford.edu (Alex Neuhausen) Date: Fri, 7 May 2010 19:49:59 -0700 Subject: looking for clean anisole Message-ID: Hi all, I want to dilute some ZEP-520A ebeam resist with anisole. Could anyone spare a few ml of particulate-free anisole? Thanks, Alex Alex Neuhausen PhD Candidate Electrical Engineering Goldhaber-Gordon Lab 476 Lomita Mall Stanford, CA 94305 Office: 650-725-2047 Cell: 650-776-5672 -------------- next part -------------- An HTML attachment was scrubbed... URL: From ytanster at gmail.com Sun May 9 10:55:44 2010 From: ytanster at gmail.com (Mike Tan) Date: Sun, 9 May 2010 10:55:44 -0700 Subject: tycom is stuck Message-ID: Hi, Does anyone know what to do when Tycom, the computer for interfacing the furnaces is stuck? I cannot load any programs into the system. If anyone fixes this later, please load polypump (poly directory) into tube 9. Thank you. Mike -------------- next part -------------- An HTML attachment was scrubbed... URL: From toecutter4ranger at gmail.com Sun May 9 16:36:53 2010 From: toecutter4ranger at gmail.com (ToeCutter) Date: Sun, 9 May 2010 16:36:53 -0700 Subject: looking for clean anisole In-Reply-To: References: Message-ID: <5D0E2304-F99E-4D95-8543-E2D9773D4063@gmail.com> The is a bottle from microchem, ' thinner A in the left hand yellow cabinet top shelf right behind the Ebeam resist JWC On May 7, 2010, at 7:49 PM, Alex Neuhausen wrote: > Hi all, > I want to dilute some ZEP-520A ebeam resist with anisole. Could > anyone spare a few ml of particulate-free anisole? > Thanks, > Alex > > Alex Neuhausen > PhD Candidate Electrical Engineering > Goldhaber-Gordon Lab > 476 Lomita Mall > Stanford, CA 94305 > Office: 650-725-2047 > Cell: 650-776-5672 From jwpchen at stanford.edu Mon May 10 01:17:35 2010 From: jwpchen at stanford.edu (Peter Chen) Date: Mon, 10 May 2010 01:17:35 -0700 Subject: missing mask - HIPPI MK2 In-Reply-To: <4BE7B682.8040309@stanford.edu> References: <4BE7B682.8040309@stanford.edu> Message-ID: <4BE7C11F.2030605@stanford.edu> A Good Person has found the mask. Thank you! -Peter On 5/10/2010 12:32 AM, Peter Chen wrote: > Hello Labmembers, > > I have an ASML mask missing. It has been sitting in a user bin since a > week ago, but now it has disappeared. The mask title is "HIPPI MK2". > > If you have seen it or have grabbed it by accident, could you email me > asap? I would be very grateful. > > (If you did pick up the mask but wish to remain anonymous, you can also > put it into storage bin F33 (karthikv) near the ASML.) > > Sorry for the mass email, > -Peter From jwpchen at stanford.edu Mon May 10 00:32:18 2010 From: jwpchen at stanford.edu (Peter Chen) Date: Mon, 10 May 2010 00:32:18 -0700 Subject: missing mask - HIPPI MK2 Message-ID: <4BE7B682.8040309@stanford.edu> Hello Labmembers, I have an ASML mask missing. It has been sitting in a user bin since a week ago, but now it has disappeared. The mask title is "HIPPI MK2". If you have seen it or have grabbed it by accident, could you email me asap? I would be very grateful. (If you did pick up the mask but wish to remain anonymous, you can also put it into storage bin F33 (karthikv) near the ASML.) Sorry for the mass email, -Peter From smeister at stanford.edu Mon May 10 09:00:28 2010 From: smeister at stanford.edu (Stefan Meister) Date: Mon, 10 May 2010 09:00:28 -0700 Subject: Reminder: Ph.D. Oral Examination: Stefan Meister (May 12th, 10AM) In-Reply-To: <4BDEEBC5.2020508@stanford.edu> References: <4BDEEBC5.2020508@stanford.edu> Message-ID: <4BE82D9C.6060707@stanford.edu> Title: In situ TEM study of nanoscale phase-change memory cells Advisor: Prof. Yi Cui Time: Wednesday, May 12th at 10 AM (refreshments served at 9:45AM) Location: CIS-X Auditorium Abstract: Phase-change memory (PCM) utilizes the large difference in resistivity between the crystalline and amorphous phases of chalcogenide materials to store information. Studies have shown excellent scalability, fast switching speeds and high endurance making this technology a promising candidate for future non-volatile memory. While industry is making steady progress towards implementing PCM, there are still many open questions concerning the operation of an actual device. For example, the size and shape of the amorphous region in a working device is largely unknown. Similarly, the critical threshold electric field required to switch to the conductive state, is not well understood. Finally, PCM devices often show large variability in their electrical behavior for unclear reasons. To address these questions, we have developed a technique to switch individual PCM cells inside a transmission electron microscope allowing us to directly correlate electrical behavior with structural changes. We demonstrate reversible switching of Germanium-Antimony-Telluride (Ge2Sb2Te5) lateral phase-change cells and show various degrees of amorphization which result in changes in electrical behavior. Specifically, the electrical behavior is influenced by the purity of the amorphous domain, which can vary from completely amorphous to an amorphous matrix with a high density of nanocrystals interspersed. We find that the makeup of the amorphous domain strongly depends on the geometry of the bridge and the applied pulse. We measured a threshold field of approximately 4 V/um, which is much smaller than what has been reported by other experiments (30-55 V/um). These insights can assist in the design of better lateral phase-change cells capable of reproducible switching with minimal resistance fluctuation in each state. Since it is not clear which material will ultimately show the best properties for use in PCM and there is a need to make phase-change materials in the nanoscale for fundamental investigations, we developed the vapor-liquid-solid growth of GeTe phase-change nanowires (NWs). The NWs show a large resistance contrast upon switching. With the in situ TEM technique we discovered that the NWs can switch via a different mechanism that consists of opening and closing of voids giving rise to large differences in resistivity. From jypeng at stanford.edu Tue May 11 00:08:45 2010 From: jypeng at stanford.edu (Jammie Peng) Date: Tue, 11 May 2010 00:08:45 -0700 Subject: RSVP NOW! Alumni Careers Panel featuring Paul Wesling, Jeff Florendo, and Josh Baylor Message-ID: Stanford MRS and Stanford IEEE presents Alumni Careers Panel *VIEWPOINTS* Insights from different career stages in MSE and EE Thursday, May 13, 2010 In McCullough Bldg. Rm. 115 Starts at 5:30pm * * *Limited Seating! RSVP below by 5/11 for complementary dinner from Pluto's! * [image: Wesling formal 2.jpg] [image: florando_jeff_150x193.jpg] [image: JB_headshot.jpg] *Paul Wesling*, Retired - 1966 BS Electrical Engr, 1968 MS Materials Sci/Engr *Jeff Florando*, Engineer, LLNL ? 1992 BS Ceramic Engr, 2002 PhD Materials Sci/Engr *Josh Baylor*, Design Engineer, Intersil ? 2006 BS Electrical Engr If you have trouble viewing or submitting this form, you can fill it out online: http://sites.google.com/site/stanfordmrs/events/rsvp-for-seminar Name * Email * Major/Department * Degree Program * - BS - MS - PhD - Post-Doc - Other: Year in Program * - 1st year - 2nd year - 3rd year - 4th year - 5th year or more National MRS Member * - Yes - No Stanford MRS Mailing List * - I am part of the mailing list. - Please add me to the mailing list. - I do not want to join the mailing list. Dietary Restrictions - Vegetarian - Other: Question for the speaker or topic of discussion Powered by Google Docs Report Abuse- Terms of Service - Additional Terms *Jammie Peng* Alumni Relations Director and E-Commerce Officer *Stanford Materials Research Society* Email jypeng at stanford.edu mrs.stanford.edu -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: Wesling formal 2.jpg Type: image/jpeg Size: 183743 bytes Desc: not available URL: From gunhan at stanford.edu Tue May 11 10:35:03 2010 From: gunhan at stanford.edu (gunhan at stanford.edu) Date: Tue, 11 May 2010 10:35:03 -0700 (PDT) Subject: =?utf-8?Q?Reminder:_Ph.D._Oral_Examination:_Me?= =?utf-8?Q?hmet_G=C3=BCnhan_Ertosun_(May_14th,_10AM)?= In-Reply-To: <4BE82D9C.6060707@stanford.edu> Message-ID: <1655384937.94341.1273599303483.JavaMail.root@zm03.stanford.edu> Title: Novel Capacitorless Single-Transistor DRAM Technologies Research Advisor: Prof. Krishna Saraswat Date: Friday, May 14, 2010 Time: 10:00 am Location: CIS-X Auditorium (Allen Building) Abstract: The Dynamic random access memory (DRAM) industry has achieved miracles packing more and more memory bits onto ever smaller silicon die. But, the scaling of the conventional 1Transistor/1Capacitor (1T/1C) DRAM is becoming increasingly difficult, in particular due to the capacitor which has become harder to scale, as device geometries shrink. Recently the capacitorless single-transistor (1T) DRAMs have attracted attention, due to its ability to achieve higher memory cell density and to solve the problems associated with the scaling of the capacitor. The information is stored as different charge levels at a capacitor in conventional 1T/1C DRAM, whereas the 1T DRAM employs floating body effects within the transistor to store the information without the need of the capacitor. The absence of the capacitor is advantageous in terms of scalability, process and fabrication complexity, and compatibility with the logic processing steps, device density, yield and cost. Due to all these advantages of the capacitorless DRAM, and to solve the scaling problem of conventional 1T/1C DRAM, this work is focused on creating novel single transistor DRAM technologies. The first device that is studied is vertical double-gate (DG) capacitorless single-transistor DRAM (1T VR DRAM). This device has advantages of being vertical with a small footprint, it can be integrated on bulk Si and being a double-gate device allows better electrostatic control of the channel and higher intrinsic device retention. The second device that is investigated is a novel DRAM device: capacitorless single-transistor quantum well DRAM (1T QW DRAM), which employs energy-band engineering approach within the body of the transistor in order to create a ?hole storage pocket? and ?carrier distribution control layer? which results in superior device characteristics in terms of scalability and memory sensing window. The third and the final device that is studied is also a novel DRAM device: capacitorless single-transistor charge trap DRAM (1T CT DRAM). The body of this device is engineered with the intentional charge traps so as to obtain a memory effect. This novel DRAM relies on the existence and absence of electrons within its body and uses a charge-trapping mechanism in its memory operation, unlike conventional 1T DRAMs that rely on holes and employ floating-body effects in its memory operation. From jwpchen at stanford.edu Tue May 11 13:45:07 2010 From: jwpchen at stanford.edu (Peter Chen) Date: Tue, 11 May 2010 13:45:07 -0700 Subject: seminar - Tues 5/11, 4-5pm, Allen 101X - Michel Maharbiz - Building interfaces from the synthetic to the organic: cyborg beetles, antibody zippers and other things In-Reply-To: <4BE53A98.70408@stanford.edu> References: <4BE53A98.70408@stanford.edu> Message-ID: <4BE9C1D3.4020900@stanford.edu> Reminder of the exciting talk this afternoon... thanks On 5/8/2010 3:19 AM, Peter Chen wrote: > Tuesday, May 11, 4:00-5:00 > Allen 101X Auditorium > > Building interfaces from the synthetic to the organic: > cyborg beetles, antibody zippers and other things > > Prof. Michel Maharbiz > Dept. of EECS, UC Berkeley > > Abstract: > The ongoing miniaturization of computation, sensing and communication > coupled with advances in the understanding of biological process will > fuel a push to engineer systems at the interface of the organic and the > solid-state. In this talk, I?ll give a brief overview of efforts in my > group in these directions, with an intent to delve deeply into two > topics: so-called ?cyborg insects? (or the remote radio control of > insect flight) and antibody zippers, a nanochemomechanical device > recently developed in my group. > > Bio: > Michel M. Maharbiz is an Associate Professor with the Department of > Electrical Engineering and Computer Science at the University of > California, Berkeley. He received his Ph.D. from the University of > California at Berkeley for his work on microbioreactor systems under > Prof. Roger T. Howe (EECS) and Prof. Jay D. Keasling (ChemE). His work > let to the foundation of Microreactor Technologies, Inc. which was > recently acquired by Pall Corporation. Dr. Maharbiz has been a GE > Scholar and an Intel IMAP Fellow. Professor Maharbiz?s current research > interests include building micro/nano interfaces to cells and organisms > and exploring bio-derived fabrication methods. His group is also known > for developing the world?s first remotely radio-controlled cyborg > beetles; this was named one of the top ten emerging technologies of 2009 > by MIT?s Technology Review (TR10). Michel?s long-term goal is > understanding developmental mechanisms as a way to engineer and > fabricate machines. From xinyubao at stanford.edu Wed May 12 14:13:28 2010 From: xinyubao at stanford.edu (Xinyu Bao) Date: Wed, 12 May 2010 14:13:28 -0700 Subject: Seminar: Towards High Performance III-V Semiconductor Nanowire FETs and Nanolasers (May17, 2-3pm, Allen 338X) References: <201005121153000622405@stanford.edu> Message-ID: <201005121413280158862@stanford.edu> Towards High Performance III-V Semiconductor Nanowire FETs and Nanolasers Prof. Xiuling Li Department of Electrical and Computer Engineering University of Illinois, Urbana-Champaign http://mocvd.ece.illinois.edu Monday, May 17, 2:00-3:00pm Allen (CIS) 338X This talk focuses on two types of III-V compound semiconductor nanotechnology building blocks and their potential applications in nanoelectronics, nanophotonics, and MEMS/NEMS: III-V semiconductor nanowires (NWs) and nanotubes (SNTs). Interest in semiconductor NWs have increased exponentially over the past several years because of their unique optical and electrical properties and the capability of producing high quality heterostructures with large lattice mismatch on the nanometer scale. Integration of semiconductor nanowire based devices has been problematic and usually requires the technologically disadvantageous (111) substrate for vertical nanowire devices or ex-situ assembly techniques to align planar nanowire devices. In the first part of the talk, I will present our discovery of a type of NWs that are twin-defect free, high carrier mobility, self-aligned, and transfer-printable. The planar nanowire growth and doping mechanism by MOCVD, as well as the output and transfer characteristics of a long channel MESFET using such GaAs nanowire as the channel material will be analyzed. SNT on the other hand is an emerging field that has only caught limited attention, yet possesses the potential to provide a wide range of functionalities. It is formed by a combination of top-down and bottom-up approach through the self-rolling of strained thin films. This allows feasible large area assembly and integration with existing semiconductor technology, while maintaining the control of the tube size and heterojunction formation in the tube wall. In the 2nd part of the talk, I will discuss the formation process, large area assembly, and optical characterization of InxGa1-xAs/GaAs micro and nanotubes with active light emitting media incorporated in the tube wall. Device prospects of SNTs for nanophotonics and MEMS will be explored. Biography: Xiuling Li received her Ph.D. degree from the University of California at Los Angeles. She joined the faculty of the University of Illinois in 2007, after working at a startup company for six years. She is currently an assistant professor in the Department of Electrical and Computer Engineering, and an affiliate faculty member of the Department of Materials Science and Engineering and the Beckman Institute. Her current research interests are in the area of nanostructured semiconductor materials and devices. She has won the NSF CAREER award (2008) and DARPA Young Faculty Award (2009). Her group?s work on the planar nanowires has won one of the best student paper awards at the 2008 IEEE LEOS annual meeting. The micro and nanotube work has been identified as an outstanding symposium paper presented at the 2008 MRS meeting. Hosted by: Prof. H.-S. Philip Wong -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: Catch4.jpg Type: image/jpeg Size: 103660 bytes Desc: not available URL: From shanswam at stanford.edu Fri May 14 00:44:11 2010 From: shanswam at stanford.edu (Shankar Swaminathan) Date: Fri, 14 May 2010 00:44:11 -0700 Subject: PhD Oral Examination: Shankar Swaminathan (Thursday, May 27th, 9:30AM) Message-ID: * Nanoscale atomic-layer-deposited high-k gate oxides on Germanium: * *Interface engineering for highly-scaled MOS devices * Shankar Swaminathan Department of Materials Science and Engineering Advisor: Dr. Paul C. McIntyre Location: Bldg. 200 Rm. 002 (History Corner 200-002) Date: Thursday, May 27, 2010 Time: 9:30 AM (refreshments served at 9:15 AM) Germanium (Ge) has emerged as a promising candidate for surface channels in highly-scaled field-effect-transistors (FETs), as performance and reliability issues are likely to limit the use of conventional Si-based complementary-metal-oxide-semiconductor transistors. Lack of a high quality and stable thermal oxide of germanium has prompted interest in the use of high-*k* (high dielectric-constant) gate dielectrics on Ge channels. An interface layer (IL) between the high-*k* film and the Ge substrate appears to be necessary to avoid large defect densities characteristic of atomically-abrupt high-k (ZrO2 or HfO2)/Ge interfaces. Atomic layer deposition (ALD) is a useful high-*k *metal oxide film growth technique due to the precise nature of thickness control and uniformity of thickness for very thin films. The use of ALD to synthesize deposited ILs interposed between the Ge channel and an overlying high-*k* layer has not been studied extensively. In this context, we present three highlights from our work: First, we show that a pre-ALD surface functionalization by oxidant dosing improves the electrical characteristics of Pt/4nm ALD-Al2O3/p-Ge devices, as opposed to a conventional precursor-first ALD process. *In situ* x-ray photoelectron spectroscopy in the ALD ambient reveals the influence of hydroxyl (-OH) termination of the Ge surface in passivating dangling bonds that lead to fast trapping. The evolution of Ge-O bonding states during this pre-pulsing process is correlated with the observed improvements in hysteresis, frequency dispersion of the gate capacitance, and the passivation of fast (band-edge) and slow (midgap) interface states. Second, we present findings on the effects of scaling the physical thickness of the ALD-Al2O3 (down to 1 nm) on important electrical parameters such as interface state density (Dit), capacitance density, fixed charge and leakage current density. The ultrathin-ALD-Al2O3 / Ge interface shows no apparent interfacial suboxide (GeOx) while retaining a low Dit of 2x1011 cm-2 eV-1, indicating the potential of ALD-Al2O3 as an interface passivation layer. Aggressive gate capacitance scaling necessitates the use of so-called ?higher-k? dielectrics such as TiO2 (k > 25). However, the conduction band offset (CBO) of the TiO2/Ge interface is very low (~ 0.2eV), resulting in high gate leakage. We demonstrate that ultrathin (~ 1 nm) Al2O3 ILs, owing to their large bandgap (~ 6.2 eV), enhance the CBO at the TiO2/Ge interface, and reduce the gate leakage by 4 to 6 orders of magnitude at flatband. The Pt-gated bilayer devices exhibit excellent C-V characteristics down to a capacitance-derived EOT of 1.2 nm. The permittivity of the amorphous/nanocrystalline ALD-TiO2 films was in the range of 32-35. Forming gas annealing is beneficial in lowering the interface state density via formation of monolayer-thickness interfacial GeO2. Post-annealed devices exhibited a minimum Dit ~ 3x1011 cm-2 eV-1 near midgap. Finally, we show that thermally activated electron transport into shallow defect states in the TiO2 (~0.25eV below the CB edge) near the TiO2/Al2O3 interface appears to be responsible for a temperature-dependent dispersion of the accumulation capacitance density. The passivation of these defects is important to fully realize the potential of novel bilayer high-*k* gate stacks on germanium channels. -- Shankar Swaminathan Stanford Graduate Fellow '05 McIntyre Research Group 203P, McCullough (G-LAM) Stanford University, CA Ph: 650 796 6929 -------------- next part -------------- An HTML attachment was scrubbed... URL: From dslin824 at stanford.edu Sun May 16 12:24:41 2010 From: dslin824 at stanford.edu (Elvis Der-Song Lin) Date: Sun, 16 May 2010 12:24:41 -0700 Subject: Need borrow LOR 10B for lift-off Message-ID: Dear all, I was just wondering if anyone could kindly spare some LOR 10B. I am also ordering a new bottle so that you could share it back if you like. Thanks in advance, -- ------------------------------------------ Elvis Der-Song Lin Stanford University Ginzton Lab. Khuri-Yakub's Group Stanford CA, 94305 e-mail: elvislin at stanford.edu ------------------------------------------ From hongyuc at stanford.edu Sun May 16 15:08:04 2010 From: hongyuc at stanford.edu (Henry Hong-Yu Chen) Date: Sun, 16 May 2010 15:08:04 -0700 Subject: Calibration of MKS Vacuum Gauges(Model: 116A) In-Reply-To: References: Message-ID: Hi All, I am wondering if anyone has a user manual in your group or knows to calibrate MKS Vacuum Gauge. The model in our lab is TYPE 116A baratron, which is probably the first generation product of this manufacturer, MKS. It is too old to find calibration information online. If you happen to know how to calibrate it, please let me know. Your help is really appreciated. Best, Henry From mtang at stanford.edu Sun May 16 16:56:48 2010 From: mtang at stanford.edu (Mary Tang) Date: Sun, 16 May 2010 16:56:48 -0700 Subject: Process Clinic, Monday, 2-3:30 Message-ID: <4BF08640.6040408@stanford.edu> Greetings labmembers -- Just a reminder that there is a Process Clinic today (Monday) from 2-3:30 pm in the cubicle area outside of Maureen's office. Staff and senior labmembers will be on hand to answer questions and brainstorm ideas to address process issues. Bring your ideas, process questions, your process runsheets, SpecMat request, device layouts, and whatever else. Your SNF staff -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From hongyuc at stanford.edu Sun May 16 15:06:19 2010 From: hongyuc at stanford.edu (Henry Hong-Yu Chen) Date: Sun, 16 May 2010 15:06:19 -0700 Subject: Calibration of MKS Vacuum Gauges(Model: 116A) Message-ID: Hi All, I am wondering if anyone has a user manual in your group or knows to calibrate MKS Vacuum Gauge. The model in our lab is TYPE 116A baratron, which is probably the first generation product of this manufacturer, MKS. It is too old to find calibration information online. If you happen to know how to calibrate it, please let me know. Your help is really appreciated. Best, Henry From mbaran at stanford.edu Mon May 17 14:49:41 2010 From: mbaran at stanford.edu (Maureen Baran) Date: Mon, 17 May 2010 14:49:41 -0700 Subject: Found Stanford Postal Office Receipt Message-ID: <006601caf60a$db076040$911620c0$@edu> Dear All, Did someone just drop a Stanford Postal Office Receipt? Also found was a United States Postal Service Delivery Confirmation ticket. If you need these two items please come to my cubicle #41. I am right by the doors that face Applied Physic Building. Maureen Maureen Baran Stanford Nanofabrication Facility Lab Services Administrator mbaran at stanford.edu 650-725-3664 -------------- next part -------------- An HTML attachment was scrubbed... URL: From mtang at stanford.edu Wed May 19 00:14:56 2010 From: mtang at stanford.edu (Mary Tang) Date: Wed, 19 May 2010 00:14:56 -0700 Subject: Odor in Litho Message-ID: <4BF38FF0.1020507@stanford.edu> At 11:30 pm, two labmembers report a strange odor in the litho area described varyingly as chlorine-like and skunk-like. Please avoid or limit your time in the area until the odor dissipates. Thanks, Mary From tberg at stanford.edu Thu May 20 07:17:27 2010 From: tberg at stanford.edu (Ted Berg) Date: Thu, 20 May 2010 07:17:27 -0700 Subject: RTAGAAS Going down Message-ID: <4BF54477.6010006@stanford.edu> Hello All, As part of the lab capability upgrade the remaining 210 RTA -RTAGAAS will be going down on Tuesday June 1 to be replaced with 2each AW610 rtas we are hoping downtime will be as short as possible but 1 to 2 weeks is likely. Please plan in advance. During this time STSDEP will also be down for a couple of days for gas line tie ins . Thank you in advance for your understanding as the lab grows. ted From nklejwa at stanford.edu Fri May 21 12:32:31 2010 From: nklejwa at stanford.edu (Nathan K) Date: Fri, 21 May 2010 12:32:31 -0700 Subject: Flapping Nano Air Vehicles - Dr. Anita Flynn - Tuesday May 25 4-5pm - Allen/CIS-101X Message-ID: Flapping Nano Air Vehicles Tuesday, May 25, 2010 4:00-5:00 Allen 101X Anita Flynn MicroPropulsion Corp. Berkeley, California This talk will present Team MicroPropulsion?s results and lessons learned from the DARPA Nano Air Vehicle program, a challenge focused on designing a complete system for delivering a 2 g drop-off payload to a 1 km line-of-sight target (and return) by an aircraft capable of hovering for one minute at the target while communicating to a basestation, and yet able to fit in a 7.5 cm dia. x 7.5 cm long cylinder. The Flapping Nano Air Vehicle final report is available freely online at: http://www.micropropulsion.com/pubs/publications.htm After receiving her Ph.D. in EECS from MIT in 1995, Anita Flynn spent two years as a post-doctoral researcher and lecturer in UC Berkeley?s EECS Department. Since then, she has variously consulted, worked in start-ups, started MicroPropulsion, collaborated with UC Berkeley?s Smart Dust Group, and spent a year in UC Berkeley?s Mechanical Engineering Department as a visiting professor teaching smart product design. From Oct06 to Mar08, MicroPropusion was one of four prime contractors in the DARPA Nano Air Vehicle program. -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: Anita.Flynn.Seminar.May25.2010.pdf Type: file/unknown Size: 477860 bytes Desc: not available URL: From grahamab at stanford.edu Sat May 22 17:10:55 2010 From: grahamab at stanford.edu (Andrew Blake Graham) Date: Sat, 22 May 2010 17:10:55 -0700 (PDT) Subject: PhD Oral Examination :: Andrew Graham (Thursday, May 27th, 9:00am) Message-ID: <1686804333.7951.1274573455837.JavaMail.root@zm06.stanford.edu> Title: Methods for the wafer-scale encapsulation of MEMS Advisor: Thomas W. Kenny Date: Thursday, May 27th, 2010 Time: 9:00am Location: Allen Building/CIS-X Auditorium Abstract: The packaging of microelectromechanical systems (MEMS) is one of the most important design considerations in taking a product from a research environment to a commercial application. ?It must not only provide a suitably clean and stable environment for the device, but it should also withstand any harsh post-processing steps (such as wafer dicing and wire bonding) needed to integrate the device into its final system. ?As a result, the cost of packaging is typically a large portion of the overall cost of any commercial MEMS product.?? Addressing these needs for electrostatic silicon MEMS, we have developed multiple wafer-scale encapsulation techniques that allow for a wide range of devices to be fabricated in a single fabrication process. ?Expanding on the thin film, 'epi-seal' encapsulation technique developed jointly by Stanford University and Bosch, a packaging method was developed that makes use of a thick sacrificial oxide deposition and planarization to allow for large lateral deflection structures side-by-side with proven narrow gap devices.?? In an effort to further increase the capabilities of wafer-scale encapsulation, a process combining fusion wafer bonding and epitaxial reactor sealing was also developed. ?Unlike many packaging techniques using wafer bonding, the overall package size is only slightly bigger than the device itself and results in a stable, clean environment for the device. ?The final encapsulated part consists of a single crystal silicon structure free of native oxide inside a single crystal silicon cap layer. ?In addition, this encapsulation can support numerous process variations, such as oxide-coated composite device structures and the first MEMS devices packaged at the wafer scale using silicon migration. ? -------------- next part -------------- An HTML attachment was scrubbed... URL: From dslin824 at stanford.edu Sat May 22 22:14:14 2010 From: dslin824 at stanford.edu (Elvis Der-Song Lin) Date: Sat, 22 May 2010 22:14:14 -0700 Subject: PhD Oral Defense : Der-Song (Elvis) Lin, Thursday, May 27, 2010; 1pm, Packard 202 Message-ID: Department of Mechanical Engineering University PhD Dissertation Defense *Interface Engineering of Capacitive Micromachined Ultrasonic Transducers (CMUTs) for Medical Applications* Der-Song (Elvis) Lin Research Advisor: Professor B. T. Khuri-Yakub 27 May 2010 @1:00 p.m. in Packard Building, Room 202 (Refreshments at 12:45 p.m.) * * Abstract Over the last decade, capacitive micromachined ultrasonic transducers (CMUTs) have been widely studied in academia and industry. CMUTs provide many benefits over traditional piezoelectric transducers including improvement in performance through wide bandwidth, and ease of electronics integration, with the potential to batch fabricate very large 2D arrays with low-cost and high-yield. Though many aspects of CMUT technology have been studied over the years, packaging the CMUT into a fully practical system has not been thoroughly explored. Two important interfaces of packaging that this defense explores are the interface between CMUTs and patients, i.e., device encapsulation, and the interface between CMUTs and electronics, i.e., full electronic integration of large scale 2D arrays. In the first part of the talk I investigate the requirements for the CMUT encapsulation. For medical usage, encapsulation is needed to electrically insulate the device, mechanically protect the device, and maintain transducer performance, especially the access of the ultrasound energy. While many other MEMS devices can be protected by hermetic sealing, CMUTs require mechanical interaction to a fluid, which makes fulfilling the previous criteria very challenging. The proposed solution is to use a viscoelastic material with the glass-transition-temperature lower than the room-temperature, such as Polydimethylsiloxane (PDMS), to preserve the CMUT static and dynamic performance. Experimental implementation of the encapsulated imaging CMUT arrays shows the device performance was maintained; 95 % of efficiency, 85% of the maximum output pressure, and 91% of the fractional bandwidth (FBW) can be preserved. A viscoelastic finite element model was also developed and shows the performance effects of the coating can be accurately predicted. Three designs, providing lens focusing, acoustic crosstalk suppression and flexible substrate, using PDMS layer were also demonstrated. The second part of the talk presents contributions towards the electronic integration and packaging of large-area 2-D arrays. A very large 2D array is appealing for it can enable advanced novel imaging applications, such as a reconfigurable array, and a compression plate for breast cancer screening. With these goals in mind, I developed the first large-scale fully populated and integrated 2D CMUTs array with 32 by 192 elements. In this study, I demonstrate a flexible and reliable integration approach by successfully combining a simple UBM preparation technique and a CMUTs-interposer-ASICs sandwich design. The results show high shear strength of the UBM (26.5 g), 100% yield of the interconnections, and excellent CMUT resonance uniformity (s = 0.02 MHz). As demonstrated, this allows for a large-scale assembly of a tile-able array by using an interposer. Interface engineering is crucial towards the development of CMUTs into a practical ultrasound system. With the advances in encapsulation technique with a viscoelastic polymer and the combination of the UBM technique to the TSV fabrication for electronics integration, a fully integrated CMUT system can be realized. -- ------------------------------------------ Elvis Der-Song Lin Stanford University Ginzton Lab. Khuri-Yakub's Group Stanford CA, 94305 e-mail: elvislin at stanford.edu ------------------------------------------ -------------- next part -------------- An HTML attachment was scrubbed... URL: From shanswam at stanford.edu Mon May 24 13:14:43 2010 From: shanswam at stanford.edu (Shankar Swaminathan) Date: Mon, 24 May 2010 13:14:43 -0700 Subject: Reminder: PhD Oral Examination: Shankar Swaminathan (Thursday, May 27th, 9:30AM) Message-ID: * Nanoscale atomic-layer-deposited high-k gate oxides on Germanium:* *Interface engineering for highly-scaled MOS devices * Shankar Swaminathan Department of Materials Science and Engineering Advisor: Dr. Paul C. McIntyre Location: Bldg. 200 Rm. 002 (History Corner 200-002) Date: Thursday, May 27, 2010 Time: 9:30 AM (refreshments served at 9:15 AM) Germanium (Ge) has emerged as a promising candidate for surface channels in highly-scaled field-effect-transistors (FETs), as performance and reliability issues are likely to limit the use of conventional Si-based complementary-metal-oxide-semiconductor transistors. Lack of a high quality and stable thermal oxide of germanium has prompted interest in the use of high-*k* (high dielectric-constant) gate dielectrics on Ge channels. An interface layer (IL) between the high-*k* film and the Ge substrate appears to be necessary to avoid large defect densities characteristic of atomically-abrupt high-k (ZrO2 or HfO2)/Ge interfaces. Atomic layer deposition (ALD) is a useful high-*k *metal oxide film growth technique due to the precise nature of thickness control and uniformity of thickness for very thin films. The use of ALD to synthesize deposited ILs interposed between the Ge channel and an overlying high-*k* layer has not been studied extensively. In this context, we present three highlights from our work: First, we show that a pre-ALD surface functionalization by oxidant dosing improves the electrical characteristics of Pt/4nm ALD-Al2O3/p-Ge devices, as opposed to a conventional precursor-first ALD process. *In situ* x-ray photoelectron spectroscopy in the ALD ambient reveals the influence of hydroxyl (-OH) termination of the Ge surface in passivating dangling bonds that lead to fast trapping. The evolution of Ge-O bonding states during this pre-pulsing process is correlated with the observed improvements in hysteresis, frequency dispersion of the gate capacitance, and the passivation of fast (band-edge) and slow (midgap) interface states. Second, we present findings on the effects of scaling the physical thickness of the ALD-Al2O3 (down to 1 nm) on important electrical parameters such as interface state density (Dit), capacitance density, fixed charge and leakage current density. The ultrathin-ALD-Al2O3 / Ge interface shows no apparent interfacial suboxide (GeOx) while retaining a low Dit of 2x1011 cm-2 eV-1, indicating the potential of ALD-Al2O3 as an interface passivation layer. Aggressive gate capacitance scaling necessitates the use of so-called ?higher-k? dielectrics such as TiO2 (k > 25). However, the conduction band offset (CBO) of the TiO2/Ge interface is very low (~ 0.2eV), resulting in high gate leakage. We demonstrate that ultrathin (~ 1 nm) Al2O3 ILs, owing to their large bandgap (~ 6.6eV), enhance the CBO at the TiO2/Ge interface, and reduce the gate leakage by 4 to 6 orders of magnitude at flatband. The Pt-gated bilayer devices exhibit excellent C-V characteristics down to a capacitance-derived EOT of 1.2 nm. The permittivity of the amorphous/nanocrystalline ALD-TiO2 films was in the range of 32-35. Forming gas annealing is beneficial in lowering the interface state density via formation of monolayer-thickness interfacial GeO2. Post-annealed devices exhibited a minimum Dit ~ 3x1011 cm-2 eV-1 near midgap. Finally, we show that thermally activated electron transport into shallow defect states in the TiO2 (~0.25eV below the CB edge) near the TiO2/Al2O3 interface appears to be responsible for a temperature-dependent dispersion of the accumulation capacitance density. The passivation of these defects is important to fully realize the potential of novel bilayer high-*k*gate stacks on germanium channels. -------------- next part -------------- An HTML attachment was scrubbed... URL: From dsoto at stanford.edu Mon May 24 18:03:44 2010 From: dsoto at stanford.edu (Daniel Soto) Date: Mon, 24 May 2010 18:03:44 -0700 Subject: Daniel Soto PhD Dissertation Defense References: Message-ID: Department of Applied Physics University PhD Dissertation Defense Force Space Studies of Elastomeric Anisotropic Fibrillar Adhesives Daniel Ruben Soto Research Advisor: Professor Thomas Kenny 26 May 2010 @ 3:30 P.M. Allen Building (Formerly CIS-X), Room 101 ABSTRACT Research into the climbing ability of the gecko lizard revealed an adhesive system fundamentally different from existing synthetic adhesives. Instead of using a soft material, the gecko uses a complex system of hairs of beta-keratin, a material that is not tacky. This unique architecture affords the adhesive characteristics that make it well suited for climbing. Borrowing themes from the gecko, we developed a synthetic adhesive possessing similar properties using molded arrays of micron-scale silicone pillars. These arrays demonstrate the gecko property of frictional adhesion where increased shear stress at the interface leads to increased normal load capacity. To distinguish between intrinsic and emergent behavior, we also isolated single pillars to test on a dual-axis force-sensing cantilever capable of micro-Newton resolution. We observed that gecko-like properties were observed for tapered pillars but not for pillars of uniform cross-section. Most synthetic adhesive architectures use a uniform cross-section beam but these results suggest such a design does not capture gecko-like behavior. These results point to ways to optimize the type of adhesion demonstrated by the synthetic dry adhesives and to create adhesives tailored for the application. -------------- next part -------------- An HTML attachment was scrubbed... URL: From mtang at stanford.edu Tue May 25 08:03:39 2010 From: mtang at stanford.edu (Mary Tang) Date: Tue, 25 May 2010 08:03:39 -0700 Subject: Facilities work this morning Message-ID: <4BFBE6CB.20604@stanford.edu> Dear labmembers -- The Facilities group will be flushing the process chilled water system this morning. We don't anticipate problems, but as water pressure may momentarily increase, there is a possibility that some equipment subsystems may error. Maintenance are aware and reservations have been made on the sensitive equipment. If you encounter any problems this morning, please let staff know. Things should be flushed by 10 am. Thanks for your attention -- Your SNF Staff -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From audet at stanford.edu Tue May 25 10:08:38 2010 From: audet at stanford.edu (Ross Audet) Date: Tue, 25 May 2010 10:08:38 -0700 Subject: Special seminar - Prof. Alan Willner, USC -- Thurs, May 27, 4:15 PM, AP200 Message-ID: <002101cafc2c$eb365ed0$c1a31c70$@stanford.edu> Special Seminar Presented by the Stanford Optical Society Towards Robust and Reconfigurable Optical Communication Systems Alan Willner Professor, Ming Hsieh Dept. of Electrical Engineering, University of Southern California Thursday, May 27, 4:15 PM, Applied Physics 200 Refreshments at 4:00 PM Optical communications has enjoyed dramatic growth in terms of technical achievement as well as commercial implementation. This presentation will highlight three main topics. Firstly, a broad perspective will be given on some of the technical trends in optical communication systems. Secondly, I will describe technical issues related to stable, robust optical networking, including: performance monitoring to determine the cause of any data degradations, non-static channel-degrading effects, spectrally efficient modulation formats, targeted optical and electrical signal processing, and photonic switching. Finally, I will discuss adding tunability, flexibility and reconfigurability to different aspects of the base optical technologies. About the speaker: Alan Willner received the Ph.D. from Columbia University, has worked at AT&T Bell Labs and Bellcore, and is Professor of EE at USC. He has received the NSF Presidential Faculty Fellows Award from the White House, Packard Foundation Fellowship, NSF National Young Investigator Award, Fulbright Foundation Senior Scholars Award, OSA Leadership Award, IEEE Photonics Society Distinguished Traveling Lecturer Award, USC University-Wide Award for Excellence in Teaching, IEEE Fellow, OSA Fellow, Eddy Paper Award from Pennwell Publications for the Best Contributed Technical Article, and Armstrong Foundation Award. Prof. Willner has been President of IEEE Photonics Society, Editor-in-Chief of IEEE/OSA Journal of Lightwave Technology, Editor-in-Chief of Optics Letters, Editor-in-Chief of IEEE Journal of Selected Topics in Quantum Electronics, Co-Chair of OSA Science & Engineering Council, General Co-Chair of CLEO, General Chair of LEOS Annual Meeting, Program Co-Chair of OSA Annual Meeting, and Chair of IEEE TAB Ethics Committee. He has 800 publications, including 25 patents and 2 books. -------------- next part -------------- An HTML attachment was scrubbed... URL: From rthowe at stanford.edu Tue May 25 15:52:46 2010 From: rthowe at stanford.edu (Roger T. Howe) Date: Tue, 25 May 2010 15:52:46 -0700 Subject: Anita Flynn seminar: flying nanorobots, 4 pm Allen 101X!! Message-ID: <4BFC54BE.20800@stanford.edu> All, Neat seminar -- one of the nano air vehicles arrived via fedex this morning and you'll be able to see it. Roger Flapping Nano Air Vehicles Anita Flynn MicroPropulsion Corp. Berkeley, California Abstract This talk will present Team MicroPropulsion?s results and lessons learned from the DARPA Nano Air Vehicle program, a challenge focused on designing a complete system for delivering a 2 g drop-off payload to a 1 km line-of-sight target (and return) by an aircraft capable of hovering for one minute at the target while communicating to a basestation, and yet able to fit in a 7.5 cm dia. x 7.5 cm long cylinder. MicroPropulsion led a team of 3 universities, 7 small companies, 2 divisions of a government laboratory and 3 independent consultants. Our team proposed a flapping solution, for the purpose of natural stealth. This talk will delve into the repurcussions of that choice, the scientific inquiries made in its pursuit, and all the engineering tradeoffs involving guidance, electronics, power, motors and control. The Flapping Nano Air Vehicle final report is available freely online at: http://www.micropropulsion.com/pubs/publications.htm From bahlg at stanford.edu Wed May 26 09:39:20 2010 From: bahlg at stanford.edu (Gaurav Bahl) Date: Wed, 26 May 2010 09:39:20 -0700 Subject: PhD Orals - Gaurav Bahl, Thursday, May 27, 2010; 4:30pm Message-ID: <4BFD4EB8.8010107@stanford.edu> Stanford University PhD Oral Examination - Gaurav Bahl Department of Electrical Engineering Title: Charge and Frequency Drift Control in Resonant Electrostatic MEMS Research Advisor: Prof. Thomas W. Kenny Date: Thursday, May 27, 2010 Time: 4:30 pm Location: CIS-X 101 (Auditorium) Abstract : Dielectrics play an important role as structural and electronic materials in many kinds of micro/nanoscale systems (such as CMOS and MEMS). However, it is also well known that dielectrics are susceptible to various charging phenomena. Charge build-up and charge motion can vary floating voltages, discharge electrodes, or screen electrode potentials, affecting the overall properties of these devices. In MEMS, these effects can include unpredictable actuation forces, frequency drifts, and deteriorated signal transduction. In our group, recent work has shown that SiO2-coated silicon MEMS resonators have very desirable frequency vs. temperature characteristics, making them ideal as a lower cost, lower power replacement for quartz resonators, for the purpose of clocks and frequency references. However, as SiO2 is a dielectric, these resonators are also susceptible to adverse effects due to dielectric charge. In this talk I will present a model describing the effects of fixed and mobile dielectric charge on the frequency of these resonators. Further, I will show how purely AC polarization of these resonators improves frequency stability by eliminating charge drift, and removes the first order dependence on fixed charge-induced offsets. Finally, I will discuss oscillator design with these AC polarized resonators, including a number of interesting implications regarding these oscillators. From sroonter at stanford.edu Wed May 26 11:21:41 2010 From: sroonter at stanford.edu (Saeroonter Oh) Date: Wed, 26 May 2010 11:21:41 -0700 Subject: PhD Oral Examination - Saeroonter Oh, Friday, May 28, 2010, 10:00AM Message-ID: Stanford University EE PhD Oral Examination * * *Modeling of III-V FETs for Beyond-22nm Logic Circuits* Speaker: Saeroonter Oh Advisor: Professor H.-S. Philip Wong * * Department of Electrical Engineering, Stanford University * * *Date:* Friday, May 28, 2010 *Time:* 10 AM (Refreshments served at 9:45AM) *Location:* Paul Allen Auditorium (CISX-101) *Abstract* For beyond-22nm CMOS technology, III-V FETs are considered a compelling candidate for extending the device scaling limit of low-power and high-speed operation, owing to their superb carrier transport properties and recent experimental advancements. In this talk, device modeling and circuit analysis are used to study the key considerations for III-V logic circuits to be viable. One of the requirements for VLSI logic is device density. A study on device footprint scaling and the impact of parasitic elements on circuit performance is presented. A physics-based compact model for III-V FETs is introduced for accurate circuit-level performance estimation and digital circuit design. The model encompasses effects essential for logic applications that are not generally considered in other III-V models, such as field-dependent quasi-ballistic ratios, trapezoidal quantum-well energies, and capacitances with 2D potential information. We apply the compact model in various circuit environments to demonstrate the capability of the model and also to project performance and power trends for beyond-22nm technology. In particular, we study the circuit performance of sub-22nm SRAM circuits using III-V MOSFETs with high-k dielectrics and propose a minimum requirement for the III-V PMOS strength for All-III-V SRAM to be viable. -------------- next part -------------- An HTML attachment was scrubbed... URL: From grahamab at stanford.edu Wed May 26 09:55:07 2010 From: grahamab at stanford.edu (Andrew Blake Graham) Date: Wed, 26 May 2010 09:55:07 -0700 (PDT) Subject: Reminder: PhD Oral Examination :: Andrew Graham (Thursday, May 27th, 9:00am) In-Reply-To: <1473227650.94185.1274855479320.JavaMail.root@zm06.stanford.edu> Message-ID: <1921095223.102726.1274892907957.JavaMail.root@zm06.stanford.edu> Title: Methods for the wafer-scale encapsulation of MEMS Advisor: Thomas W.?Kenny Date: Thursday, May 27th, 2010 Time: 9:00am (refreshments/snacks served at 8:45am) Location: Allen Building/CIS-X Auditorium ? Abstract: ? The packaging of microelectromechanical systems (MEMS) is one of the most important design considerations in taking a product from a research environment to a?commercial application.? It must not only provide a suitably clean and stable environment for the device, but?it should also withstand any harsh post-processing steps (such as wafer dicing and wire bonding) needed to integrate the device into its final system.? As a result, the cost of packaging is typically a large portion of the overall cost of any commercial MEMS product.? ? Addressing these needs for electrostatic silicon MEMS, we have developed multiple wafer-scale encapsulation techniques that allow for a wide range of devices to be fabricated in a single fabrication process.? Expanding on the thin film, 'epi-seal'?encapsulation technique developed jointly by Stanford University and Bosch,?a packaging method was developed that makes use of?a thick sacrificial oxide deposition and planarization to allow for large lateral deflection structures side-by-side with proven narrow gap devices.? ? In an effort to further increase the capabilities of wafer-scale encapsulation, a process combining fusion wafer bonding and epitaxial reactor sealing?was also developed.? Unlike many packaging techniques using wafer bonding, the overall package size?is only slightly bigger than the device itself and results in a stable, clean environment for the device.? The final encapsulated part consists of a single crystal silicon structure free of native oxide inside a single crystal silicon cap layer.? In addition, this encapsulation?can support numerous process variations, such as oxide-coated composite device structures and the first MEMS devices packaged at the wafer scale using silicon migration.? ? ? -------------- next part -------------- An HTML attachment was scrubbed... URL: From dslin824 at stanford.edu Wed May 26 15:47:12 2010 From: dslin824 at stanford.edu (Elvis Der-Song Lin) Date: Wed, 26 May 2010 15:47:12 -0700 Subject: Reminder: PhD Oral Defense : Der-Song (Elvis) Lin, Thursday, May 27, 2010; 1pm, Packard 202 Message-ID: > > Department of Mechanical Engineering > University PhD Dissertation Defense > > > *Interface Engineering of Capacitive Micromachined Ultrasonic Transducers > (CMUTs) for Medical Applications* > > Der-Song (Elvis) Lin > Research Advisor: Professor B. T. Khuri-Yakub > > 27 May 2010 @1:00 p.m. > in > Packard Building, Room 202 > (Delicious food at 12:45 p.m.) > * > * > Abstract > > Over the last decade, capacitive micromachined ultrasonic transducers > (CMUTs) have been widely studied in academia and industry. CMUTs provide > many benefits over traditional piezoelectric transducers including > improvement in performance through wide bandwidth, and ease of electronics > integration, with the potential to batch fabricate very large 2D arrays with > low-cost and high-yield. Though many aspects of CMUT technology have been > studied over the years, packaging the CMUT into a fully practical system has > not been thoroughly explored. Two important interfaces of packaging that > this defense explores are the interface between CMUTs and patients, i.e., > device encapsulation, and the interface between CMUTs and electronics, i.e., > full electronic integration of large scale 2D arrays. > > In the first part of the talk I investigate the requirements for the > CMUT encapsulation. For medical usage, encapsulation is needed to > electrically insulate the device, mechanically protect the device, and > maintain transducer performance, especially the access of the ultrasound > energy. While many other MEMS devices can be protected by hermetic sealing, > CMUTs require mechanical interaction to a fluid, which makes fulfilling the > previous criteria very challenging. The proposed solution is to use a > viscoelastic material with the glass-transition-temperature lower than the > room-temperature, such as Polydimethylsiloxane (PDMS), to preserve the CMUT > static and dynamic performance. Experimental implementation of the > encapsulated imaging CMUT arrays shows the device performance was > maintained; 95 % of efficiency, 85% of the maximum output pressure, and 91% > of the fractional bandwidth (FBW) can be preserved. A viscoelastic finite > element model was also developed and shows the performance effects of the > coating can be accurately predicted. Three designs, providing lens focusing, > acoustic crosstalk suppression and flexible substrate, using PDMS layer were > also demonstrated. > > The second part of the talk presents contributions towards the > electronic integration and packaging of large-area 2-D arrays. A very large > 2D array is appealing for it can enable advanced novel imaging applications, > such as a reconfigurable array, and a compression plate for breast cancer > screening. With these goals in mind, I developed the first large-scale fully > populated and integrated 2D CMUTs array with 32 by 192 elements. In this > study, I demonstrate a flexible and reliable integration approach by > successfully combining a simple UBM preparation technique and a > CMUTs-interposer-ASICs sandwich design. The results show high shear strength > of the UBM (26.5 g), 100% yield of the interconnections, and excellent CMUT > resonance uniformity (s = 0.02 MHz). As demonstrated, this allows for a > large-scale assembly of a tile-able array by using an interposer. > > Interface engineering is crucial towards the development of CMUTs > into a practical ultrasound system. With the advances in encapsulation > technique with a viscoelastic polymer and the combination of the UBM > technique to the TSV fabrication for electronics integration, a fully > integrated CMUT system can be realized. > > -- > ------------------------------------------ > Elvis Der-Song Lin > Stanford University > Ginzton Lab. > Khuri-Yakub's Group > Stanford CA, 94305 > e-mail: elvislin at stanford.edu > ------------------------------------------ > -------------- next part -------------- An HTML attachment was scrubbed... URL: From audet at stanford.edu Thu May 27 10:39:33 2010 From: audet at stanford.edu (Ross Audet) Date: Thu, 27 May 2010 10:39:33 -0700 Subject: TODAY, 4:15pm: Special seminar - Prof. Alan Willner, USC Message-ID: <000901cafdc3$91b41a30$b51c4e90$@stanford.edu> Special Seminar Presented by the Stanford Optical Society Towards Robust and Reconfigurable Optical Communication Systems Alan Willner Professor, Ming Hsieh Dept. of Electrical Engineering, University of Southern California Thursday, May 27, 4:15 PM, Applied Physics 200 Refreshments at 4:00 PM Optical communications has enjoyed dramatic growth in terms of technical achievement as well as commercial implementation. This presentation will highlight three main topics. Firstly, a broad perspective will be given on some of the technical trends in optical communication systems. Secondly, I will describe technical issues related to stable, robust optical networking, including: performance monitoring to determine the cause of any data degradations, non-static channel-degrading effects, spectrally efficient modulation formats, targeted optical and electrical signal processing, and photonic switching. Finally, I will discuss adding tunability, flexibility and reconfigurability to different aspects of the base optical technologies. About the speaker: Alan Willner received the Ph.D. from Columbia University, has worked at AT&T Bell Labs and Bellcore, and is Professor of EE at USC. He has received the NSF Presidential Faculty Fellows Award from the White House, Packard Foundation Fellowship, NSF National Young Investigator Award, Fulbright Foundation Senior Scholars Award, OSA Leadership Award, IEEE Photonics Society Distinguished Traveling Lecturer Award, USC University-Wide Award for Excellence in Teaching, IEEE Fellow, OSA Fellow, Eddy Paper Award from Pennwell Publications for the Best Contributed Technical Article, and Armstrong Foundation Award. Prof. Willner has been President of IEEE Photonics Society, Editor-in-Chief of IEEE/OSA Journal of Lightwave Technology, Editor-in-Chief of Optics Letters, Editor-in-Chief of IEEE Journal of Selected Topics in Quantum Electronics, Co-Chair of OSA Science & Engineering Council, General Co-Chair of CLEO, General Chair of LEOS Annual Meeting, Program Co-Chair of OSA Annual Meeting, and Chair of IEEE TAB Ethics Committee. He has 800 publications, including 25 patents and 2 books. -------------- next part -------------- An HTML attachment was scrubbed... URL: From jkoma at stanford.edu Thu May 27 14:42:24 2010 From: jkoma at stanford.edu (Jason Komadina) Date: Thu, 27 May 2010 14:42:24 -0700 Subject: sputtering porous films Message-ID: <4BFEE740.2050104@stanford.edu> Does anyone know of a campus resource for sputtering porous metals? Metallica may be an option, but I do not have experience depositing porous films with it. Specifically I need porous PtRu. Thanks! Jason From svo at stanford.edu Thu May 27 18:30:48 2010 From: svo at stanford.edu (Sonny Vo) Date: Thu, 27 May 2010 18:30:48 -0700 Subject: pdms question Message-ID: <000001cafe05$6709af60$351d0e20$@edu> Hello labmembers, Does anyone have experience working with PDMS? I am trying to get a small volume for an experiment involving liquid tension/viscosity. Thank you in advance. Best Regards, SonnyV --------------- "What makes the desert beautiful," said the Little Prince ,"is that somewhere it hides a well ." _.--. _ ;,- `' ( ,,, ( E#=====#############=: ] :_"' ,._( ``` `--' rock on Sonny Vo Ph.d candidate Department of Applied Physics, Stanford University (626) 216-4597 Harris Research Group: http://snow.stanford.edu/index.html -------------- next part -------------- An HTML attachment was scrubbed... URL: From jsnapp at stanford.edu Fri May 28 14:21:16 2010 From: jsnapp at stanford.edu (Justin Snapp) Date: Fri, 28 May 2010 14:21:16 -0700 Subject: Flexures In MEMS seminar - Roman Gutierrez - Tuesday June 1 4-5pm Allen/CIS-101X Message-ID: <703632B2-8569-4764-865E-F2CC4055829A@stanford.edu> Flexures in MEMS Tuesday, June 1, 2010 4:00-5:00 pm Allen 101X Auditorium Roman Gutierrez Tessera Arcadia, California Abstract Flexures are commonly used in Micro Electro Mechanical Systems (MEMS) to introduce compliance into sensors and resonators, allowing them to respond to physical excitations such as acceleration, pressure, or electrostatic force. However, MEMS flexures can be used to serve a variety of additional purposes, including motion control, thermal coefficient of expansion (TCE) compensation and alignment. In optical products, such as MEMS based cell phone cameras, flexures enable MEMS to interface seamlessly with separate components manufactured using more traditional processes, such as plastic injection molding. This talk will present some of these unique flexure systems, and describe some of the considerations in their design. As an example, the MEMS flexures used in the cell phone camera for Motorola?s Ming A1600 will be described. Speaker Bio After 10 years at NASA?s Jet Propulsion Laboratory working on high precision laser metrology and MEMS based gyroscopes, Roman Gutierrez co-founded SiWave (aka Siimpel) in 2000 to develop MEMS optical switches. The company was acquired by Tessera in 2010, and Roman continues as CTO/VP Engineering for the MEMS division. Mr. Gutierrez is a pioneer in the application of MEMS and Optics to new product development and has authored 52 issued patents and over 30 patents pending. He received his BS in Applied Physics from the California Institute of Technology, and his MS in Electrical Engineering from the University of California Santa Barbara. -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: R.Gutierrez.June1.2010.pdf Type: application/pdf Size: 346343 bytes Desc: not available URL: -------------- next part -------------- An HTML attachment was scrubbed... URL: From mtang at stanford.edu Fri May 28 14:42:10 2010 From: mtang at stanford.edu (Mary Tang) Date: Fri, 28 May 2010 14:42:10 -0700 Subject: Lab Water Shutdown Scheduled for Monday, June 7 Message-ID: <4C0038B2.3070900@stanford.edu> Dear Labmembers -- Facilities is planning repairs which will require shutdown of the Process Chilled Water (PCW) system in the building. This is currently scheduled for Monday, June 7, starting at around 7 am and will take several hours to complete. PCW is used on many tools and subsystems. It is also used for the air compressors for CDA (Clean Dry Air) which is used to drive valves on most tools. So we anticipate that most tools in the lab may be unavailable for use during this time. Some tools will also require additional time to recover following PCW loss. We want you to be aware of this so that you can plan accordingly -- and will inform you of any changes in plans. Thanks for your patience -- Your SNF staff -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From popomoo at stanford.edu Sat May 29 08:57:44 2010 From: popomoo at stanford.edu (SangMoo Jeong) Date: Sat, 29 May 2010 08:57:44 -0700 Subject: odor in litho area Message-ID: Hi, labmembers. I smelled a strange odor in the litho area, especially near YES oven region. I have no idea where it comes from. Please be careful. -- Sangmoo Jeong Graduate student Department of Electrical Engineering Stanford University Email: popomoo at gmail.com Phone: 650-704-3295 -------------- next part -------------- An HTML attachment was scrubbed... URL: From gsosa at stanford.edu Sat May 29 15:03:57 2010 From: gsosa at stanford.edu (Gary J Sosa) Date: Sat, 29 May 2010 15:03:57 -0700 (PDT) Subject: odor in litho area In-Reply-To: Message-ID: <1336420310.944071.1275170637813.JavaMail.root@zm08.stanford.edu> Hi Labmembers... The odor/smell is in the L100 aisle of the Litho area. Mainly in the trianle between the Yes Oven, ASML Stepper and Large Blue M oven. It does not appear to be a solvent or resist smell. It is like a burning smell. Checked all tools. None appear to be malfunctioning. Could not find source of smell. Notified SNF after hours cell phone and Stanford work control. Work control will contact appropriate people and investigate. ..Gary ----- Original Message ----- From: "SangMoo Jeong" To: labmembers at snf.stanford.edu Sent: Saturday, May 29, 2010 8:57:44 AM Subject: odor in litho area Hi, labmembers. I smelled a strange odor in the litho area, especially near YES oven region. I have no idea where it comes from. Please be careful. -- Sangmoo Jeong Graduate student Department of Electrical Engineering Stanford University Email: popomoo at gmail.com Phone: 650-704-3295 From amroy at stanford.edu Sat May 29 16:27:24 2010 From: amroy at stanford.edu (Arunanshu Roy) Date: Sat, 29 May 2010 16:27:24 -0700 Subject: odor in litho area In-Reply-To: References: Message-ID: Does anybody know if the odour has cleared? Is the litho area safe for working now? On Sat, May 29, 2010 at 8:57 AM, SangMoo Jeong wrote: > Hi, labmembers. > > I smelled a strange odor in the litho area, especially near YES oven > region. > I have no idea where it comes from. Please be careful. > > > > -- > Sangmoo Jeong > > Graduate student > Department of Electrical Engineering > Stanford University > Email: popomoo at gmail.com > Phone: 650-704-3295 > -------------- next part -------------- An HTML attachment was scrubbed... URL: From shott at stanford.edu Sun May 30 08:52:46 2010 From: shott at stanford.edu (John Shott) Date: Sun, 30 May 2010 08:52:46 -0700 Subject: Litho odor update ... Message-ID: <4C0289CE.8010305@stanford.edu> SNF Lab Members: As of 8:45 Sunday morning, I can detect no odors in the lithography areas. Note: as this is hay fever season, I may not be in possession of the most sensitive detector. Should you detect a recurrence of that odor, please report it. If it is a strong odor it is always safest to leave the area. Thanks, John From ludwig.galambos at gmail.com Sun May 30 13:14:50 2010 From: ludwig.galambos at gmail.com (Ludwig G.) Date: Sun, 30 May 2010 13:14:50 -0700 Subject: odor in litho area In-Reply-To: References: Message-ID: As of Sunday 1pm, there is very little smell/odor left Litho area, mostly around Blue M/Yes To me it feels like the insulation of an overheard transformer Ludwig On Sat, May 29, 2010 at 4:27 PM, Arunanshu Roy wrote: > Does anybody know if the odour has cleared? Is the litho area safe for > working now? > > > On Sat, May 29, 2010 at 8:57 AM, SangMoo Jeong wrote: > >> Hi, labmembers. >> >> I smelled a strange odor in the litho area, especially near YES oven >> region. >> I have no idea where it comes from. Please be careful. >> >> >> >> -- >> Sangmoo Jeong >> >> Graduate student >> Department of Electrical Engineering >> Stanford University >> Email: popomoo at gmail.com >> Phone: 650-704-3295 >> > > -------------- next part -------------- An HTML attachment was scrubbed... URL: