Recipe 1

Mary Tang mtang at stanford.edu
Tue Sep 20 13:04:18 PDT 2011


Hi Chia-Ming --

Do you have a photo you could send?  If so, please do send.

There are a number of reasons why the walls would not be straight.  We 
could have a machine problem -- a photo might help diagnose this.  It 
would also help to know if you see this problem across the whole wafer 
or just in the center or the edge.

Another reason might be that recipe 1 is really optimized for CMOS poly 
gates -- that is, good definition of relatively isolated poly lines.  It 
sounds like you have the opposite case -- something more like contact 
holes.  There are a number of side effects you get constraining the 
etching reaction.  There is good info on Cl2/HBr etching here: 
http://www.clarycon.com/
with more specifics about the trenching profiles here:  
http://www.clarycon.com/trenching2%28plasm.html

I will also run an etch test wafer to see if we're OK there.

Mary

On 9/20/2011 11:03 AM, Chia-Ming Chang wrote:
> Dear Lampoly user,
>
> I used recipe 1 for my anisotropic silicon etch, and expected to see straight sidewall. I have an array of holes with 500nm in diameter and SiO2 as hard mask. I want to etch down into single crystal silicon for 1.5um. However, the sidewalls are not straight from SEM; instead, I got a V-shape. I thought recipe 1 should be very straight, and I was wondering if people have developed different recipes for anisotropic silicon etch in Lampoly.
>
> Thanks,
> Chia-Ming


-- 
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
Paul G. Allen Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu




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