From insun at stanford.edu  Fri Jul  8 14:44:38 2011
From: insun at stanford.edu (Insun Park)
Date: Fri, 8 Jul 2011 14:44:38 -0700
Subject: question about etching oxide on thin double-polished Si wafer (300um thick)
Message-ID: <CAFUs8nZVgQ3jkSx=FxF3LmEzTi3MuTJ4+vek3dWGoFXmyk7vhQ@mail.gmail.com>

Dear p5000 users,

I tried to etch 2um thick thermal oxide grown on thin double-polished Si
wafer (300um thick), but after 10 seconds of main etch step, the process
stopped.
I found that He leak in chamber monitor screen is high reaching 8sccm.
I am suspecting that thin wafers may cause He leak.

Does anyone have experience with etching oxide on thin double-polished
wafer?

Thanks,

Insun
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From ysohn at stanford.edu  Tue Jul 26 20:54:29 2011
From: ysohn at stanford.edu (Young Ik Sohn)
Date: Tue, 26 Jul 2011 20:54:29 -0700 (PDT)
Subject: p5000 released 08:00~09:30 AM tomorrow(Wed)
Message-ID: <1350491619.474811.1311738869139.JavaMail.root@zm08.stanford.edu>

sample not ready