From mtang at snf.stanford.edu  Tue Sep  2 07:59:55 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Tue, 02 Sep 2003 07:59:55 -0700
Subject: external ebeam processing
References: <web-52138791@california.com> <3F4BF1D9.81F26274@snf.stanford.edu>
Message-ID: <3F54B06B.87A0B99A@snf.stanford.edu>

Hi all --

I'm just following up on this, to summarize approvals for August...  I
gather from previous emails that this has been approved for litho tools
(coaters and solvent bench, I presume, as it's an ebeam resist.)  However, I
gather that the request is also for lampoly -- is this approved for
lampoly?  And will this be cleaned, as suggested by Jim, at wbsolvent in
1165?  (Any O2 plasma treatment recommended? And if so, which equipment?)

Thanks,

Mary

Jim McVittie wrote:

> Hi Ben,
>
> Thank for the web site. I had not been looking at the Cornell. Any other
> app note info on NEB would be useful. I collect all litho relates
> app-notes that I can get my hands on.
>
> The big problem with negative resists is that they do not come off very
> well in polar (water based) solvents. This is why Cornell is
> recommanding an overnight soak in Shipley (NMP) 1165 to strip it off.
> Negative resists can be quite useful but they tend to be a pain to deal
> with.
>
>     Jim
>
> Benjamin Chui wrote:
>
> > Mary, Nancy et al,
> >
> >      Would NEB (a negative ebeam resist) be allowed in SNF?
> >  Here's a link to Cornell's CNF page that mentions it:
> >
> > http://www.cnf.cornell.edu/ebeam/resist.html#NEB
> >
> >      I'm trying to get the formal MSDS and chemical data
> > for it.  Will let you know as soon as I get more info.
> >
> > Thanks,
> >
> > Ben
> >
> > On Wed, 20 Aug 2003 15:30:17 -0700
> >  Mary Tang <mtang at snf.stanford.edu> wrote:
> > > Hi Nancy, Ben, and fellow SpecMat'ers --
> > >
> > > I'm not a lampoly person, so may be off-base here...  But
> > > I would think that
> > > this would not be a problem if the SOG were
> > > electronics-grade, as most
> > > are...
> > >
> > > Mary
> > >
> > > Nancy Latta wrote:
> > >
> > > > Hi Ben,
> > > >
> > > > We have recently etched wafers with PMMA (and have
> > > selectivity data, see
> > > > Henry) in lampoly, so I thin that is ok.  The problem
> > > may be with the
> > > > spin on glass.
> > > >
> > > > To answer this, I have cc'd our Special Materials
> > > committee on this
> > > > conversation.
> > > >
> > > >                                 Nancy
> > > >
> > > > Benjamin Chui wrote:
> > > > > Hi Nancy,
> > > > >
> > > > >      My boss at IBM Almaden wants me to try out its
> > > new
> > > > > in-house ebeam machine, and I was wondering if I can
> > > take
> > > > > test wafers exposed in that machine back into SNF for
> > > > > silicon etching in LamPoly.  (The test wafers would
> > > likely
> > > > > be blank silicon wafers with ebeam-compatible resist,
> > > e.g.
> > > > > PMMA or spin-on-glass.) The IBM machine is usually
> > > used for
> > > > > patterning magnetic films, but the films are always
> > > covered
> > > > > with resist when they enter the machine, and the
> > > engineer
> > > > > assured me there's no chance of cross-contamination.
> > > > >
> > > > >      If you could give me any info about what's
> > > required to
> > > > > be able to bring the wafers back into SNF that'd be
> > > great.
> > > > >  Thanks a lot!
> > > > >
> > > > > Ben Chui
> > > >
> > > > --
> > > > Nancy Latta
> > > > Stanford Nanofabrication Facility
> > > > CIS Room 145
> > > > 420 Via Palou Mall
> > > > Stanford, CA 94305-4070
> > > > (650) 725-6727
> > > > latta at snf.stanford.edu
> > >
> > > --
> > > Mary X. Tang, Ph.D.
> > > National Nanofabrication Users' Network
> > > Stanford Nanofabrication Facility
> > > CIS Room 136, Mail Code 4070
> > > Stanford, CA  94305
> > > (650)723-9980
> > > mtang at stanford.edu
> > > http://snf.stanford.edu
> > >
> > >

--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu




From mtang at snf.stanford.edu  Tue Sep  2 08:20:54 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Tue, 02 Sep 2003 08:20:54 -0700
Subject: SpecMat request - oxygen plasma Polyimide etching in STS etcher
References: <3F414BA9.2030501@snf.stanford.edu> <3F42A7A9.84DC6BF6@snf.stanford.edu> <3F453A89.50506@snf.stanford.edu>
Message-ID: <3F54B556.96C2C9B9@snf.stanford.edu>

Hi all --

I'm doing the SpecMat wrap up for August...  Was there a final answer this
request from Randy?  (Jim, I take it this is really your baby -- what was your
verdict?)

Thanks,

Mary

Randy True wrote:

> Jim,
>
> Thanks for the quick response.
>
> My polyimide etch process will have a similar effect to an oxygen plasma
> clean so I'd propose to do the same conditioning as what is done after
> an oxygen clean step, namely a 20min deep silicon etch on a photoresist
> patterned Si wafer. To test this protocol, I would run and additional
> patterned Si wafer after the conditioning wafer and measure the etch
> rate. How does that sound?
>
> --Randy
>
> Jim McVittie wrote:
>
> >Randy,
> >
> >My question is how is your proposed process going affect the current STS
> >etch processes.
> >Your process will tend to strip off any polymer on the chamber walls and
> >thus could change the
> >equilibrium gas concentration is subsequent Si etching for some unknown
> >number of wafers. Can you propose how we might be able to determine that
> >this is not happening or how you could guarantee that the chamber is back
> >to the equilibrium wall chemistry after your etch. Your process and post
> >etch chamber seasoning must be such that the next user gets the same
> >results as if you had been doing a standard deep Si etch.
> >
> >    Jim
> >
> >
> >Randy True wrote:
> >
> >
> >
> >>I would like to etch a polyimide film with an oxygen plasma in the STS
> >>etcher. The wafer consists of a metal hard mask (Al/Ti bilayer) on an
> >>8um thick layer of cured polyimide (PI2611). The wafers will be coming
> >>from the metal chamber of the P5000 and are non-gold contaminated.
> >>Currently, I am doing the etch in the PQuest with a mixture of Ar and
> >>O2. I have also done this etch successfully on an Alcatel deep silicon
> >>etcher, the 601E, at their Boston demonstration facility.
> >>
> >>Thanks,
> >>Randy True
> >>
> >>

--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu




From mtang at snf.stanford.edu  Tue Sep  2 08:44:33 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Tue, 02 Sep 2003 08:44:33 -0700
Subject: Summary for August
Message-ID: <3F54BAE1.936151EF@snf.stanford.edu>

Hi all --

Here's a summary (I think) of SpecMat approvals for August.  There are,
I think, still a couple of outstanding requests, but otherwise, I think
they are all captured here.  Please let me know if you think...

Mary

--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu

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From bchui at california.com  Tue Sep  2 12:24:33 2003
From: bchui at california.com (Benjamin Chui)
Date: Tue, 02 Sep 2003 12:24:33 -0700
Subject: external ebeam processing
In-Reply-To: <3F54B06B.87A0B99A@snf.stanford.edu>
Message-ID: <web-52928719@california.com>

Hi Mary, Jim, Nancy, and other SpecMat'ers,

     Actually it turns out NEB is not really a viable
choice at IBM Almaden, so we've decided to go back to the
HSQ spin-on-glass approach with durimide.  Let me give you
as much detail as I can about the envisioned process:

Goal: to etch 1 micron tall, 0.1 micron wide "walls" in
silicon.

Starting substrate: blank silicon 4-inch wafer with
1300-Angstrom thermally grown oxide

Films applied at IBM:
1) HSQ (a type of spin-on-glass; still looking for MSDS on
that; will provide you with copy ASAP).  Thickness approx
0.2 micron

2) Durimide (a formulation of gamma butyrolactone and
"Isobenzofurandione, polymer with aminophenyl indene
amine") (I have paper copy of MSDS; will give to you next
time I'm at SNF)

Litho done at IBM:
E-beam write 0.1 micron lines in HSQ (behaves as negative
resist); develop away the unexposed HSQ (underlying
durimide untouched).

Subsequent processing done at SNF:
1) Using HSQ as mask, oxygen-plasma-etch away exposed
durimide.
2) Using HSQ-durimide lines as mask, plasma-etch thermal
oxide layer down to underlying silicon
3) Using HSQ-durimide-oxide lines as mask, plasma-etch down
1 micron into silicon with LamPoly, forming the desired
'walls'.
4) Remove HSQ, durimide and oxide all at once in HF.
 (durimide won't dissolve in the HF but will be removed as
a result of lift-off action by the oxide.)


     Obviously, there are a number of unknowns in this
proposed sequence in terms of feasibility and approval, so
I'd like you to advice on whether this process is feasible,
or if alternate processes are preferred.  Also, if you
think the Stanford e-beam process is more acceptable inside
the lab, please let me know and I'll work on developing
that process in parallel.

Thanks very much for your help!

Ben Chui




     On Tue, 02 Sep 2003 07:59:55 -0700
 Mary Tang <mtang at snf.stanford.edu> wrote:
> Hi all --
> 
> I'm just following up on this, to summarize approvals for
> August...  I
> gather from previous emails that this has been approved
> for litho tools
> (coaters and solvent bench, I presume, as it's an ebeam
> resist.)  However, I
> gather that the request is also for lampoly -- is this
> approved for
> lampoly?  And will this be cleaned, as suggested by Jim,
> at wbsolvent in
> 1165?  (Any O2 plasma treatment recommended? And if so,
> which equipment?)
> 
> Thanks,
> 
> Mary
> 
> Jim McVittie wrote:
> 
> > Hi Ben,
> >
> > Thank for the web site. I had not been looking at the
> Cornell. Any other
> > app note info on NEB would be useful. I collect all
> litho relates
> > app-notes that I can get my hands on.
> >
> > The big problem with negative resists is that they do
> not come off very
> > well in polar (water based) solvents. This is why
> Cornell is
> > recommanding an overnight soak in Shipley (NMP) 1165 to
> strip it off.
> > Negative resists can be quite useful but they tend to
> be a pain to deal
> > with.
> >
> >     Jim
> >
> > Benjamin Chui wrote:
> >
> > > Mary, Nancy et al,
> > >
> > >      Would NEB (a negative ebeam resist) be allowed
> in SNF?
> > >  Here's a link to Cornell's CNF page that mentions
> it:
> > >
> > > http://www.cnf.cornell.edu/ebeam/resist.html#NEB
> > >
> > >      I'm trying to get the formal MSDS and chemical
> data
> > > for it.  Will let you know as soon as I get more
> info.
> > >
> > > Thanks,
> > >
> > > Ben
> > >
> > > On Wed, 20 Aug 2003 15:30:17 -0700
> > >  Mary Tang <mtang at snf.stanford.edu> wrote:
> > > > Hi Nancy, Ben, and fellow SpecMat'ers --
> > > >
> > > > I'm not a lampoly person, so may be off-base
> here...  But
> > > > I would think that
> > > > this would not be a problem if the SOG were
> > > > electronics-grade, as most
> > > > are...
> > > >
> > > > Mary
> > > >
> > > > Nancy Latta wrote:
> > > >
> > > > > Hi Ben,
> > > > >
> > > > > We have recently etched wafers with PMMA (and
> have
> > > > selectivity data, see
> > > > > Henry) in lampoly, so I thin that is ok.  The
> problem
> > > > may be with the
> > > > > spin on glass.
> > > > >
> > > > > To answer this, I have cc'd our Special Materials
> > > > committee on this
> > > > > conversation.
> > > > >
> > > > >                                 Nancy
> > > > >
> > > > > Benjamin Chui wrote:
> > > > > > Hi Nancy,
> > > > > >
> > > > > >      My boss at IBM Almaden wants me to try out
> its
> > > > new
> > > > > > in-house ebeam machine, and I was wondering if
> I can
> > > > take
> > > > > > test wafers exposed in that machine back into
> SNF for
> > > > > > silicon etching in LamPoly.  (The test wafers
> would
> > > > likely
> > > > > > be blank silicon wafers with ebeam-compatible
> resist,
> > > > e.g.
> > > > > > PMMA or spin-on-glass.) The IBM machine is
> usually
> > > > used for
> > > > > > patterning magnetic films, but the films are
> always
> > > > covered
> > > > > > with resist when they enter the machine, and
> the
> > > > engineer
> > > > > > assured me there's no chance of
> cross-contamination.
> > > > > >
> > > > > >      If you could give me any info about what's
> > > > required to
> > > > > > be able to bring the wafers back into SNF
> that'd be
> > > > great.
> > > > > >  Thanks a lot!
> > > > > >
> > > > > > Ben Chui
> > > > >
> > > > > --
> > > > > Nancy Latta
> > > > > Stanford Nanofabrication Facility
> > > > > CIS Room 145
> > > > > 420 Via Palou Mall
> > > > > Stanford, CA 94305-4070
> > > > > (650) 725-6727
> > > > > latta at snf.stanford.edu
> > > >
> > > > --
> > > > Mary X. Tang, Ph.D.
> > > > National Nanofabrication Users' Network
> > > > Stanford Nanofabrication Facility
> > > > CIS Room 136, Mail Code 4070
> > > > Stanford, CA  94305
> > > > (650)723-9980
> > > > mtang at stanford.edu
> > > > http://snf.stanford.edu
> > > >
> > > >
> 
> --
> Mary X. Tang, Ph.D.
> National Nanofabrication Users' Network
> Stanford Nanofabrication Facility
> CIS Room 136, Mail Code 4070
> Stanford, CA  94305
> (650)723-9980
> mtang at stanford.edu
> http://snf.stanford.edu
> 
> 



From cshen at briontech.com  Tue Sep  2 13:31:46 2003
From: cshen at briontech.com (cshen at briontech.com)
Date: Tue, 2 Sep 2003 13:31:46 -0700 (PDT)
Subject: spin on glass
Message-ID: <4089.171.64.100.124.1062534706.squirrel@mail.briontech.com>


Dear all,
I wish to use some sog in the fab. Those are mainstream Honeywell products
used for IC fabrication. I've given the MSDS to Mahnaz. The website for
these two materials are
http://www.electronicmaterials.com/na/products_services/thin_films/dielectrics/spin_on_glass.htmlThe materials are Accuglass T211 and T311.
Please let me know if you have any questions.
Thanks a lot.
Chongfei




From mtang at snf.stanford.edu  Tue Sep  2 13:39:16 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Tue, 02 Sep 2003 13:39:16 -0700
Subject: spin on glass
References: <4089.171.64.100.124.1062534706.squirrel@mail.briontech.com>
Message-ID: <3F54FFF4.263CCB49@snf.stanford.edu>

Hi Chongfei --

For our records, please provide additional info (please provide a list of equipment that will be exposed to SOG and a general process flow of
how you will be using it -- i.e., spin on at headway, bake blueM oven for X minutes and Y degrees, etch on mrc blah blah blah.)  Please also
give an indication of how long you plan to use these (is it one time only for evaluation?)

The list of info required can be found here:
http://snf.stanford.edu/Materials/NewMatProc.html

Also, if you have electronic forms of the MSDS sheets, it would be very helpful, as we are trying to build an on-line databsed.

Thanks,

Mary


cshen at briontech.com wrote:

> Dear all,
> I wish to use some sog in the fab. Those are mainstream Honeywell products
> used for IC fabrication. I've given the MSDS to Mahnaz. The website for
> these two materials are
> http://www.electronicmaterials.com/na/products_services/thin_films/dielectrics/spin_on_glass.htmlThe materials are Accuglass T211 and T311.
> Please let me know if you have any questions.
> Thanks a lot.
> Chongfei

--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu




From cshen at briontech.com  Tue Sep  2 18:30:38 2003
From: cshen at briontech.com (cshen at briontech.com)
Date: Tue, 2 Sep 2003 18:30:38 -0700 (PDT)
Subject: SOG Accuglass 211/311
Message-ID: <4697.171.64.100.124.1062552638.squirrel@mail.briontech.com>

Requestor name: Chongfei Shen

Phone number: 408-653-1502

email address: cshen at briontech.com

Requestor?s PI (Advisor) or Company: Brion Technologies

The name of the new Chemical (give all names commonly used): Accuglass 211
and 311
If there are secondary new chemicals that must be used with this material,
such as a developer for a new resist, list each of them here and supply
MSDSs for each of them.None.

Name of vendor/manufacturer that you are planning to obtain this material
from:Honeywell

URL for vendor?s website where info on the proposed chemical can be found:
http://www.electronicmaterials.com/na/products_services/thin_films/dielectrics/spin_on_glass.html
Vendor?s address and phone number:
Honeywell Electronic Materials
Headquarters, Star Center
1349 Moffett Park Drive
Sunnyvale, CA 94089
U.S.A.
Tel: (408) 962-2000

What is your reason for wanting to bring this material into the lab:
Planarization

Make a strong case why you can not use an already approved
chemical/material for this purpose:We need high crack resistance and UV transparent SOG, Honeywell suggested
these two materials.
List all the lab equipment and wet benches that you propose to use with
this chemical:Headway, Bluem, STS, SEM 4160

Proposed quantity of the chemical that you want to bring into lab (give
both raw and mixed quantities):250ml

State the form that the proposed chemical is in. (Is it solid, powder or
liquid? Note: as a general rule, powders are not permitted in the
cleanroom.):Liquid

State whether the chemical needed to be mixed to use it:
No.

>From manufacturer, vendor or the Stanford safety site, obtain a legible
Material Safety Data Sheet (MSDS) for all the proposed chemicals. Send
these to the person listed below.See attached.

Put together a detailed process flow description on how you proposed to
use this chemical. This should include: Any chemical mixing, all lab
equipment and wet benched to be used, all containers to be used, where
chemical is to be stored and how chemical and by-products are to be
deposed of.See attached.


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From mahnaz at snf.stanford.edu  Wed Sep  3 08:56:50 2003
From: mahnaz at snf.stanford.edu (Mahnaz)
Date: Wed, 03 Sep 2003 08:56:50 -0700
Subject: SOG
Message-ID: <3F560F41.32DA3BD5@snf.stanford.edu>


Hi Chongfei,

Thank you for the information:

You have been ok to use this material in the lab.
Please make sure to get yellow label for your material from me.
You should not use any of the Teflon cassettes in the litho as SOG can
contaminate our cassettes.
make sure to cover the hot plate with foil and more important remove
them when you are done.
I strongly suggest have a separate tweezer for this work.
I will be interested in the result of your work if you do not mind
sharing it with me.

mahnaz



From true at snf.stanford.edu  Wed Sep  3 14:09:29 2003
From: true at snf.stanford.edu (Randy True)
Date: Wed, 03 Sep 2003 14:09:29 -0700
Subject: SpecMat request - oxygen plasma Polyimide etching in STS etcher
References: <3F414BA9.2030501@snf.stanford.edu> <3F42A7A9.84DC6BF6@snf.stanford.edu> <3F453A89.50506@snf.stanford.edu> <3F54B556.96C2C9B9@snf.stanford.edu>
Message-ID: <3F565889.8060905@snf.stanford.edu>

Jim, Mary, Spec Mat:

I think it would be reasonable to let me try the experiment I suggested, 
determining whether the oxygen plasma etch has an impact on the Si etch 
rate and then have approval be dependent on those results. A 20min 
oxygen plasma etch of clean polyimide should not do any permanent 
damage. If there is any disturbance in the Si etch rate, it should be 
correctable with a simple seasoning step.

--Randy

Mary Tang wrote:

>Hi all --
>
>I'm doing the SpecMat wrap up for August...  Was there a final answer this
>request from Randy?  (Jim, I take it this is really your baby -- what was your
>verdict?)
>
>Thanks,
>
>Mary
>
>Randy True wrote:
>
>  
>
>>Jim,
>>
>>Thanks for the quick response.
>>
>>My polyimide etch process will have a similar effect to an oxygen plasma
>>clean so I'd propose to do the same conditioning as what is done after
>>an oxygen clean step, namely a 20min deep silicon etch on a photoresist
>>patterned Si wafer. To test this protocol, I would run and additional
>>patterned Si wafer after the conditioning wafer and measure the etch
>>rate. How does that sound?
>>
>>--Randy
>>
>>Jim McVittie wrote:
>>
>>    
>>
>>>Randy,
>>>
>>>My question is how is your proposed process going affect the current STS
>>>etch processes.
>>>Your process will tend to strip off any polymer on the chamber walls and
>>>thus could change the
>>>equilibrium gas concentration is subsequent Si etching for some unknown
>>>number of wafers. Can you propose how we might be able to determine that
>>>this is not happening or how you could guarantee that the chamber is back
>>>to the equilibrium wall chemistry after your etch. Your process and post
>>>etch chamber seasoning must be such that the next user gets the same
>>>results as if you had been doing a standard deep Si etch.
>>>
>>>   Jim
>>>
>>>
>>>Randy True wrote:
>>>
>>>
>>>
>>>      
>>>
>>>>I would like to etch a polyimide film with an oxygen plasma in the STS
>>>>etcher. The wafer consists of a metal hard mask (Al/Ti bilayer) on an
>>>>8um thick layer of cured polyimide (PI2611). The wafers will be coming
>>>>        
>>>>
>>>>from the metal chamber of the P5000 and are non-gold contaminated.
>>>      
>>>
>>>>Currently, I am doing the etch in the PQuest with a mixture of Ar and
>>>>O2. I have also done this etch successfully on an Alcatel deep silicon
>>>>etcher, the 601E, at their Boston demonstration facility.
>>>>
>>>>Thanks,
>>>>Randy True
>>>>
>>>>
>>>>        
>>>>
>
>--
>Mary X. Tang, Ph.D.
>National Nanofabrication Users' Network
>Stanford Nanofabrication Facility
>CIS Room 136, Mail Code 4070
>Stanford, CA  94305
>(650)723-9980
>mtang at stanford.edu
>http://snf.stanford.edu
>
>
>  
>

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From mtang at snf.stanford.edu  Thu Sep  4 10:27:59 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Thu, 04 Sep 2003 10:27:59 -0700
Subject: [Fwd: GaAs and InP info for bonding]
References: <3F5527BA.7BD30BA4@snf.stanford.edu>
Message-ID: <3F57761F.3C43BA27@snf.stanford.edu>

Hi Mahnaz --

I take it that this means that GaAs and InP are NOT approved for evbond,
as least not yet...  and that you will be getting information from EV
about how such bonding is done, correct?  At issue are:
1.  what process temperatures will be used
2.  whether scrubber exhaust is required (currently the exhaust on
evbond doesn't go to the scrubber)

Is this right?

Mary

Mahnaz wrote:

> Hello
>
> Finally I Got this email.
> I think we should discuss it and come up with conclusion for good.
>
> mahnaz
>
>    ----------------------------------------------------------------
>
> Subject: GaAs and InP info for bonding
> Date: Fri, 29 Aug 2003 11:19:01 -0700
> From: "Rafael Aldaz" <raldaz at stanford.edu>
> To: "Mahnaz Mansourpour" <mahnaz at snf.stanford.edu>
>
> Hi Mahnaz,I resending this to you incase you didn't received as copy
> in the last emails.  I think this info comes from very good sources
> and should be enough to help you make a decision.  Let me know if you
> need more help on this. Rafael  GaAs info: If you're heating GaAs, you
> really do want to do it under a fume hood
> or other exhaust.  Pure arsenic will evaporate at much lower
> temperatures than GaAs desorption, even some under 200C, so you have
> to make sure your wafers aren't arsenic-rich on the surface if you're
> getting up that hot.  You also have to be careful about overshoot:
> I've evaporated off thick arsenic caps by mistake in the MBE chamber
> when the PID controller overshot 160C.
>
> The desorption of As from GaAs happens at a higher temperature,
> somewhere around 300C.  We prebake our wafers before growth at "350C"
> or "400C" but this is thermocouple temperature at the heater, not the
> actual wafer temperature.  If you need to prevent arsenic desorption
> for device reasons, you may need another source of arsenic nearby,
> like another gallium arsenide wafer on top of the first.  Of course,
> that would complicate wafer bonding.
>
> Oxide blowoff for GaAs happens at 582C.  There are other oxides
> (mostly AsOx) which come off at lower temperatures, but the last layer
>
> of gallium oxide comes off very close to 582C, and it's quite clear
> from electron diffraction.  We typically grow around 450 for InGaAs,
> 570-580 for GaAs, and 580-600 for AlGaAs.  These are all real
> temperatures (as opposed to thermocouple) but are only approximate.InP
> info: P2 desorb at 300C (I am talking about real temp)
> P4 desorb at higher than 650C
> In desorb at 500C
>
> InP sublimation temp is 360C
> InP oxide blowoff temp is
> 510C _____________________________________________________
> Rafael Aldaz
> PhD Candidate, Harris Group
> Department of Electrical Engineering         raldaz at stanford.edu
> CISX Building B113-24
> snow.stanford.edu/~raldaz
> Stanford University                                   Phone: (650)
> 7252774
> Stanford, CA 94305                                  Fax: (650) 7234659
>
> _____________________________________________________

--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu

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From ajamora at Aerogen.com  Thu Sep  4 15:06:28 2003
From: ajamora at Aerogen.com (Jamora, Aleta)
Date: Thu, 4 Sep 2003 15:06:28 -0700
Subject: Request approval for BC7.5 
Message-ID: <D04CBA3AE9A98E40BA82A8D3A08B02181A91A7@aeromail.aerogen.local>




Hello,

	I would like to request permission to bring a sample of a product made by Shin-etzu MicroSi Inc. called BC7.5  Barrier Coat.    It is used in photolithography as a thin solvent  barrier between resist layers.   It is an aqueous solution of polyvinyl alcohol, and I am attaching a soft copy of the MSDS sheet.    This product is a liquid and my plans would be to bring in about 400 mls  in a small brown chem bottle (from SNF store room).   I intend to hand dispense 10 mils per wafer and spin on the Headway spinner.   The BC7.5 would dissolve away in the develop step, which I would be using Shipley LDD 26W MIF developer in a beaker.  

	I look forward to hearing from you!


Best Regards,

	Aleta Jamora

	ajamora at aerogen.com

	Aerogen Inc
	2071 Stierlin Court
	Mountain View, CA 94087

	650 864 7407

 <<CEM BCXX-XX.doc>> 
  
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From mtang at snf.stanford.edu  Thu Sep  4 15:53:29 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Thu, 04 Sep 2003 15:53:29 -0700
Subject: SpecMat request - oxygen plasma Polyimide etching in STS etcher
References: <3F414BA9.2030501@snf.stanford.edu> <3F42A7A9.84DC6BF6@snf.stanford.edu> <3F453A89.50506@snf.stanford.edu> <3F54B556.96C2C9B9@snf.stanford.edu> <3F565889.8060905@snf.stanford.edu>
Message-ID: <3F57C269.8C760043@snf.stanford.edu>

Hi Jim --

What do really think of Randy's proposal?  It seems reasonable, but then
I'm not an stsetch user.  We have, I know, approved the use of the
stsetch for polymer deposition, followed by some sort of seasoning/clean
-- is what he's proposing somewhat the opposite case?  Is this much
different than the situation following a chamber clean?

mary

Randy True wrote:

> Jim, Mary, Spec Mat:
>
> I think it would be reasonable to let me try the experiment I
> suggested, determining whether the oxygen plasma etch has an impact on
> the Si etch rate and then have approval be dependent on those results.
> A 20min oxygen plasma etch of clean polyimide should not do any
> permanent damage. If there is any disturbance in the Si etch rate, it
> should be correctable with a simple seasoning step.
>
> --Randy
>
> Mary Tang wrote:
>
>> Hi all --
>>
>> I'm doing the SpecMat wrap up for August...  Was there a final
>> answer this
>> request from Randy?  (Jim, I take it this is really your baby --
>> what was your
>> verdict?)
>>
>> Thanks,
>>
>> Mary
>>
>> Randy True wrote:
>>
>>
>> > Jim,
>> >
>> > Thanks for the quick response.
>> >
>> > My polyimide etch process will have a similar effect to an oxygen
>> > plasma
>> > clean so I'd propose to do the same conditioning as what is done
>> > after
>> > an oxygen clean step, namely a 20min deep silicon etch on a
>> > photoresist
>> > patterned Si wafer. To test this protocol, I would run and
>> > additional
>> > patterned Si wafer after the conditioning wafer and measure the
>> > etch
>> > rate. How does that sound?
>> >
>> > --Randy
>> >
>> > Jim McVittie wrote:
>> >
>> >
>> >>  Randy,
>> >>
>> >>  My question is how is your proposed process going affect the
>> >>  current STS
>> >>  etch processes.
>> >>  Your process will tend to strip off any polymer on the chamber
>> >>  walls and
>> >>  thus could change the
>> >>  equilibrium gas concentration is subsequent Si etching for some
>> >>  unknown
>> >>  number of wafers. Can you propose how we might be able to
>> >>  determine that
>> >>  this is not happening or how you could guarantee that the chamber
>> >>  is back
>> >>  to the equilibrium wall chemistry after your etch. Your process
>> >>  and post
>> >>  etch chamber seasoning must be such that the next user gets the
>> >>  same
>> >>  results as if you had been doing a standard deep Si etch.
>> >>
>> >>     Jim
>> >>
>> >>
>> >>  Randy True wrote:
>> >>
>> >>
>> >>
>> >>
>> >> > I would like to etch a polyimide film with an oxygen plasma in
>> >> > the STS
>> >> > etcher. The wafer consists of a metal hard mask (Al/Ti bilayer)
>> >> > on an
>> >> > 8um thick layer of cured polyimide (PI2611). The wafers will be
>> >> > coming
>> >> >
>> >>  >from the metal chamber of the P5000 and are non-gold
>> >>  contaminated.
>> >>
>> >> > Currently, I am doing the etch in the PQuest with a mixture of
>> >> > Ar and
>> >> > O2. I have also done this etch successfully on an Alcatel deep
>> >> > silicon
>> >> > etcher, the 601E, at their Boston demonstration facility.
>> >> >
>> >> > Thanks,
>> >> > Randy True
>> >> >
>> >> >
>> >> >
>> --
>> Mary X. Tang, Ph.D.
>> National Nanofabrication Users' Network
>> Stanford Nanofabrication Facility
>> CIS Room 136, Mail Code 4070
>> Stanford, CA  94305
>> (650)723-9980
>> mtang at stanford.edu
>> http://snf.stanford.edu
>>
>>
>>
--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu

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From mtang at snf.stanford.edu  Fri Sep  5 07:02:02 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Fri, 05 Sep 2003 07:02:02 -0700
Subject: external ebeam processing
References: <web-53180853@california.com>
Message-ID: <3F589759.D558C46A@snf.stanford.edu>

Hi Ben --

Thanks, I've got the MSDS's...  So it's just plain polyimide, then, but
in a weird solvent (gamma butyrolactone).  I believe that conventional
electronics-grade polyimide has been approved for all these tools (see
http://snf.stanford.edu/Materials/ChemFiles/Polyimide.html) but am not
sure about Duramide -- would you happen to know if this electronics
grade stuff?  There doesn't seem to be purity info on the MSDS's -- do
you have any application notes which might indicate purity?  And I've
forgotten -- did you plan on spinning it here at SNF or did you want to
bring in wafers already coated with this stuff?

(Jim -- what's your thinking on Duramide -- do you know this stuff?)

Mary

Benjamin Chui wrote:

> Hi Mary,
>
>   I'll bring along a hardcopy of the 2 MSDS's to CIS next
> time I'm there (maybe tomorrow?).  Unfortunately I don't
> have them in electronic form right now....
>
>    As for equipment, in addition to LamPoly I think I'll
> need to use Drytek2/Matrix (to oxygen-ash the
> durimide(polyimide)); and the Amtetcher (to etch the
> underlying thermal oxide); and the 20:1 HF bath in
> Wbnonmetal.
>
> Ben
>
> and maybe On Thu, 04 Sep 2003 16:02:48 -0700
>  Mary Tang <mtang at snf.stanford.edu> wrote:
> > Hi Ben --
> >
> > Sorry, I don't see them...  Someone else may have picked
> > them up
> > inadvertently?  Could you possibly send them by again --
> > better yet,
> > would it be possible to get electronic versions?  (My
> > dream is to have
> > an MSDS database...)
> >
> > By the way, you mentioned lampoly -- any other tools at
> > SNF which will
> > be exposed to these materials?
> >
> > Thanks!
> >
> > Mary
> >

--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu




From mtang at snf.stanford.edu  Fri Sep  5 10:02:23 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Fri, 05 Sep 2003 10:02:23 -0700
Subject: Resist Fumes
Message-ID: <3F58C19F.A7F061E8@snf.stanford.edu>

Hi all --

A labmember who turns out to have some serious health concerns was
asking me a lot of questions about chemicals in litho.  After talking a
bit, I think we decided that in general things are pretty safe in litho,
provided everyone follows the appropriate handling procedures.  The only
systematic loophole appears to be the process step between resist spin
and softbake.  On the svg track, it's not a problem.  It's when manual
coating is done.

Do we require that people place their samples in a container between
coat and softbake?  I think for the svgcoat, it's OK -- they can place
the wafer into a box and take it over to the 90 C oven, which has an
exhausted area in front of the door where people can remove their wafers
before placing in the oven.  On the laurel and headway, however, I see
people just pick up their samples with tweezers from the spinner (and
out from the exhausted area) and place them on the hot plates next to
the spinner (in another exhausted area.)  So, for the manual spinners,
the samples are brought out into the fab air only momentarily -- but
enough, evidently, for some people to note that they smell chemicals...

What do you think?  Can we require people to place their samples in an
enclosed container whenever they leave an exhausted deck, even if only
for a few seconds?  With the new laurels, would it be possible and
practical to make the exhausted deck area continous with the hot plates?

Mary

--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu




From bchui at california.com  Fri Sep  5 10:04:29 2003
From: bchui at california.com (Benjamin Chui)
Date: Fri, 05 Sep 2003 10:04:29 -0700
Subject: external ebeam processing
In-Reply-To: <3F589759.D558C46A@snf.stanford.edu>
Message-ID: <web-53241803@california.com>

Mary,

     I'll try to find out about the purity of the durimide.
 I believe it's electronics-grade or better because it's
the same as the material used in the IBM disk drive head
production line.

     The durimide will be spun on at IBM; all that will be
brought into the SNF facility is a cured, 0.2 micron thick
layer on each wafer.

Ben



On Fri, 05 Sep 2003 07:02:02 -0700
 Mary Tang <mtang at snf.stanford.edu> wrote:
> Hi Ben --
> 
> Thanks, I've got the MSDS's...  So it's just plain
> polyimide, then, but
> in a weird solvent (gamma butyrolactone).  I believe that
> conventional
> electronics-grade polyimide has been approved for all
> these tools (see
>
http://snf.stanford.edu/Materials/ChemFiles/Polyimide.html)
> but am not
> sure about Duramide -- would you happen to know if this
> electronics
> grade stuff?  There doesn't seem to be purity info on the
> MSDS's -- do
> you have any application notes which might indicate
> purity?  And I've
> forgotten -- did you plan on spinning it here at SNF or
> did you want to
> bring in wafers already coated with this stuff?
> 
> (Jim -- what's your thinking on Duramide -- do you know
> this stuff?)
> 
> Mary
> 
> Benjamin Chui wrote:
> 
> > Hi Mary,
> >
> >   I'll bring along a hardcopy of the 2 MSDS's to CIS
> next
> > time I'm there (maybe tomorrow?).  Unfortunately I
> don't
> > have them in electronic form right now....
> >
> >    As for equipment, in addition to LamPoly I think
> I'll
> > need to use Drytek2/Matrix (to oxygen-ash the
> > durimide(polyimide)); and the Amtetcher (to etch the
> > underlying thermal oxide); and the 20:1 HF bath in
> > Wbnonmetal.
> >
> > Ben
> >
> > and maybe On Thu, 04 Sep 2003 16:02:48 -0700
> >  Mary Tang <mtang at snf.stanford.edu> wrote:
> > > Hi Ben --
> > >
> > > Sorry, I don't see them...  Someone else may have
> picked
> > > them up
> > > inadvertently?  Could you possibly send them by again
> --
> > > better yet,
> > > would it be possible to get electronic versions?  (My
> > > dream is to have
> > > an MSDS database...)
> > >
> > > By the way, you mentioned lampoly -- any other tools
> at
> > > SNF which will
> > > be exposed to these materials?
> > >
> > > Thanks!
> > >
> > > Mary
> > >
> 
> --
> Mary X. Tang, Ph.D.
> National Nanofabrication Users' Network
> Stanford Nanofabrication Facility
> CIS Room 136, Mail Code 4070
> Stanford, CA  94305
> (650)723-9980
> mtang at stanford.edu
> http://snf.stanford.edu
> 
> 



From shott at snf.stanford.edu  Fri Sep  5 10:17:59 2003
From: shott at snf.stanford.edu (John Shott)
Date: Fri, 05 Sep 2003 10:17:59 -0700
Subject: Resist Fumes
In-Reply-To: <3F58C19F.A7F061E8@snf.stanford.edu>
References: <3F58C19F.A7F061E8@snf.stanford.edu>
Message-ID: <3F58C547.80008@snf.stanford.edu>

Mary et al:

Although I don't know the geometric details, it's my understanding that we are 
working to put the two laurels in a modest sized stainless steel hood.  If 
that is the case, is there room in that to put the 4 manual hotplates in the 
back of that same hood?  They are pretty small and it would seem that 
hotplates are reasonably compatible with a stainless steel hood (unlike the 
existing laurel setup that is in a polypro bench with a plexiglass cover where 
I would not suggest placing hot plates.)

If that would work, putting 2 laurels and 4 manual hotplates in a modest size 
bench would probably be an improvement, safety-wise, and it would likely free 
up some valuable space in lithography if we replaced the total space currenty 
occupied by laurel, headway2, and 4 manual hotplates with a single SS bench.

At least that would be my thought .... and for most people doing manual coats, 
they wouldn't need to take their wafers out of that solvent bench even for a 
second prior to their soft bake.

John

But as to your original question: Yes, I think that any resist (or other 
spun-on polymer) coated wafers should be required to be in an enclosed box at 
any time they are not in a properly exhausted area between coat and softbake.



From mtang at snf.stanford.edu  Fri Sep  5 11:27:02 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Fri, 05 Sep 2003 11:27:02 -0700
Subject: external ebeam processing
References: <web-53241803@california.com>
Message-ID: <3F58D576.2A78CAD8@snf.stanford.edu>

Fellow SpecMat'ers --

If, indeed, this is electronics grade or better, can we just go ahead
and say it's approved?  (I guess polyimide has been approved already for
these tools, but the durimide is a different formulation, I think, than
what is typically used, but this is really only a potential issue if the
durimide is to be coated in our lab -- since it's not, I tend to think
it's not an issue at all -- would you agree?)

Thanks,

Mary

Benjamin Chui wrote:

> Mary,
>
>      I'll try to find out about the purity of the durimide.
>  I believe it's electronics-grade or better because it's
> the same as the material used in the IBM disk drive head
> production line.
>
>      The durimide will be spun on at IBM; all that will be
> brought into the SNF facility is a cured, 0.2 micron thick
> layer on each wafer.
>
> Ben
>
> On Fri, 05 Sep 2003 07:02:02 -0700
>  Mary Tang <mtang at snf.stanford.edu> wrote:
> > Hi Ben --
> >
> > Thanks, I've got the MSDS's...  So it's just plain
> > polyimide, then, but
> > in a weird solvent (gamma butyrolactone).  I believe that
> > conventional
> > electronics-grade polyimide has been approved for all
> > these tools (see
> >
> http://snf.stanford.edu/Materials/ChemFiles/Polyimide.html)
> > but am not
> > sure about Duramide -- would you happen to know if this
> > electronics
> > grade stuff?  There doesn't seem to be purity info on the
> > MSDS's -- do
> > you have any application notes which might indicate
> > purity?  And I've
> > forgotten -- did you plan on spinning it here at SNF or
> > did you want to
> > bring in wafers already coated with this stuff?
> >
> > (Jim -- what's your thinking on Duramide -- do you know
> > this stuff?)
> >
> > Mary
> >
> > Benjamin Chui wrote:
> >
> > > Hi Mary,
> > >
> > >   I'll bring along a hardcopy of the 2 MSDS's to CIS
> > next
> > > time I'm there (maybe tomorrow?).  Unfortunately I
> > don't
> > > have them in electronic form right now....
> > >
> > >    As for equipment, in addition to LamPoly I think
> > I'll
> > > need to use Drytek2/Matrix (to oxygen-ash the
> > > durimide(polyimide)); and the Amtetcher (to etch the
> > > underlying thermal oxide); and the 20:1 HF bath in
> > > Wbnonmetal.
> > >
> > > Ben
> > >
> > > and maybe On Thu, 04 Sep 2003 16:02:48 -0700
> > >  Mary Tang <mtang at snf.stanford.edu> wrote:
> > > > Hi Ben --
> > > >
> > > > Sorry, I don't see them...  Someone else may have
> > picked
> > > > them up
> > > > inadvertently?  Could you possibly send them by again
> > --
> > > > better yet,
> > > > would it be possible to get electronic versions?  (My
> > > > dream is to have
> > > > an MSDS database...)
> > > >
> > > > By the way, you mentioned lampoly -- any other tools
> > at
> > > > SNF which will
> > > > be exposed to these materials?
> > > >
> > > > Thanks!
> > > >
> > > > Mary
> > > >
> >
> > --
> > Mary X. Tang, Ph.D.
> > National Nanofabrication Users' Network
> > Stanford Nanofabrication Facility
> > CIS Room 136, Mail Code 4070
> > Stanford, CA  94305
> > (650)723-9980
> > mtang at stanford.edu
> > http://snf.stanford.edu
> >
> >

--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu




From xpxie at stanford.edu  Mon Sep  8 14:43:25 2003
From: xpxie at stanford.edu (xpxie)
Date: Mon, 8 Sep 2003 14:43:25 -0700
Subject: About Si3N4 deposition onto Lithium niobate wafers in the PECVD system
Message-ID: <000c01c37652$3c31d340$dc5740ab@xxp>

Dear Sir/Madam,

Was there any work about Si3N4 refractive index vs deposition conditions on the sts system? This kind of knowledge is necessary to decide what I'll need to try on the system.

The problem and Jeannie's reply are enclosed. 

Thank you very much!
Xiuping Xie

-------------------------------------------------------------
Jeannie's reply: 

Hi Xiuping,
The standard procedure is to go through the Spec Material board when introducing
non standard chemicals or materials into our Lab. Jim McVitte stopped by and I
went over your request of LiNb03 in the STS PECVD and he feels that there
wouldn't be any problem. For your safety and mine, you should share this with
the review board committee..
http://snf.stanford.edu/Materials/SpecMat.html
Regards,
Jeannie

------------------------------------------------------------
xpxie wrote:

I'm a student in Martin Fejer's group, in Ginzton Laborotary. Recently we are considering the possibility of make devices by depositing silicon nitride onto patterned lithium niobate wafers to create ridge waveguides. The PECVD ststem in CIS seems to be the choice for the kind of of deposition.

Since LiNbO3 is considered golden cantaminated and is not on the current list of materials used on the system, could you tell me if it is possible for me to use it on the STS system?

Another question is, do you know if  anyone had done the measurement of refractive index vs deposition conditions on the sts system? My target is to get a refractive index of around 2.2 for 1.5um light in the ~3um thick layer of silicon nitride, is that possible?
Sorry if the questions are to specific.
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From mtang at snf.stanford.edu  Mon Sep  8 15:30:58 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Mon, 08 Sep 2003 15:30:58 -0700
Subject: About Si3N4 deposition onto Lithium niobate wafers in the PECVD 
 system
References: <000c01c37652$3c31d340$dc5740ab@xxp>
Message-ID: <3F5D0322.F1AF7C7E@snf.stanford.edu>

Thanks for your note.  If Jim and Jeannie agree it's OK, then it's
officially done and we'll add it to the approved list.

Mary

xpxie wrote:

> Dear Sir/Madam, Was there any work about Si3N4 refractive index vs
> deposition conditions on the sts system? This kind of knowledge is
> necessary to decide what I'll need to try on the system. The problem
> and Jeannie's reply are enclosed. Thank you very much!Xiuping
> Xie -------------------------------------------------------------Jeannie's
> reply: Hi Xiuping,
> The standard procedure is to go through the Spec Material board when
> introducing
> non standard chemicals or materials into our Lab. Jim McVitte stopped
> by and I
> went over your request of LiNb03 in the STS PECVD and he feels that
> there
> wouldn't be any problem. For your safety and mine, you should share
> this with
> the review board committee..
> http://snf.stanford.edu/Materials/SpecMat.html
> Regards,
>
> eannie------------------------------------------------------------xpxie
> wrote:
>
> I'm a student in Martin Fejer's group, in Ginzton Laborotary. Recently
> we are considering the possibility of make devices by depositing
> silicon nitride onto patterned lithium niobate wafers to create ridge
> waveguides. The PECVD ststem in CIS seems to be the choice for the
> kind of of deposition.
>
> Since LiNbO3 is considered golden cantaminated and is not on the
> current list of materials used on the system, could you tell me if it
> is possible for me to use it on the STS system? Another question is,
> do you know if  anyone had done the measurement of refractive index vs
> deposition conditions on the sts system? My target is to get a
> refractive index of around 2.2 for 1.5um light in the ~3um thick layer
> of silicon nitride, is that possible?
> Sorry if the questions are to specific.

--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu

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From latta at snf.stanford.edu  Tue Sep  9 11:01:52 2003
From: latta at snf.stanford.edu (Nancy Latta)
Date: Tue, 09 Sep 2003 11:01:52 -0700
Subject: Cleaning variation request
Message-ID: <3F5E1590.90104@snf.stanford.edu>

Dear Spec Mat'ers

I have been talking with a fellow (an ex-SNF labmember) who wants to do 
a series of anneals on epi wafers he has produced at a university in 
Southhampton in the UK.  His samp-le size is 2x1mm.

Given the hardship of cleaning those pieces he is asking for a pre-diff 
cleaning variation.  He proposes to RCA clean his wafers there, double 
seal them in a cleanroom environment and send them here.  The you then 
be loaded directly into an oxiatation furnace here, not tylan7 as the 
work requires SIMS measurements after the anneals.

We have discussed the cleanliness of the UK facility and he has 
convinced me that all the work is MOS clean.

Comments?

				Nancy

-- 
Nancy Latta
Stanford Nanofabrication Facility
CIS Room 145
420 Via Palou Mall
Stanford, CA 94305-4070
(650) 725-6727
latta at snf.stanford.edu



From mtang at snf.stanford.edu  Tue Sep  9 11:14:21 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Tue, 09 Sep 2003 11:14:21 -0700
Subject: Cleaning variation request
References: <3F5E1590.90104@snf.stanford.edu>
Message-ID: <3F5E187C.C9401CB4@snf.stanford.edu>

Hey Nancy --

My only comment is that I've seen plastic cassettes outgas onto clean
wafers, leading to some hazing on the edges of wafers following
deposition...  I don't think it's a contamination issue for the furnaces
(or, in this case, epi) but may be a potential problem for the device
itself.  However, wafer containers have probably improved significantly
since my industrial days.  Moreover, I believe Maurice has said that ASM
has recommended using wafers straight out of the box, and avoiding any
confounding "clean" issues.  Given this, what he proposes sounds OK to me,
but I'm no device person.  What do you device folk think?  Maurice, what do
you think?

Mary

Nancy Latta wrote:

> Dear Spec Mat'ers
>
> I have been talking with a fellow (an ex-SNF labmember) who wants to do
> a series of anneals on epi wafers he has produced at a university in
> Southhampton in the UK.  His samp-le size is 2x1mm.
>
> Given the hardship of cleaning those pieces he is asking for a pre-diff
> cleaning variation.  He proposes to RCA clean his wafers there, double
> seal them in a cleanroom environment and send them here.  The you then
> be loaded directly into an oxiatation furnace here, not tylan7 as the
> work requires SIMS measurements after the anneals.
>
> We have discussed the cleanliness of the UK facility and he has
> convinced me that all the work is MOS clean.
>
> Comments?
>
>                                 Nancy
>
> --
> Nancy Latta
> Stanford Nanofabrication Facility
> CIS Room 145
> 420 Via Palou Mall
> Stanford, CA 94305-4070
> (650) 725-6727
> latta at snf.stanford.edu

--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu




From mahnaz at snf.stanford.edu  Tue Sep  9 11:47:32 2003
From: mahnaz at snf.stanford.edu (Mahnaz Mansourpour)
Date: Tue, 09 Sep 2003 11:47:32 -0700
Subject: Cleaning variation request
References: <3F5E1590.90104@snf.stanford.edu> <3F5E187C.C9401CB4@snf.stanford.edu>
Message-ID: <3F5E2044.BA217925@snf.stanford.edu>

Hi All,
A clean should be done, if any serious device work will be performed on these
pieces unless they have the capability of vacuum sealing the container which
the piece is sitting in it.

mahnaz

Mary Tang wrote:

> Hey Nancy --
>
> My only comment is that I've seen plastic cassettes outgas onto clean
> wafers, leading to some hazing on the edges of wafers following
> deposition...  I don't think it's a contamination issue for the furnaces
> (or, in this case, epi) but may be a potential problem for the device
> itself.  However, wafer containers have probably improved significantly
> since my industrial days.  Moreover, I believe Maurice has said that ASM
> has recommended using wafers straight out of the box, and avoiding any
> confounding "clean" issues.  Given this, what he proposes sounds OK to me,
> but I'm no device person.  What do you device folk think?  Maurice, what do
> you think?
>
> Mary
>
> Nancy Latta wrote:
>
> > Dear Spec Mat'ers
> >
> > I have been talking with a fellow (an ex-SNF labmember) who wants to do
> > a series of anneals on epi wafers he has produced at a university in
> > Southhampton in the UK.  His samp-le size is 2x1mm.
> >
> > Given the hardship of cleaning those pieces he is asking for a pre-diff
> > cleaning variation.  He proposes to RCA clean his wafers there, double
> > seal them in a cleanroom environment and send them here.  The you then
> > be loaded directly into an oxiatation furnace here, not tylan7 as the
> > work requires SIMS measurements after the anneals.
> >
> > We have discussed the cleanliness of the UK facility and he has
> > convinced me that all the work is MOS clean.
> >
> > Comments?
> >
> >                                 Nancy
> >
> > --
> > Nancy Latta
> > Stanford Nanofabrication Facility
> > CIS Room 145
> > 420 Via Palou Mall
> > Stanford, CA 94305-4070
> > (650) 725-6727
> > latta at snf.stanford.edu
>
> --
> Mary X. Tang, Ph.D.
> National Nanofabrication Users' Network
> Stanford Nanofabrication Facility
> CIS Room 136, Mail Code 4070
> Stanford, CA  94305
> (650)723-9980
> mtang at stanford.edu
> http://snf.stanford.edu



From shott at snf.stanford.edu  Tue Sep  9 15:00:46 2003
From: shott at snf.stanford.edu (John Shott)
Date: Tue, 09 Sep 2003 15:00:46 -0700
Subject: Cleaning variation request
In-Reply-To: <3F5E1590.90104@snf.stanford.edu>
References: <3F5E1590.90104@snf.stanford.edu>
Message-ID: <3F5E4D8E.80501@snf.stanford.edu>

Nancy:

I think that this raises a few concerns and that there are a few bits of 
information that are missing before we can make an intelligent decision.

For starters, I agree with Mary ... we need to know a bit more about how these 
samples are going to be packaged to know what problems that may create.  Also, 
once they are here, how will they be loaded ... I'm guessing that they will 
have to be set on a wafer that is somehow set across a boat?  How will they be 
handled?  Do we have telfon-coated pointy tweezers or what?

Also, how did they turn these things into 1 x 2 mm rectangles and how do we 
know that this process is clean and doesn't produce particles?  In particular, 
were these broken into little pieces after their supposedly high-purity epi 
was grown ... if so, all bets about the cleanliness of their facility go out 
the window as far as I can tell.

Finally, I'm not sure that I understand why tylan7 isn't a suitable option for 
these samples  ...

Thanks,

John




From shott at snf.stanford.edu  Tue Sep  9 16:00:07 2003
From: shott at snf.stanford.edu (John Shott)
Date: Tue, 09 Sep 2003 16:00:07 -0700
Subject: Cleaning variation request
In-Reply-To: <3F5E56B8.6080007@snf.stanford.edu>
References: <3F5E1590.90104@snf.stanford.edu> <3F5E4D8E.80501@snf.stanford.edu> <3F5E56B8.6080007@snf.stanford.edu>
Message-ID: <3F5E5B77.4060502@snf.stanford.edu>

Nancy:

This is, I think, the crux of the matter ... it doesn't matter how clean they 
are before epi if they are going to be sawed after epi.  Would we allow 
anything into any of our furnaces after dicing on our saw?  I doubt it ...

If he's worried about metal contamination, how about the metal contamination 
that will be coming from the sawing operation itself.  This may be a case 
where he needs to do a TXRF analysis of a sample (say a blank silicon wafer) 
after sawing (and cleaning) to prove that it is clean.

Thanks,

John

my guess is that Peter and Ant likely did epi and anneals ... and then diced 
the wafer into SIMS-compatible sample sizes ...



From latta at snf.stanford.edu  Tue Sep  9 16:19:37 2003
From: latta at snf.stanford.edu (Nancy Latta)
Date: Tue, 09 Sep 2003 16:19:37 -0700
Subject: Cleaning variation request
In-Reply-To: <3F5E5B77.4060502@snf.stanford.edu>
References: <3F5E1590.90104@snf.stanford.edu> <3F5E4D8E.80501@snf.stanford.edu> <3F5E56B8.6080007@snf.stanford.edu> <3F5E5B77.4060502@snf.stanford.edu>
Message-ID: <3F5E6009.1030707@snf.stanford.edu>

Hi Guys,

May I take that as a 'no'?

John Shott wrote:
> Nancy:
> 
> This is, I think, the crux of the matter ... it doesn't matter how clean 
> they are before epi if they are going to be sawed after epi.  Would we 
> allow anything into any of our furnaces after dicing on our saw?  I 
> doubt it ...
> 
> If he's worried about metal contamination, how about the metal 
> contamination that will be coming from the sawing operation itself.  
> This may be a case where he needs to do a TXRF analysis of a sample (say 
> a blank silicon wafer) after sawing (and cleaning) to prove that it is 
> clean.
> 
> Thanks,
> 
> John
> 
> my guess is that Peter and Ant likely did epi and anneals ... and then 
> diced the wafer into SIMS-compatible sample sizes ...


-- 
Nancy Latta
Stanford Nanofabrication Facility
CIS Room 145
420 Via Palou Mall
Stanford, CA 94305-4070
(650) 725-6727
latta at snf.stanford.edu



From shott at snf.stanford.edu  Tue Sep  9 16:25:25 2003
From: shott at snf.stanford.edu (John Shott)
Date: Tue, 09 Sep 2003 16:25:25 -0700
Subject: Cleaning variation request
In-Reply-To: <3F5E6009.1030707@snf.stanford.edu>
References: <3F5E1590.90104@snf.stanford.edu> <3F5E4D8E.80501@snf.stanford.edu> <3F5E56B8.6080007@snf.stanford.edu> <3F5E5B77.4060502@snf.stanford.edu> <3F5E6009.1030707@snf.stanford.edu>
Message-ID: <3F5E6165.3090802@snf.stanford.edu>

Nancy:

My own vote would be that this is a "no" unless and until he can prove to us 
with a reasoanble set of measurements (such as TXRF) that his samples are 
clean enough after sawing to qualify for loading direclty into our furnaces. 
Afterall, they presumably have plenty of furnaces there ... and yet appear to 
have chosen not to put theirs at risk.

So, I would say that it isn't a definite know ... but they would have to 
produce an experiment that demonstrates that what they want to do is OK from a 
cleanliness standpoint.

Thanks,

John




From mtang at snf.stanford.edu  Tue Sep  9 16:27:39 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Tue, 09 Sep 2003 16:27:39 -0700
Subject: Cleaning variation request
References: <3F5E1590.90104@snf.stanford.edu> <3F5E4D8E.80501@snf.stanford.edu> <3F5E56B8.6080007@snf.stanford.edu> <3F5E5B77.4060502@snf.stanford.edu> <3F5E6009.1030707@snf.stanford.edu>
Message-ID: <3F5E61EB.FEF9FE6F@snf.stanford.edu>

So, it is a "no", then.  (Sorry, I'd misunderstood the original message.)  By
the way, as we discussed, if it's just an ordinary anneal, he should be able
to do this in Southampton, which is a nicely outfitted, pure electronics lab,
from what I understand...

M

Nancy Latta wrote:

> Hi Guys,
>
> May I take that as a 'no'?
>
> John Shott wrote:
> > Nancy:
> >
> > This is, I think, the crux of the matter ... it doesn't matter how clean
> > they are before epi if they are going to be sawed after epi.  Would we
> > allow anything into any of our furnaces after dicing on our saw?  I
> > doubt it ...
> >
> > If he's worried about metal contamination, how about the metal
> > contamination that will be coming from the sawing operation itself.
> > This may be a case where he needs to do a TXRF analysis of a sample (say
> > a blank silicon wafer) after sawing (and cleaning) to prove that it is
> > clean.
> >
> > Thanks,
> >
> > John
> >
> > my guess is that Peter and Ant likely did epi and anneals ... and then
> > diced the wafer into SIMS-compatible sample sizes ...
>
> --
> Nancy Latta
> Stanford Nanofabrication Facility
> CIS Room 145
> 420 Via Palou Mall
> Stanford, CA 94305-4070
> (650) 725-6727
> latta at snf.stanford.edu

--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu




From latta at snf.stanford.edu  Tue Sep  9 17:11:02 2003
From: latta at snf.stanford.edu (Nancy Latta)
Date: Tue, 09 Sep 2003 17:11:02 -0700
Subject: Cleaning variation request
In-Reply-To: <3F5E6165.3090802@snf.stanford.edu>
References: <3F5E1590.90104@snf.stanford.edu> <3F5E4D8E.80501@snf.stanford.edu> <3F5E56B8.6080007@snf.stanford.edu> <3F5E5B77.4060502@snf.stanford.edu> <3F5E6009.1030707@snf.stanford.edu> <3F5E6165.3090802@snf.stanford.edu>
Message-ID: <3F5E6C16.3060300@snf.stanford.edu>

Hi John,

I hope I haven't been unclear.

He is going to clean the wafers after sawing and send them to us.  We, 
then, do not have to clean them.


John Shott wrote:
> Nancy:
> 
> My own vote would be that this is a "no" unless and until he can prove 
> to us with a reasoanble set of measurements (such as TXRF) that his 
> samples are clean enough after sawing to qualify for loading direclty 
> into our furnaces. Afterall, they presumably have plenty of furnaces 
> there ... and yet appear to have chosen not to put theirs at risk.
> 
> So, I would say that it isn't a definite know ... but they would have to 
> produce an experiment that demonstrates that what they want to do is OK 
> from a cleanliness standpoint.
> 
> Thanks,
> 
> John
> 


-- 
Nancy Latta
Stanford Nanofabrication Facility
CIS Room 145
420 Via Palou Mall
Stanford, CA 94305-4070
(650) 725-6727
latta at snf.stanford.edu



From mcvittie at snf.stanford.edu  Tue Sep  9 18:44:38 2003
From: mcvittie at snf.stanford.edu (Jim McVittie)
Date: Tue, 09 Sep 2003 18:44:38 -0700
Subject: Cleaning variation request
References: <3F5E1590.90104@snf.stanford.edu> <3F5E4D8E.80501@snf.stanford.edu> <3F5E56B8.6080007@snf.stanford.edu> <3F5E5B77.4060502@snf.stanford.edu> <3F5E6009.1030707@snf.stanford.edu> <3F5E6165.3090802@snf.stanford.edu> <3F5E6C16.3060300@snf.stanford.edu>
Message-ID: <3F5E8206.E9DD46A6@snf.stanford.edu>

All,

Here are my comments on the recent wafer cleaning discussion:

1. There is no question that wafers sitting around in the lab or any plastic
box will be coated with organics within a few hours and the thickness of this
layer will increase in time. Normally, to get reproducible results, you want
to take this layer off before any critical high temperature or deposition
step.
2. I think it is a bad example to allow wafers from the uncleaned wafers from
the outside into our tubes.
3. The wafers we buy are metal contaminated out the box. This is what we found
for the one time a student used a new uncleaned ?control? wafer for a TXRF
measurement. Because of these results, I am totally against using wafers out
of the box in the furnaces or Epi reactor.
4. I have forgotten the details we do a contamination  test to come up the the
procedure used for the work Peter and Ant did on annealing pieces.

    Jim


Nancy Latta wrote:

> Hi John,
>
> I hope I haven't been unclear.
>
> He is going to clean the wafers after sawing and send them to us.  We,
> then, do not have to clean them.
>
> John Shott wrote:
> > Nancy:
> >
> > My own vote would be that this is a "no" unless and until he can prove
> > to us with a reasoanble set of measurements (such as TXRF) that his
> > samples are clean enough after sawing to qualify for loading direclty
> > into our furnaces. Afterall, they presumably have plenty of furnaces
> > there ... and yet appear to have chosen not to put theirs at risk.
> >
> > So, I would say that it isn't a definite know ... but they would have to
> > produce an experiment that demonstrates that what they want to do is OK
> > from a cleanliness standpoint.
> >
> > Thanks,
> >
> > John
> >
>
> --
> Nancy Latta
> Stanford Nanofabrication Facility
> CIS Room 145
> 420 Via Palou Mall
> Stanford, CA 94305-4070
> (650) 725-6727
> latta at snf.stanford.edu
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From mcvittie at snf.stanford.edu  Tue Sep  9 23:44:19 2003
From: mcvittie at snf.stanford.edu (Jim McVittie)
Date: Tue, 09 Sep 2003 23:44:19 -0700
Subject: Si3N4 refractive index vs deposition
Message-ID: <3F5EC843.B3E70FB@snf.stanford.edu>

Xiuping,

Contact Elaheh Sigari. I think she did a study on the  Si3N4 refractive
index vs deposition condition for the STS PECVD system. I would like to
get a copy of the study since I do not have a copy.   Jim


Dear Sir/Madam,

Was there any work about Si3N4 refractive index vs deposition conditions
on the sts system? This kind
of knowledge is necessary to decide what I'll need to try on the system.


The problem and Jeannie's reply are enclosed.

Thank you very much!
Xiuping Xie
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From mahnaz at snf.stanford.edu  Wed Sep 10 10:27:40 2003
From: mahnaz at snf.stanford.edu (Mahnaz Mansourpour)
Date: Wed, 10 Sep 2003 10:27:40 -0700
Subject: Request approval for BC7.5
References: <D04CBA3AE9A98E40BA82A8D3A08B02181A91A7@aeromail.aerogen.local>
Message-ID: <3F5F5F0C.3B4F4DDF@snf.stanford.edu>

Hi Jamora,

I like to inform you that I am ok with the BC7.5 Barrier coat chemical to be used in our lab. The chemical should be in form of liquid and you will need a yellow label from me. The chemical  should be spun at Headway.

mahnaz

"Jamora, Aleta" wrote:

> Hello,
>
>         I would like to request permission to bring a sample of a product made by Shin-etzu MicroSi Inc. called BC7.5  Barrier Coat.    It is used in photolithography as a thin solvent  barrier between resist layers.   It is an aqueous solution of polyvinyl alcohol, and I am attaching a soft copy of the MSDS sheet.    This product is a liquid and my plans would be to bring in about 400 mls  in a small brown chem bottle (from SNF store room).   I intend to hand dispense 10 mils per wafer and spin on the Headway spinner.   The BC7.5 would dissolve away in the develop step, which I would be using Shipley LDD 26W MIF developer in a beaker.
>
>         I look forward to hearing from you!
>
> Best Regards,
>
>         Aleta Jamora
>
>         ajamora at aerogen.com
>
>         Aerogen Inc
>         2071 Stierlin Court
>         Mountain View, CA 94087
>
>         650 864 7407
>
>  <<CEM BCXX-XX.doc>>
>
>
>   ------------------------------------------------------------------------
>                              Name: CEM BCXX-XX.doc
>                              Type: WINWORD File (application/msword)
>    CEM BCXX-XX.doc       Encoding: base64
>                       Description: CEM BCXX-XX.doc
>                   Download Status: Not downloaded with message



From mtang at snf.stanford.edu  Wed Sep 10 10:50:14 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Wed, 10 Sep 2003 10:50:14 -0700
Subject: [Fwd: RE: Request approval for BC7.5]
Message-ID: <3F5F6455.A43F6249@snf.stanford.edu>

For our records...

M

-------- Original Message --------
Subject: RE: Request approval for BC7.5
Date: Wed, 10 Sep 2003 10:43:34 -0700
From: "Jamora, Aleta" <ajamora at Aerogen.com>
To: "Mary Tang" <mtang at snf.stanford.edu>
CC: "Mahnaz Mansourpour (E-mail)" <mahnaz at snf.stanford.edu>

No problem,  Here is the MSDS for BC7.5 in a Word document

	Thanks! 

	Aleta

	

-----Original Message-----
From: Mary Tang [mailto:mtang at snf.stanford.edu]
Sent: Wednesday, September 10, 2003 10:31 AM
To: Mahnaz Mansourpour
Cc: Jamora, Aleta
Subject: Re: Request approval for BC7.5


Hi Mahnaz, Aleta --

Could you please try sending the soft copy of the MSDS again for our
records?  It didn't come across when Mahnaz forwarded Aleta's email.

Thanks,

Mary

Mahnaz Mansourpour wrote:

> Hi Jamora,
>
> I like to inform you that I am ok with the BC7.5 Barrier coat chemical to be used in our lab. The chemical should be in form of liquid and you will need a yellow label from me. The chemical  should be spun at Headway.
>
> mahnaz
>
> "Jamora, Aleta" wrote:
>
> > Hello,
> >
> >         I would like to request permission to bring a sample of a product made by Shin-etzu MicroSi Inc. called BC7.5  Barrier Coat.    It is used in photolithography as a thin solvent  barrier between resist layers.   It is an aqueous solution of polyvinyl alcohol, and I am attaching a soft copy of the MSDS sheet.    This product is a liquid and my plans would be to bring in about 400 mls  in a small brown chem bottle (from SNF store room).   I intend to hand dispense 10 mils per wafer and spin on the Headway spinner.   The BC7.5 would dissolve away in the develop step, which I would be using Shipley LDD 26W MIF developer in a beaker.
> >
> >         I look forward to hearing from you!
> >
> > Best Regards,
> >
> >         Aleta Jamora
> >
> >         ajamora at aerogen.com
> >
> >         Aerogen Inc
> >         2071 Stierlin Court
> >         Mountain View, CA 94087
> >
> >         650 864 7407
> >
> >  <<CEM BCXX-XX.doc>>
> >
> >
> >   ------------------------------------------------------------------------
> >                              Name: CEM BCXX-XX.doc
> >                              Type: WINWORD File (application/msword)
> >    CEM BCXX-XX.doc       Encoding: base64
> >                       Description: CEM BCXX-XX.doc
> >                   Download Status: Not downloaded with message

--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu
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From mtang at snf.stanford.edu  Wed Sep 10 17:31:38 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Wed, 10 Sep 2003 17:31:38 -0700
Subject: As and P
Message-ID: <3F5FC26A.4CBC853C@snf.stanford.edu>

Hi all --

I just got a call from Jun Xian in Jim Harris group.  His group has just
received a donation from a company.  It's solid arsenic and
phosphorus...  They will be storing it in the Harris lab, not at SNF,
but I think it's still a building concern, right?  Anyway, he called
asking what we recommend for storage.  He says that the donors
recommended placing these in a flammables cabinet...  (Now, I really
don't know much about these two things, but I'm pretty sure solid P
should not be stored near something flammable...)  Do you have any
advice to offer?  (They are trying to be conscientious, because of the
safety audit note that went out recently.)

Here are a couple of sites that seem useful for MSDS info:
For P -- http://hazard.com/msds/mf/cards/file/0628.html
For As -- http://hazard.com/msds/mf/cards/file/0013.html


Mary
--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu




From rcrane at snf.stanford.edu  Thu Sep 11 07:51:56 2003
From: rcrane at snf.stanford.edu (Dick Crane)
Date: Thu, 11 Sep 2003 07:51:56 -0700
Subject: As and P
References: <3F5FC26A.4CBC853C@snf.stanford.edu>
Message-ID: <3F608C0C.CC72790B@snf.stanford.edu>

Hi Mary,

Bob's official role here is "Experimental Labs Manager" which includes
chemical safety and code compliance. I'll refer the question to him and
EH&S. I agree with your concerns.

Dick

Mary Tang wrote:

> Hi all --
>
> I just got a call from Jun Xian in Jim Harris group.  His group has just
> received a donation from a company.  It's solid arsenic and
> phosphorus...  They will be storing it in the Harris lab, not at SNF,
> but I think it's still a building concern, right?  Anyway, he called
> asking what we recommend for storage.  He says that the donors
> recommended placing these in a flammables cabinet...  (Now, I really
> don't know much about these two things, but I'm pretty sure solid P
> should not be stored near something flammable...)  Do you have any
> advice to offer?  (They are trying to be conscientious, because of the
> safety audit note that went out recently.)
>
> Here are a couple of sites that seem useful for MSDS info:
> For P -- http://hazard.com/msds/mf/cards/file/0628.html
> For As -- http://hazard.com/msds/mf/cards/file/0013.html
>
> Mary
> --
> Mary X. Tang, Ph.D.
> National Nanofabrication Users' Network
> Stanford Nanofabrication Facility
> CIS Room 136, Mail Code 4070
> Stanford, CA  94305
> (650)723-9980
> mtang at stanford.edu
> http://snf.stanford.edu



From ajamora at Aerogen.com  Wed Sep 17 15:55:02 2003
From: ajamora at Aerogen.com (Jamora, Aleta)
Date: Wed, 17 Sep 2003 15:55:02 -0700
Subject: Request approval for BC5.3
Message-ID: <D04CBA3AE9A98E40BA82A8D3A08B02181A91F0@aeromail.aerogen.local>



Hello Specmat,

	I would like to request permission to bring a sample of a barrier coating (made by Shin-etzu MicroSi Inc.) called BC5.3.   It is an thin solvent barrier to be used in conjunction with CEM 388SS  (contrast enhancement material) for photolithography.    I will also write for permission to use CEM 388SS when I am done writing this request.  

The BC5.3 is an aqueous solution of polyvinyl alcohol and I am attaching a soft copy of the MSDS sheet.   This product is a liquid and my plans would be to bring in about 400 mls in a small brown chem bottle.   I will hand dispense 10 mils on top of resist-coated wafers using the Headway spinner only.   The BC5.3 dissolves away in the develop step, which I will be using Shipley LDD 26W MIF developer in a beaker.


Best Regards,

	Aleta Jamora
	ajamora at aerogen.com
	
	Aerogen Inc.
	2071 Stierlin Court
	Mountain View, CA 94087

	650 864 7407

 <<CEM BCXX-XX.doc>>   
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From ajamora at Aerogen.com  Wed Sep 17 16:04:33 2003
From: ajamora at Aerogen.com (Jamora, Aleta)
Date: Wed, 17 Sep 2003 16:04:33 -0700
Subject: Request approval for CEM 388SS
Message-ID: <D04CBA3AE9A98E40BA82A8D3A08B02181A91F1@aeromail.aerogen.local>

	

Hello Specmat,


	I would like permission to bring in a sample of  CEM 388SS  which is a contrast enhancement material made by Shin-etzu MicroSi Inc.   It is used in photolithography to improve resolution and wall angle when printing thick resist coatings on not-so-flat substrates.  The basic process to use this material is to 

	1) spin resist
	2) softbake
	3) spin barrier coat (BC5.3)  I also wrote for permission to use this
	4) spin CEM 388SS

		(All these spins would be done on the Headway spinner)


	5) expose wafer on the KS MA6 aligner
	6) PEB
	7)  DI rinse to remove CEM 388SS layer  (in a beaker)
	8) Develop Resist
	9) Di Rinse (beaker)
	10)  air gun dry


I am enclosing a soft copy of the MSDS sheet for.  Also I am enclosing a file with some process information about CEM


 	Thanks!

		-Aleta Jamora
		ajamora at aerogen.com
		Aerogen Inc.
		2071 Stierlin Ct
		Mountain View, CA. 94043

		650 864 7407
 <<CEM 388SS.doc>>  <<Contrast Enhancement Mat  Technology-CEM-MEMS-Bump.pdf>> 

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From mtang at snf.stanford.edu  Thu Sep 18 07:51:12 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Thu, 18 Sep 2003 07:51:12 -0700
Subject: Request approval for CEM 388SS
References: <D04CBA3AE9A98E40BA82A8D3A08B02181A91F1@aeromail.aerogen.local>
Message-ID: <3F69C660.4650DDA8@snf.stanford.edu>

Hello SpecMat'ers --

Gosh, this stuff is cool!  Don't you think?  It seems to me that the BC5.3 is completely fine, as you could probably drink it without problems.  The CEM 388SS, however, is mostly glycol ether, which we do allow in our lab in the form of many other resists, but has been banned from commercial labs for links to
reproductive health problems.  I don't think our lab would survive without glycol ether products, but I think I'd like to see some sort of warning or other additional cautionary measures to ensure that users are aware (you know, the HazMat philosophy, which I've been steeped in, having viewed Bob Wheeler's video
lecture...)

What do you think?

Mary

"Jamora, Aleta" wrote:

>
>
> Hello Specmat,
>
>         I would like permission to bring in a sample of  CEM 388SS  which is a contrast enhancement material made by Shin-etzu MicroSi Inc.   It is used in photolithography to improve resolution and wall angle when printing thick resist coatings on not-so-flat substrates.  The basic process to use this material is to
>
>         1) spin resist
>         2) softbake
>         3) spin barrier coat (BC5.3)  I also wrote for permission to use this
>         4) spin CEM 388SS
>
>                 (All these spins would be done on the Headway spinner)
>
>         5) expose wafer on the KS MA6 aligner
>         6) PEB
>         7)  DI rinse to remove CEM 388SS layer  (in a beaker)
>         8) Develop Resist
>         9) Di Rinse (beaker)
>         10)  air gun dry
>
> I am enclosing a soft copy of the MSDS sheet for.  Also I am enclosing a file with some process information about CEM
>
>         Thanks!
>
>                 -Aleta Jamora
>                 ajamora at aerogen.com
>                 Aerogen Inc.
>                 2071 Stierlin Ct
>                 Mountain View, CA. 94043
>
>                 650 864 7407
>  <<CEM 388SS.doc>>  <<Contrast Enhancement Mat  Technology-CEM-MEMS-Bump.pdf>>
>
>   ------------------------------------------------------------------------
>                            Name: CEM 388SS.doc
>                            Type: WINWORD File (application/msword)
>    CEM 388SS.doc       Encoding: base64
>                     Description: CEM 388SS.doc
>                 Download Status: Not downloaded with message
>
>                                                                    Name: Contrast Enhancement Mat Technology-CEM-MEMS-Bump.pdf
>                                                                    Type: Portable Document Format (application/pdf)
>    Contrast Enhancement Mat Technology-CEM-MEMS-Bump.pdf       Encoding: base64
>                                                             Description: Contrast Enhancement Mat Technology-CEM-MEMS-Bump.pdf
>                                                         Download Status: Not downloaded with message

--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu




From shott at snf.stanford.edu  Thu Sep 18 08:13:22 2003
From: shott at snf.stanford.edu (John Shott)
Date: Thu, 18 Sep 2003 08:13:22 -0700
Subject: Request approval for CEM 388SS
In-Reply-To: <3F69C660.4650DDA8@snf.stanford.edu>
References: <D04CBA3AE9A98E40BA82A8D3A08B02181A91F1@aeromail.aerogen.local> <3F69C660.4650DDA8@snf.stanford.edu>
Message-ID: <3F69CB92.9080103@snf.stanford.edu>

Mary:

This sounds reasonable to me.  I agree that it's probably difficult to get rid 
of all of the glycol ethers at this point.  However, I think that we should do 
our best to keep track of which things do contain glycol ethers and which do 
not.  Also, I suspect that there will be more and more non-glycol ether 
replacements and we should always try to ask ourselves (and the folks 
proposing to use these things), is there a non-glycol ether equivalent that we 
could use.  While Aleta strikes me a being quite competent, I'm guessing that 
she is proposing to use CEM388SS because she has used it in the past ... I 
don't think that it hurts to ask if there is an alternative?  Maybe there 
isnt', but we would then at least be able to talk more intelligently about why 
we need, in some cases, glycol ether based resists.

Thanks,

John



From mtang at snf.stanford.edu  Thu Sep 18 10:40:00 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Thu, 18 Sep 2003 10:40:00 -0700
Subject: Request approval for CEM 388SS
References: <D04CBA3AE9A98E40BA82A8D3A08B02181A91F1@aeromail.aerogen.local> <3F69C660.4650DDA8@snf.stanford.edu> <3F69CB92.9080103@snf.stanford.edu>
Message-ID: <3F69EDF0.E4D9C4D0@snf.stanford.edu>

Hi John --

You're absolutely right -- I'll ask her.

Mary

John Shott wrote:

> Mary:
>
> This sounds reasonable to me.  I agree that it's probably difficult to get rid
> of all of the glycol ethers at this point.  However, I think that we should do
> our best to keep track of which things do contain glycol ethers and which do
> not.  Also, I suspect that there will be more and more non-glycol ether
> replacements and we should always try to ask ourselves (and the folks
> proposing to use these things), is there a non-glycol ether equivalent that we
> could use.  While Aleta strikes me a being quite competent, I'm guessing that
> she is proposing to use CEM388SS because she has used it in the past ... I
> don't think that it hurts to ask if there is an alternative?  Maybe there
> isnt', but we would then at least be able to talk more intelligently about why
> we need, in some cases, glycol ether based resists.
>
> Thanks,
>
> John

--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu




From mtang at snf.stanford.edu  Thu Sep 18 10:49:27 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Thu, 18 Sep 2003 10:49:27 -0700
Subject: Request approval for CEM 388SS
References: <D04CBA3AE9A98E40BA82A8D3A08B02181A91F1@aeromail.aerogen.local>
Message-ID: <3F69F027.3FEA45CC@snf.stanford.edu>

Hi Aleta --

The application note shows some very impressive results -- thanks for the info!  It seems, however, that the CEM388SS product uses a glycol ether solvent.  Although we do allow products with glycol ethers in the lab, because of links to reproductive problems (i.e. miscarriage), we'd like to try to encourage people to
find acceptable alternatives.  (Commercial labs, in fact, have phased out glycol ethers altogether.  And we've phased them out, in our standard resists.)  I'm not familiar with contrast enhancement agents, but was wondering if there might be a comparable substitute which is not based on a glycol ether solvent.  Would you
happen to know or could you possibly look into this?  (Particularly as this seems like a very useful product.)

Mary

"Jamora, Aleta" wrote:

>
>
> Hello Specmat,
>
>         I would like permission to bring in a sample of  CEM 388SS  which is a contrast enhancement material made by Shin-etzu MicroSi Inc.   It is used in photolithography to improve resolution and wall angle when printing thick resist coatings on not-so-flat substrates.  The basic process to use this material is to
>
>         1) spin resist
>         2) softbake
>         3) spin barrier coat (BC5.3)  I also wrote for permission to use this
>         4) spin CEM 388SS
>
>                 (All these spins would be done on the Headway spinner)
>
>         5) expose wafer on the KS MA6 aligner
>         6) PEB
>         7)  DI rinse to remove CEM 388SS layer  (in a beaker)
>         8) Develop Resist
>         9) Di Rinse (beaker)
>         10)  air gun dry
>
> I am enclosing a soft copy of the MSDS sheet for.  Also I am enclosing a file with some process information about CEM
>
>         Thanks!
>
>                 -Aleta Jamora
>                 ajamora at aerogen.com
>                 Aerogen Inc.
>                 2071 Stierlin Ct
>                 Mountain View, CA. 94043
>
>                 650 864 7407
>  <<CEM 388SS.doc>>  <<Contrast Enhancement Mat  Technology-CEM-MEMS-Bump.pdf>>
>
>   ------------------------------------------------------------------------
>                            Name: CEM 388SS.doc
>                            Type: WINWORD File (application/msword)
>    CEM 388SS.doc       Encoding: base64
>                     Description: CEM 388SS.doc
>                 Download Status: Not downloaded with message
>
>                                                                    Name: Contrast Enhancement Mat Technology-CEM-MEMS-Bump.pdf
>                                                                    Type: Portable Document Format (application/pdf)
>    Contrast Enhancement Mat Technology-CEM-MEMS-Bump.pdf       Encoding: base64
>                                                             Description: Contrast Enhancement Mat Technology-CEM-MEMS-Bump.pdf
>                                                         Download Status: Not downloaded with message

--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu




From mcvittie at cis.Stanford.EDU  Thu Sep 18 17:45:10 2003
From: mcvittie at cis.Stanford.EDU (Jim McVittie)
Date: Thu, 18 Sep 2003 17:45:10 -0700 (PDT)
Subject: Cleaning Germanium
In-Reply-To: <JNEBLEALNGJJMBIJONKJMEHOCAAA.bashar@snf.stanford.edu>
Message-ID: <Pine.LNX.4.44.0309181727050.9767-100000@cis.Stanford.EDU>

Bashar,

I have talked to a number of people about Ge cleaning. The best I can come 
up with is as follows:

1. Organic removal:  Gasonic O2 downsteam clean at room tempature. I still 
have to work out the details on this. We have been using a solvent but I 
am not happy with this so we are changing the plasma step. 

2. H2O/HF Cycle Clean: 

	- 5 cycle DI water dump rinse
	- 20 s 50:1 HF dip
	- 30 s DI dip
	- 20 s 50:1 HF dip
	- 30 s DI dip
	- 20 s 50:1 HF dip
	- 30 s DI dip
	- 20 s 50:1 HF dip
	- 30 s DI dip
	- 5 cycle DI water dump rinse
	- Spin Rinse Dry

I will try to come in tonight to work on the plasma step. So far both
Stanford and MIT have gotten the best results with the H2O/HF cycle clean,
however no one has done any metal contamination analysis. I work like to
do TRXF metal analysis using this clean before giving the OK to go into
the Epi system.


	Jim



On Wed, 17 Sep 2003, Shabbir A. Bashar, Ph.D. wrote:

> Hi Jim,
> 
> Thanks for the long chat today.  Whenever you get a chance please let me
> know what Ge clean I should use.  Also let me have the info for deep dry
> etching (30um) silica grown on silicon substrates.
> 
> --------
> Shabbir A. Bashar
> Cell: 510 386 7304
> 
> 

-- 
--------------------------------------------------------------
James P. McVittie, Ph.D.	        SNF Director of Technology        
Allen Center for Integrated Systems     Stanford Nanofabrication Facility
Stanford University             	jmcvittie at stanford.edu
Rm. 336, 330 Serra Mall			Fax: (650) 723-4659
Stanford, CA 94305-4075			Tel: (650) 725-3640




From amf at amfitzgerald.com  Fri Sep 19 18:38:22 2003
From: amf at amfitzgerald.com (Alissa M. Fitzgerald)
Date: Fri, 19 Sep 2003 18:38:22 -0700
Subject: wafers with buried ZnO layer in STSetch? 
Message-ID: <001201c37f17$e20157a0$6401a8c0@snowcat>

Hi,

I am talking with a potential client who is interested in doing some processing (for a research project) in the SNF.  On the front side of their SOI wafers, they have a ZnO layer, buried under a nitride layer.  They would like to do a backside etch in the STSetch.  The backside etch will go through the back of the wafer and stop on the buried oxide layer in the SOI sandwich.  No ZnO would ever be exposed to the plasma.

Would you consider allowing them to use these wafers in STSetch?

Please contact me if you need more information.

Best regards,
Alissa 
(former SNF user)





Alissa M. Fitzgerald, Ph.D.
Principal

A. M. Fitzgerald & Associates
Technical Consulting Services
Sensor Systems  |  MEMS |  Materials  |  Structures
655 Skyway Rd. Suite 118
San Carlos, CA 94070
(650) 592-6100 tel/fax
(650) 520-4438 cell
www.amfitzgerald.com
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From mcvittie at cis.Stanford.EDU  Mon Sep 22 09:47:27 2003
From: mcvittie at cis.Stanford.EDU (Jim McVittie)
Date: Mon, 22 Sep 2003 09:47:27 -0700 (PDT)
Subject: wafers with buried ZnO layer in STSetch? 
In-Reply-To: <001201c37f17$e20157a0$6401a8c0@snowcat>
Message-ID: <Pine.LNX.4.44.0309220938310.5558-100000@cis.Stanford.EDU>

Alissa,

If the ZnO was indeed totally covered and the exposed surfaces are free of
Zn, I would have no problem with letting the wafers into the STS. The
problem is that you will have to prove that the exposed surfaces are free
of Zn. To do this, you would have to do a TRXF measurement which will cost
at least $350 at Charles Evans Assoc. If you are interested, I can work 
out the details with you.

	Thanks, Jim
 

On Fri, 19 Sep 2003, Alissa M. Fitzgerald wrote:

> Hi,
> 
> I am talking with a potential client who is interested in doing some
> processing (for a research project) in the SNF.  On the front side of
> their SOI wafers, they have a ZnO layer, buried under a nitride layer.  
> They would like to do a backside etch in the STSetch.  The backside etch
> will go through the back of the wafer and stop on the buried oxide layer
> in the SOI sandwich.  No ZnO would ever be exposed to the plasma.
> 
> Would you consider allowing them to use these wafers in STSetch?
> 
> Please contact me if you need more information.
> 
> Best regards,
> Alissa 
> (former SNF user)
> 
> 
> 
> 
> 
> Alissa M. Fitzgerald, Ph.D.
> Principal
> 
> A. M. Fitzgerald & Associates
> Technical Consulting Services
> Sensor Systems  |  MEMS |  Materials  |  Structures
> 655 Skyway Rd. Suite 118
> San Carlos, CA 94070
> (650) 592-6100 tel/fax
> (650) 520-4438 cell
> www.amfitzgerald.com

-- 
--------------------------------------------------------------
James P. McVittie, Ph.D.	        SNF Director of Technology        
Allen Center for Integrated Systems     Stanford Nanofabrication Facility
Stanford University             	jmcvittie at stanford.edu
Rm. 336, 330 Serra Mall			Fax: (650) 723-4659
Stanford, CA 94305-4075			Tel: (650) 725-3640




From mtang at snf.stanford.edu  Mon Sep 29 09:36:13 2003
From: mtang at snf.stanford.edu (Mary Tang)
Date: Mon, 29 Sep 2003 09:36:13 -0700
Subject: ag4108
Message-ID: <3F785F7C.FD57F30D@snf.stanford.edu>

Hi Jim --

Can you update us on the ag4108?  I also understand that there was a
particle problem reported last Thursday and when investigated on Friday,
a lot of strange film was observed on the quartzware.  I understand that
you suspect this may be Ge, and although it was approved for the ag4108
a while ago, I was wondering... what sort of limits were placed on the
approval and what can be done for the system now?

Thanks,

Mary

--
Mary X. Tang, Ph.D.
National Nanofabrication Users' Network
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu




From mcvittie at cis.Stanford.EDU  Tue Sep 30 09:54:48 2003
From: mcvittie at cis.Stanford.EDU (Jim McVittie)
Date: Tue, 30 Sep 2003 09:54:48 -0700 (PDT)
Subject: New Plasma Etcher Contamination tests
Message-ID: <Pine.LNX.4.44.0309300950520.25452-101000@cis.Stanford.EDU>

All,

In previous studies of metal contamination in our 'clean' plasma etchers, 
we have found some low level metal contamination, which comes off in a 
diff clean process. The attached table shows this contamination before the 
post-etch wafer cleaning. We make a big deal about wafers coming out of 
the 'dirty' etch tools, however we have no data showing that wafers from 
these tools are contaminated after a post etch clean. I propose that we do 
the same tests in Drytek2, Drytek1, Drytek4, STSetch, PQuest and the MRC 
where we etch clean wafers and then do TXRF measurements after a post etch 
Diff clean. If the wafers from the 'dirty' etchers come out clean, I think 
we will need to change some of our contamination policies with regard to 
the etchers.    

If there are no objections, I will get together with Mike and work out 
what the TRXF testing will cost.

	Jim 
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From mcvittie at snf.stanford.edu  Tue Sep 30 15:37:57 2003
From: mcvittie at snf.stanford.edu (Jim McVittie)
Date: Tue, 30 Sep 2003 15:37:57 -0700
Subject: ag4108
References: <3F785F7C.FD57F30D@snf.stanford.edu>
Message-ID: <3F7A05C5.3CDD4EE7@snf.stanford.edu>

Mary,

When ChiOn Chui was using the AG4108 system last week about Wednesday, he
lost a Ge sample in the chamber. During subsequent runs by other users, the
sample melted and formed a ball about 1/4 in diameter. In addition, it
oxided resulting in Ge oxide deposition on the chamber walls.

I found out about the problem during lunch time on Friday. By the time I
contacted the users to see who had lost a piece of Ge, he had already
contacted Uli saying that he had probably lost a piece of Ge. I told him
that this was unacceptable and if it happened again Ge would banded from the
system. I feel he honestly did not know that he had loss a piece of Ge. He
said he had been using irregular shaped pieces and apparently a portion of a
piece which broke off from thermal stress and slipped off the carrier
wafer.

He and I talked to Len about the problem. We agreed that from now on, anyone
using pieces in this system would have to open and check the chamber at the
end of their run.

The glassware was cleaned with no problems, yesterday.

    Jim

Mary Tang wrote:

> Hi Jim --
>
> Can you update us on the ag4108?  I also understand that there was a
> particle problem reported last Thursday and when investigated on Friday,
> a lot of strange film was observed on the quartzware.  I understand that
> you suspect this may be Ge, and although it was approved for the ag4108
> a while ago, I was wondering... what sort of limits were placed on the
> approval and what can be done for the system now?
>
> Thanks,
>
> Mary
>
> --
> Mary X. Tang, Ph.D.
> National Nanofabrication Users' Network
> Stanford Nanofabrication Facility
> CIS Room 136, Mail Code 4070
> Stanford, CA  94305
> (650)723-9980
> mtang at stanford.edu
> http://snf.stanford.edu
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From mcvittie at snf.stanford.edu  Tue Sep 30 15:42:55 2003
From: mcvittie at snf.stanford.edu (Jim McVittie)
Date: Tue, 30 Sep 2003 15:42:55 -0700
Subject: New Plasma Etcher Contamination tests
References: <Pine.LNX.4.44.0309300950520.25452-101000@cis.Stanford.EDU>
Message-ID: <3F7A06EF.B3330E29@snf.stanford.edu>

All,

Mike and I meet this after and talked over the proposal. We decided since the results depend on the
wafer cleaning procedure used and since we are looking at changing the diff cleaning procedure, it
would be best to delay and any etching tests until we have the new cleaning procedure in place.

    Jim

Jim McVittie wrote:

> All,
>
> In previous studies of metal contamination in our 'clean' plasma etchers,
> we have found some low level metal contamination, which comes off in a
> diff clean process. The attached table shows this contamination before the
> post-etch wafer cleaning. We make a big deal about wafers coming out of
> the 'dirty' etch tools, however we have no data showing that wafers from
> these tools are contaminated after a post etch clean. I propose that we do
> the same tests in Drytek2, Drytek1, Drytek4, STSetch, PQuest and the MRC
> where we etch clean wafers and then do TXRF measurements after a post etch
> Diff clean. If the wafers from the 'dirty' etchers come out clean, I think
> we will need to change some of our contamination policies with regard to
> the etchers.
>
> If there are no objections, I will get together with Mike and work out
> what the TRXF testing will cost.
>
>         Jim
>
>   ------------------------------------------------------------------------
>                                  Name: SNF-Etchers5-02.ppt
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