Mary Tang mtang at
Wed Apr 7 11:20:14 PDT 2004

Hi all --

I have a Specmat question.  Keyote has several labmembers quite active in
the lab these days (they do cool stuff -- polymers that you can inkjet to
make films for electronic devices.)

Anyway, one process they want to be able to do is this:

1.  Aligned contact bond of silicon to silicon, under vacuum.  This would
be preceded by a rigorous clean (RCA-type or pre-diff plus megasonic.)
2.  Thermal processing to permanently bond the wafers, ideally, a
diffusion furnace, but without a pre-dif clean.  You don't really want to
wet process contact bonded wafers, and it would be presumed that the time
lag is minimal so that the wafers should be clean from the bond clean.
3.  Photolith on one side of the bonded wafers.
4.  STS etch.

The ideal plan would be to have them use the ksbond, which we are
designating as the clean bond tool (the electrodes have been disconnected,
so anodic bonding cannot be done.)  However, we don't have an align tool
for the ks.  Mahnaz has been trying to get a quote from Suss, but they
haven't really been able to get her one.  Keyote is interested in this
option, to the extent that they say they are willing to pay for up to half
of an align tool (we told them it might be somewhere around $25K total.)
However, the lead time will no doubt be very long -- we can't even get a
quote from them.

In the meantime, we also have the evbond system, which does have tooling
for aligned bonds, but is terribly dirty.  However, it seems to me that if
evbond may present a short term solution.  If we allow them to do
alignment and contact bond under vacuum, but without heat, the transfer of
sodium is minimized, just to points of contact on one side.

I would suggest an extended water rinse afterward, maybe with just a hand
sprayer.  I think the concern with getting wafers wet is with handling in
the wbdiff, which may take the wafers apart.  I think (although I haven't
asked -- this is just based on my limited experience in bonding at
Berkeley) that gentle handling with a hand sprayer and air gun would be
acceptable.  When at Intel, an extended water rinse was found to eliminate
most all of the sodium from the surface of silicon, and that the RCA
clean got rid of the trace amounts.  I have an old paper somewhere that
shows this (I don't recall the exact numbers but it was actually only a
few percent difference.) 

They can do the thermal processing in tylan4, which
we have set aside for gold-contaminated processing (although I understand 
that we haven't as yet had any requests for gold-processing on this tube
-- well several requests, but no follow through as yet, so it's still
clean as of now). Once they go through litho and pre-etch rinse, any
residual surface sodium should be removed.

It seems to me that at this point, the wafers should be sufficiently
"clean" for stsetch.  What do you think?

After this step, the wafers apparently go through CMP at a commercial
vendor (I can't remember which one, but one that many labmembers use), who
decontaminates them according to standard industrial practice
before the wafers are returned to the lab.  

Again, I think the long term solution would be to obtain an alignment tool
for the ksbond system.  That way we can completely separate clean from
non-clean bond processing.  However, for the short term, I think it would
be really helpful if we could somehow accomodate Keyote's needs.  I should
say that they haven't requested this -- I just had a chat with them and
thought that this might be a viable approach, and am now proposing it to
you all.  I also think (and would suspect that Mahnaz agrees) that this
should not be opened up, but that Keyote has demonstrated a genuine need
and is willing to work with us on a more permanent solution.  Moreover,
the Keyote engineers are unsually good -- both technically and as lab
citizens (the VP is Monty what's-his-name, a long-time labmember in good

So...  sorry for the long note -- but what do you think?


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