Laser Annealing Experiment
bipin at stanford.edu
Wed Apr 14 11:06:44 PDT 2004
Dear SpecMat Committee Members,
I wanted to seek your permission/suggestions to do some Laser Annealing Experiments on Si wafers for 3D Integration Project, I am working on with Prof Fabian Pease.
Prof Byer's lab in Ginztopn has a high power, ultra-fast laser source (1064nm) which I want to use for doing laser annealing on my wafers. The steps I am thinking of doing are outlined below:
1.. Run a standard MOS Capacitor process, with Al gate, on 4' Si wafers.
2.. Deposit a layer of LTO on the wafer. (This can be done on tylanbpsg)
3.. I want to deposit a 0.1-0.2mm thick amorphous silicon layer on top of this LTO. Since there is no PECVD tube where this can be done, I am planning to send my wafers to a company called Seaway Semiconductors that does this.
4.. I want to then deposit a thin layer of Ti above this Si layer. (Can this be done at SNF?)
5.. Once I have done these steps, I want to take my wafers out to Prof. Byer's lab and expose the wafer to the high-energy pulses. They just have a laser source, so I should build my own wafer holders (probably enclosed in a box, with a glass window). I can pump Nitrogen into this box. If the annealing is done in that ambient, Can I bring my wafers back to SNF to etch the deposited LTO, amorphous-Si and Ti layers.
6.. The aim of this experiment is to see how much the C-V of the first layer Capacitors are affected by the laser annealing process.
Any suggestions would be appreciated.
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