[Fwd: Couple of requests from MEMS Exchange]

Mary Tang mtang at snf.stanford.edu
Tue Aug 31 07:03:25 PDT 2004


I think these are questions for Jim...  and I've a couple more to add
regarding logistics...

1.  I don't believe that Nancy (and please correct me if I'm wrong, Nancy) is
going to feel comfortable doing this etch on the pquest.  Is there any chance
that you or someone you feel is knowledgeable about the pquest could do this?
If not, then I suggest that MEMS exchange try to find another site to do
this.   Nancy -- if this could be done here, could we get more info from the
customer as to what the process requirements are?  (I presume that Moly/C are
pretty robust against Cl, but no idea how much, and it seems they are
concerned if they want to avoid Fl...  Is Moly/C a shiny reflective
substrate?  I mean, can we use the nanospec to measure nitride?)

2.  Can smaller pieces be mounted on 4" wafers for processing in the P5000?  I
know this has been done, but gather that it's on a case-by-case basis?  Are
carbon dots acceptable?  I think you had mentioned that your technical
contacts at Applied used a certain adhesive...  is this something that's been
investigated here?

 Jim -- what do you think?

Mary

Nancy Latta wrote:

> Folks,
>
> I sent these requests to Spec Mat a week ago.  Any progress?
>
>   ------------------------------------------------------------------------
>
> Subject: Couple of requests from MEMS Exchange
> Date: Wed, 18 Aug 2004 09:36:01 -0700
> From: Nancy Latta <latta at snf.stanford.edu>
> To: specmat at snf.stanford.edu
>
> Folks,
>
> The MEMS Exchange people has asked me to ask about two etch proccesses;
> 1) They have a customer that has nitride over Moly/carbon on a Si
> substrate.  They want to use a Cl process to etch the nitride and expose
> the Moly/carbon.  Any chance pquest can be used?  They do not want to
> use a flourine process.
>
> 2) Another customer wants to etch Al/3%Ti off a SiC substrate.  I need
> to check about the cleanliness of the sputtered metals, but the first
> problem is that the samples are 2 inch.  They are suggesting that we
> mount them to a 4 in wafer and use p5000.
>
> Thanks for your reply,
>
> -Nancy

--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu





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