[Fwd: Ge and metal process flow outline]

Mary Tang mtang at snf.stanford.edu
Mon Nov 29 16:07:32 PST 2004

Hi all --

Follow up from Krishna and Abhijit -- the process flow that he and 
fellow Germanium folk would like to use.  What do you think?

By the way, speaking with Uli and Abhijit, both say that Ge processing 
has been going on in the AG4108.  There are still some concerns about 
contamination and such, but it appears that this is not a gating factor 
in Ge processing in our lab.


-------- Original Message --------
Subject: 	Ge and metal process flow outline
Date: 	Mon, 29 Nov 2004 15:21:32 -0800
From: 	Abhijit Pethe <pethe at stanford.edu>
To: 	'Mary Tang' <mtang at snf.stanford.edu>

Hi Mary,


Here is an outline of my process flow. This would be the flow most 
people who would be working on Ge would use in the SNF.


*_Process Flow_*


Substrate: Umicore Ge wafers

            Have been using silicide contaminated tubes and apparatus 
mainly the tylanbpsg and wbsilicide


_Gate Step:_

   1. Oxynitridation in the *AG4108* - using ammonia and oxygen for
      1-2min @650C in silicide quartz ware.
   2. doped poly deposition in *tystar1* followed by a tubecoat


_Metal Deposition:_

   1. 500-800A deposition of Ni/ Hf / W or Ti in sct/gryphon
   2. silicidation furnace RTP system 300-700C for 5min - *ag4108*
   3. Clean etch conditions either at the *wbmetal* or *clean* glassware
      in *wbgen*



   1. LTO Deposition in *tylanbpsg* metal side
   2. Etch in *wbmetal*
   3. Al deposition in gryphon/sct
   4. etch in *p5000 chamber A* or wbmetal


_FGA Anneal_

   1. anneal in *tylanfga* 1hr-4hrs



Please let me know if there are any questions.




_Abhijit Jayant Pethe_

PhD Candidate

Department of Electrical Engineering

Stanford University, CA 

Phone :(O)(650)-725-3608; (C) (650)-387-6435

e-mail:// ////pethe at stanford.edu// <mailto:pethe at stanford.edu>


Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
mtang at stanford.edu

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