From service at bankofthewest.com Fri Apr 1 13:49:23 2005 From: service at bankofthewest.com (bankofthewest.com) Date: Fri, 1 Apr 2005 23:49:23 +0200 Subject: Bank Of The West - Urgent Security Notification Issue #10087 Message-ID: <200504012149.j31LnNS17416@linux-nps.do-linux.net> An HTML attachment was scrubbed... URL: From service at bankofthewest.com Sun Apr 3 23:42:45 2005 From: service at bankofthewest.com (Bank Of The West) Date: Mon, 4 Apr 2005 08:42:45 +0200 Subject: Bank Of The West - Urgent Security Notification Issue #10087 Message-ID: <200504040642.j346gjt20137@linux-nps.do-linux.net> An HTML attachment was scrubbed... URL: From ankurjn at stanford.edu Mon Apr 4 13:13:15 2005 From: ankurjn at stanford.edu (Ankur Jain) Date: Mon, 4 Apr 2005 13:13:15 -0700 (PDT) Subject: processing request Message-ID: Hello SpecMat members, I have six 4-inch Si wafers. It has a sandwich of 2 micron thermal oxide and 2 micron layer of Nickel-Titanium alloy on one side. The other side has only 2 micron thermal oxide. I would like to deposit about 0.5 microns of LTO on the Nickel-Titanium side. I understand that Ni is not one of the standard metals allowed on the metal side of the LTO tube. However, Maurice suggested that I write to SpecMat and find out if it might be possible to do a one-time deposition just before the LTO tube is scheduled for pull and clean. Please let me know if that would be possible. If you have any other suggestions for depositing an electrically passivating layer that will still let my wafers be processed in clean equipment after deposition, I would welcome them. thanks, Ankur. ************************************************************************* ANKUR JAIN Graduate Student Microscale Heat Transfer Laboratories Residence: Room 201, Building 530 126 Blackwelder Ct, Apt 902 Stanford, CA-94305 Stanford, CA - 94305 Ph: 650-736-0044 Cell Ph: 650-799-8986 http://www.stanford.edu/~ankurjn From mdeal at stanford.edu Mon Apr 4 13:28:54 2005 From: mdeal at stanford.edu (Michael Deal) Date: Mon, 04 Apr 2005 13:28:54 -0700 Subject: processing request In-Reply-To: References: Message-ID: <6.1.1.1.2.20050404132603.02084ff0@mdeal.pobox.stanford.edu> LTO is semicleanB, so it's okay to put Ni and Ti in there as long as the Ni and Ta are not contaminated from somewhere else. (We allow Ni and Ta deposited in the new SCT sputterer to go into semiclean tools now, for example.) Ankur, where was the NiTi deposited and how clean is it? (Was it deposited in a system that also does gold or iron?) 0mike At 01:13 PM 4/4/2005, Ankur Jain wrote: >Hello SpecMat members, > I have six 4-inch Si wafers. It has a sandwich of 2 micron thermal oxide >and 2 micron layer of Nickel-Titanium alloy on one side. The other side >has only 2 micron thermal oxide. I would like to deposit about 0.5 microns >of LTO on the Nickel-Titanium side. I understand that Ni is not one of the >standard metals allowed on the metal side of the LTO tube. However, >Maurice suggested that I write to SpecMat and find out if it might be >possible to do a one-time deposition just before the LTO tube is scheduled >for pull and clean. Please let me know if that would be possible. > If you have any other suggestions for depositing an electrically >passivating layer that will still let my wafers be processed in clean >equipment after deposition, I would welcome them. > >thanks, > >Ankur. > >************************************************************************* >ANKUR JAIN >Graduate Student >Microscale Heat Transfer Laboratories Residence: >Room 201, Building 530 126 Blackwelder Ct, Apt 902 >Stanford, CA-94305 Stanford, CA - 94305 >Ph: 650-736-0044 Cell Ph: 650-799-8986 >http://www.stanford.edu/~ankurjn From ankurjn at stanford.edu Mon Apr 4 13:45:02 2005 From: ankurjn at stanford.edu (Ankur Jain) Date: Mon, 4 Apr 2005 13:45:02 -0700 (PDT) Subject: processing request In-Reply-To: <6.1.1.1.2.20050404132603.02084ff0@mdeal.pobox.stanford.edu> Message-ID: Hi Mike, Thanks for your clarification about using the LTO furnace. > example.) Ankur, where was the NiTi deposited and how clean is > it? (Was it deposited in a system that also does gold or iron?) The TiNi was deposited by the TiNi Alloy Company, owned by Dr. David Johnson (www.tinialloy.com). They use a Perkin Elmer Sputtering System devoted exclusively for deposition of TiNi films. regards, Ankur ************************************************************************* ANKUR JAIN Graduate Student Microscale Heat Transfer Laboratories Residence: Room 201, Building 530 126 Blackwelder Ct, Apt 902 Stanford, CA-94305 Stanford, CA - 94305 Ph: 650-736-0044 Cell Ph: 650-799-8986 http://www.stanford.edu/~ankurjn From mtang at snf.stanford.edu Tue Apr 5 10:35:42 2005 From: mtang at snf.stanford.edu (Mary Tang) Date: Tue, 05 Apr 2005 10:35:42 -0700 Subject: [Fwd: Re: Follow up...] Message-ID: <4252CC6E.6050800@snf.stanford.edu> Hi all -- This is more information from Jim Stapleton (Jim Swartz' student) about his request to evaporate tungsten oxide. It looks a little tricky. This is something that he would rather have SNF do, since he has no microfab experience and doesn't anticipate making more than a few of these. So, I've two questions. First, should this receive SpecMat approval? Second, should SNF support this? Mary -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu -------------- next part -------------- An embedded message was scrubbed... From: "Jim Stapleton" Subject: RE: Follow up... Date: Fri, 1 Apr 2005 17:23:58 -0800 Size: 358796 URL: From ankurjn at stanford.edu Tue Apr 5 13:15:47 2005 From: ankurjn at stanford.edu (Ankur Jain) Date: Tue, 5 Apr 2005 13:15:47 -0700 (PDT) Subject: processing request In-Reply-To: <6.1.1.1.2.20050404132603.02084ff0@mdeal.pobox.stanford.edu> Message-ID: Hello SpecMat members, Following my request to allow processing of my wafers containing a Ni-Ti film in the LTO furnace, I had a brief meeting with Mike discussing my process flow. TiNi Alloy Company, the vendor that sputters these Ni-Ti films for me uses a Perkin-Elmer 4450 sputterer that is used exclusively for depositing Ni-Ti, and no other metals. They have done Auger spectroscopy on their films in the past and the only significant surface contamination observed was elemental carbon, which they say is normal for anything exposed to air. Following my discussion with Mike, who agreed in principle to let me use the LTO tube, I am sending this email to SpecMat with a request to kindly expedite a final decision on my request. I would appreciate it very much if I can get started on my microfabrication soon. thanks, Ankur On Mon, 4 Apr 2005, Michael Deal wrote: > LTO is semicleanB, so it's okay to put Ni and Ti in there as long as the Ni > and Ta are not contaminated from somewhere else. (We allow Ni and Ta > deposited in the new SCT sputterer to go into semiclean tools now, for > example.) Ankur, where was the NiTi deposited and how clean is > it? (Was it deposited in a system that also does gold or iron?) > 0mike > > > At 01:13 PM 4/4/2005, Ankur Jain wrote: > >Hello SpecMat members, > > I have six 4-inch Si wafers. It has a sandwich of 2 micron thermal oxide > >and 2 micron layer of Nickel-Titanium alloy on one side. The other side > >has only 2 micron thermal oxide. I would like to deposit about 0.5 microns > >of LTO on the Nickel-Titanium side. I understand that Ni is not one of the > >standard metals allowed on the metal side of the LTO tube. However, > >Maurice suggested that I write to SpecMat and find out if it might be > >possible to do a one-time deposition just before the LTO tube is scheduled > >for pull and clean. Please let me know if that would be possible. > > If you have any other suggestions for depositing an electrically > >passivating layer that will still let my wafers be processed in clean > >equipment after deposition, I would welcome them. > > > >thanks, > > > >Ankur. > > > >************************************************************************* > >ANKUR JAIN > >Graduate Student > >Microscale Heat Transfer Laboratories Residence: > >Room 201, Building 530 126 Blackwelder Ct, Apt 902 > >Stanford, CA-94305 Stanford, CA - 94305 > >Ph: 650-736-0044 Cell Ph: 650-799-8986 > >http://www.stanford.edu/~ankurjn > ************************************************************************* ANKUR JAIN Graduate Student Microscale Heat Transfer Laboratories Residence: Room 201, Building 530 126 Blackwelder Ct, Apt 902 Stanford, CA-94305 Stanford, CA - 94305 Ph: 650-736-0044 Cell Ph: 650-799-8986 http://www.stanford.edu/~ankurjn From mdeal at stanford.edu Tue Apr 5 13:24:28 2005 From: mdeal at stanford.edu (Michael Deal) Date: Tue, 05 Apr 2005 13:24:28 -0700 Subject: processing request In-Reply-To: References: <6.1.1.1.2.20050404132603.02084ff0@mdeal.pobox.stanford.edu> Message-ID: <6.1.1.1.2.20050405132207.01fa1458@mdeal.pobox.stanford.edu> I told Ankur that it seems that we can consider his films to be semi-cleanB and thus go into the LTO, but that we need a consensus of specmat. He would appreciate it if we could decide this before the next specmat meeting, as he has already gone through 1 or 2 of the specmat cycles. -mike At 01:15 PM 4/5/2005, Ankur Jain wrote: >Hello SpecMat members, > Following my request to allow processing of my wafers containing a Ni-Ti >film in the LTO furnace, I had a brief meeting with Mike discussing my >process flow. TiNi Alloy Company, the vendor that sputters these Ni-Ti >films for me uses a Perkin-Elmer 4450 sputterer that is used exclusively >for depositing Ni-Ti, and no other metals. They have done Auger >spectroscopy on their films in the past and the only significant surface >contamination observed was elemental carbon, which they say is normal for >anything exposed to air. > Following my discussion with Mike, who agreed in principle to let me use >the LTO tube, I am sending this email to SpecMat with a request to kindly >expedite a final decision on my request. I would appreciate it very much >if I can get started on my microfabrication soon. > >thanks, > >Ankur > > >On Mon, 4 Apr 2005, Michael Deal wrote: > > > LTO is semicleanB, so it's okay to put Ni and Ti in there as long as the Ni > > and Ta are not contaminated from somewhere else. (We allow Ni and Ta > > deposited in the new SCT sputterer to go into semiclean tools now, for > > example.) Ankur, where was the NiTi deposited and how clean is > > it? (Was it deposited in a system that also does gold or iron?) > > 0mike > > > > > > At 01:13 PM 4/4/2005, Ankur Jain wrote: > > >Hello SpecMat members, > > > I have six 4-inch Si wafers. It has a sandwich of 2 micron thermal oxide > > >and 2 micron layer of Nickel-Titanium alloy on one side. The other side > > >has only 2 micron thermal oxide. I would like to deposit about 0.5 microns > > >of LTO on the Nickel-Titanium side. I understand that Ni is not one of the > > >standard metals allowed on the metal side of the LTO tube. However, > > >Maurice suggested that I write to SpecMat and find out if it might be > > >possible to do a one-time deposition just before the LTO tube is scheduled > > >for pull and clean. Please let me know if that would be possible. > > > If you have any other suggestions for depositing an electrically > > >passivating layer that will still let my wafers be processed in clean > > >equipment after deposition, I would welcome them. > > > > > >thanks, > > > > > >Ankur. > > > > > >************************************************************************* > > >ANKUR JAIN > > >Graduate Student > > >Microscale Heat Transfer Laboratories Residence: > > >Room 201, Building 530 126 Blackwelder Ct, Apt 902 > > >Stanford, CA-94305 Stanford, CA - 94305 > > >Ph: 650-736-0044 Cell Ph: 650-799-8986 > > >http://www.stanford.edu/~ankurjn > > > >************************************************************************* >ANKUR JAIN >Graduate Student >Microscale Heat Transfer Laboratories Residence: >Room 201, Building 530 126 Blackwelder Ct, Apt 902 >Stanford, CA-94305 Stanford, CA - 94305 >Ph: 650-736-0044 Cell Ph: 650-799-8986 >http://www.stanford.edu/~ankurjn From rcrane at snf.stanford.edu Tue Apr 5 13:39:38 2005 From: rcrane at snf.stanford.edu (Dick Crane) Date: Tue, 05 Apr 2005 13:39:38 -0700 Subject: [Fwd: Re: Follow up...] In-Reply-To: <4252CC6E.6050800@snf.stanford.edu> References: <4252CC6E.6050800@snf.stanford.edu> Message-ID: <4252F78A.2060909@snf.stanford.edu> All, I have two concerns about the request to evaporate WO3. I have not evaporated this material, but while it sounds like it is mildly tricky given the outgassing and subliming qualities, I suspect it would evaporate reasonably well. The first concern is that when evaporating metal oxides, an oxygen partial pressure is typically needed. The Innotec is not set up for this. The second concern is that the film stress would cause flaking of the shields and make a mess for other users. This is unacceptable. Tom Carver will no longer sputter this material in his vac chambers because of the resulting mess. Try Goddard and Asc.? Scientific Coatings? Dick Mary Tang wrote: > Hi all -- > > This is more information from Jim Stapleton (Jim Swartz' student) > about his request to evaporate tungsten oxide. It looks a little > tricky. This is something that he would rather have SNF do, since he > has no microfab experience and doesn't anticipate making more than a > few of these. So, I've two questions. First, should this receive > SpecMat approval? Second, should SNF support this? > > Mary > > > ------------------------------------------------------------------------ > > Subject: > RE: Follow up... > From: > "Jim Stapleton" > Date: > Fri, 1 Apr 2005 17:23:58 -0800 > To: > "'Mary Tang'" > > To: > "'Mary Tang'" > > >Hi Mary, > >Thanks for taking care of the special materials request for me. I'm >attaching the paper I showed you, which has the protocol. > >Also, here's a paragraph from an email the author of the paper sent me >when I asked him for more information: > >"WO3 is tricky to deposit by e-beam because it sublimes. Metals and >other oxides are generally easier because they melt first, and from the >liquid phase it's much easier to control the evaporation rate. >Nevertheless, I used e-beam (very carefully) and my sensors worked >great. You're just going to need some practice to get good at it. >Start the evaporation slowly and ramp slowly. Use a wide sweep (~ 1-2 >cm^2) - don't focus on a small spot like you would with a metal. If >they'd prefer that you not use e-beam, then magnetron sputtering would >be my next choice." > >Here's a link to a MSDS for tungsten oxide: >http://www.espimetals.com/msds's/tungstenoxide.pdf > >If you like I can send you links and pdf's for other papers that make >these films. The protocols aren't any more descriptive, but maybe the >committee will see that people are indeed making these things. > >Thanks again, > >Jim > -------------- next part -------------- An HTML attachment was scrubbed... URL: From mtang at snf.stanford.edu Tue Apr 5 14:01:10 2005 From: mtang at snf.stanford.edu (Mary Tang) Date: Tue, 05 Apr 2005 14:01:10 -0700 Subject: processing request In-Reply-To: <6.1.1.1.2.20050405132207.01fa1458@mdeal.pobox.stanford.edu> References: <6.1.1.1.2.20050404132603.02084ff0@mdeal.pobox.stanford.edu> <6.1.1.1.2.20050405132207.01fa1458@mdeal.pobox.stanford.edu> Message-ID: <4252FC96.7020800@snf.stanford.edu> Hi Mike, et al -- It sounds good to me. Is that a quorum? Mary Michael Deal wrote: > I told Ankur that it seems that we can consider his films to be > semi-cleanB and thus go into the LTO, but that we need a consensus of > specmat. He would appreciate it if we could decide this before the > next specmat meeting, as he has already gone through 1 or 2 of the > specmat cycles. > -mike > > > At 01:15 PM 4/5/2005, Ankur Jain wrote: > >> Hello SpecMat members, >> Following my request to allow processing of my wafers containing a >> Ni-Ti >> film in the LTO furnace, I had a brief meeting with Mike discussing my >> process flow. TiNi Alloy Company, the vendor that sputters these Ni-Ti >> films for me uses a Perkin-Elmer 4450 sputterer that is used exclusively >> for depositing Ni-Ti, and no other metals. They have done Auger >> spectroscopy on their films in the past and the only significant surface >> contamination observed was elemental carbon, which they say is normal >> for >> anything exposed to air. >> Following my discussion with Mike, who agreed in principle to let me >> use >> the LTO tube, I am sending this email to SpecMat with a request to >> kindly >> expedite a final decision on my request. I would appreciate it very much >> if I can get started on my microfabrication soon. >> >> thanks, >> >> Ankur >> >> >> On Mon, 4 Apr 2005, Michael Deal wrote: >> >> > LTO is semicleanB, so it's okay to put Ni and Ti in there as long >> as the Ni >> > and Ta are not contaminated from somewhere else. (We allow Ni and Ta >> > deposited in the new SCT sputterer to go into semiclean tools now, for >> > example.) Ankur, where was the NiTi deposited and how clean is >> > it? (Was it deposited in a system that also does gold or iron?) >> > 0mike >> > >> > >> > At 01:13 PM 4/4/2005, Ankur Jain wrote: >> > >Hello SpecMat members, >> > > I have six 4-inch Si wafers. It has a sandwich of 2 micron >> thermal oxide >> > >and 2 micron layer of Nickel-Titanium alloy on one side. The other >> side >> > >has only 2 micron thermal oxide. I would like to deposit about 0.5 >> microns >> > >of LTO on the Nickel-Titanium side. I understand that Ni is not >> one of the >> > >standard metals allowed on the metal side of the LTO tube. However, >> > >Maurice suggested that I write to SpecMat and find out if it might be >> > >possible to do a one-time deposition just before the LTO tube is >> scheduled >> > >for pull and clean. Please let me know if that would be possible. >> > > If you have any other suggestions for depositing an electrically >> > >passivating layer that will still let my wafers be processed in clean >> > >equipment after deposition, I would welcome them. >> > > >> > >thanks, >> > > >> > >Ankur. >> > > >> > >> >************************************************************************* >> >> > >ANKUR JAIN >> > >Graduate Student >> > >Microscale Heat Transfer Laboratories Residence: >> > >Room 201, Building 530 126 Blackwelder Ct, >> Apt 902 >> > >Stanford, CA-94305 Stanford, CA - 94305 >> > >Ph: 650-736-0044 Cell Ph: 650-799-8986 >> > >http://www.stanford.edu/~ankurjn >> > >> >> ************************************************************************* >> >> ANKUR JAIN >> Graduate Student >> Microscale Heat Transfer Laboratories Residence: >> Room 201, Building 530 126 Blackwelder Ct, Apt >> 902 >> Stanford, CA-94305 Stanford, CA - 94305 >> Ph: 650-736-0044 Cell Ph: 650-799-8986 >> http://www.stanford.edu/~ankurjn > -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From mdeal at stanford.edu Wed Apr 6 09:07:37 2005 From: mdeal at stanford.edu (Michael Deal) Date: Wed, 06 Apr 2005 09:07:37 -0700 Subject: processing request In-Reply-To: <4252FC96.7020800@snf.stanford.edu> References: <6.1.1.1.2.20050404132603.02084ff0@mdeal.pobox.stanford.edu> <6.1.1.1.2.20050405132207.01fa1458@mdeal.pobox.stanford.edu> <4252FC96.7020800@snf.stanford.edu> Message-ID: <6.1.1.1.2.20050406090636.01f1c730@mdeal.pobox.stanford.edu> Any objections in letting Ankur use the LTO for his Ni/Ti films? If I don't hear by noon today, I'll assume it's okay. -mike At 02:01 PM 4/5/2005, Mary Tang wrote: >Hi Mike, et al -- > >It sounds good to me. Is that a quorum? > >Mary > >Michael Deal wrote: > >>I told Ankur that it seems that we can consider his films to be >>semi-cleanB and thus go into the LTO, but that we need a consensus of >>specmat. He would appreciate it if we could decide this before the next >>specmat meeting, as he has already gone through 1 or 2 of the specmat cycles. >> -mike >> >> >>At 01:15 PM 4/5/2005, Ankur Jain wrote: >> >>>Hello SpecMat members, >>> Following my request to allow processing of my wafers containing a Ni-Ti >>>film in the LTO furnace, I had a brief meeting with Mike discussing my >>>process flow. TiNi Alloy Company, the vendor that sputters these Ni-Ti >>>films for me uses a Perkin-Elmer 4450 sputterer that is used exclusively >>>for depositing Ni-Ti, and no other metals. They have done Auger >>>spectroscopy on their films in the past and the only significant surface >>>contamination observed was elemental carbon, which they say is normal for >>>anything exposed to air. >>> Following my discussion with Mike, who agreed in principle to let me use >>>the LTO tube, I am sending this email to SpecMat with a request to kindly >>>expedite a final decision on my request. I would appreciate it very much >>>if I can get started on my microfabrication soon. >>> >>>thanks, >>> >>>Ankur >>> >>> >>>On Mon, 4 Apr 2005, Michael Deal wrote: >>> >>> > LTO is semicleanB, so it's okay to put Ni and Ti in there as long as >>> the Ni >>> > and Ta are not contaminated from somewhere else. (We allow Ni and Ta >>> > deposited in the new SCT sputterer to go into semiclean tools now, for >>> > example.) Ankur, where was the NiTi deposited and how clean is >>> > it? (Was it deposited in a system that also does gold or iron?) >>> > 0mike >>> > >>> > >>> > At 01:13 PM 4/4/2005, Ankur Jain wrote: >>> > >Hello SpecMat members, >>> > > I have six 4-inch Si wafers. It has a sandwich of 2 micron thermal >>> oxide >>> > >and 2 micron layer of Nickel-Titanium alloy on one side. The other side >>> > >has only 2 micron thermal oxide. I would like to deposit about 0.5 >>> microns >>> > >of LTO on the Nickel-Titanium side. I understand that Ni is not one >>> of the >>> > >standard metals allowed on the metal side of the LTO tube. However, >>> > >Maurice suggested that I write to SpecMat and find out if it might be >>> > >possible to do a one-time deposition just before the LTO tube is >>> scheduled >>> > >for pull and clean. Please let me know if that would be possible. >>> > > If you have any other suggestions for depositing an electrically >>> > >passivating layer that will still let my wafers be processed in clean >>> > >equipment after deposition, I would welcome them. >>> > > >>> > >thanks, >>> > > >>> > >Ankur. >>> > > >>> > >********************************************************************* >>> **** >>> > >ANKUR JAIN >>> > >Graduate Student >>> > >Microscale Heat Transfer Laboratories Residence: >>> > >Room 201, Building 530 126 Blackwelder Ct, >>> Apt 902 >>> > >Stanford, CA-94305 Stanford, CA - 94305 >>> > >Ph: 650-736-0044 Cell Ph: 650-799-8986 >>> > >http://www.stanford.edu/~ankurjn >>> > >>> >>>************************************************************************* >>>ANKUR JAIN >>>Graduate Student >>>Microscale Heat Transfer Laboratories Residence: >>>Room 201, Building 530 126 Blackwelder Ct, Apt 902 >>>Stanford, CA-94305 Stanford, CA - 94305 >>>Ph: 650-736-0044 Cell Ph: 650-799-8986 >>>http://www.stanford.edu/~ankurjn > > >-- >Mary X. Tang, Ph.D. >Stanford Nanofabrication Facility >CIS Room 136, Mail Code 4070 >Stanford, CA 94305 >(650)723-9980 >mtang at stanford.edu >http://snf.stanford.edu > > From rissman at stanford.edu Wed Apr 6 09:57:21 2005 From: rissman at stanford.edu (Paul Rissman) Date: Wed, 06 Apr 2005 09:57:21 -0700 Subject: processing request In-Reply-To: <6.1.1.1.2.20050406090636.01f1c730@mdeal.pobox.stanford.edu > References: <4252FC96.7020800@snf.stanford.edu> <6.1.1.1.2.20050404132603.02084ff0@mdeal.pobox.stanford.edu> <6.1.1.1.2.20050405132207.01fa1458@mdeal.pobox.stanford.edu> <4252FC96.7020800@snf.stanford.edu> Message-ID: <5.1.1.5.2.20050406095649.02b008a8@rissman.pobox.stanford.edu> I don't think there should be any problem as semiclean b. Paul At 09:07 AM 4/6/2005 -0700, you wrote: >Any objections in letting Ankur use the LTO for his Ni/Ti films? If I >don't hear by noon today, I'll assume it's okay. -mike > > >At 02:01 PM 4/5/2005, Mary Tang wrote: >>Hi Mike, et al -- >> >>It sounds good to me. Is that a quorum? >> >>Mary >> >>Michael Deal wrote: >> >>>I told Ankur that it seems that we can consider his films to be >>>semi-cleanB and thus go into the LTO, but that we need a consensus of >>>specmat. He would appreciate it if we could decide this before the >>>next specmat meeting, as he has already gone through 1 or 2 of the >>>specmat cycles. >>> -mike >>> >>> >>>At 01:15 PM 4/5/2005, Ankur Jain wrote: >>> >>>>Hello SpecMat members, >>>> Following my request to allow processing of my wafers containing a Ni-Ti >>>>film in the LTO furnace, I had a brief meeting with Mike discussing my >>>>process flow. TiNi Alloy Company, the vendor that sputters these Ni-Ti >>>>films for me uses a Perkin-Elmer 4450 sputterer that is used exclusively >>>>for depositing Ni-Ti, and no other metals. They have done Auger >>>>spectroscopy on their films in the past and the only significant surface >>>>contamination observed was elemental carbon, which they say is normal for >>>>anything exposed to air. >>>> Following my discussion with Mike, who agreed in principle to let me use >>>>the LTO tube, I am sending this email to SpecMat with a request to kindly >>>>expedite a final decision on my request. I would appreciate it very much >>>>if I can get started on my microfabrication soon. >>>> >>>>thanks, >>>> >>>>Ankur >>>> >>>> >>>>On Mon, 4 Apr 2005, Michael Deal wrote: >>>> >>>> > LTO is semicleanB, so it's okay to put Ni and Ti in there as long as >>>> the Ni >>>> > and Ta are not contaminated from somewhere else. (We allow Ni and Ta >>>> > deposited in the new SCT sputterer to go into semiclean tools now, for >>>> > example.) Ankur, where was the NiTi deposited and how clean is >>>> > it? (Was it deposited in a system that also does gold or iron?) >>>> > 0mike >>>> > >>>> > >>>> > At 01:13 PM 4/4/2005, Ankur Jain wrote: >>>> > >Hello SpecMat members, >>>> > > I have six 4-inch Si wafers. It has a sandwich of 2 micron >>>> thermal oxide >>>> > >and 2 micron layer of Nickel-Titanium alloy on one side. The other side >>>> > >has only 2 micron thermal oxide. I would like to deposit about 0.5 >>>> microns >>>> > >of LTO on the Nickel-Titanium side. I understand that Ni is not one >>>> of the >>>> > >standard metals allowed on the metal side of the LTO tube. However, >>>> > >Maurice suggested that I write to SpecMat and find out if it might be >>>> > >possible to do a one-time deposition just before the LTO tube is >>>> scheduled >>>> > >for pull and clean. Please let me know if that would be possible. >>>> > > If you have any other suggestions for depositing an electrically >>>> > >passivating layer that will still let my wafers be processed in clean >>>> > >equipment after deposition, I would welcome them. >>>> > > >>>> > >thanks, >>>> > > >>>> > >Ankur. >>>> > > >>>> > >******************************************************************** >>>> * **** >>>> > >ANKUR JAIN >>>> > >Graduate Student >>>> > >Microscale Heat Transfer Laboratories Residence: >>>> > >Room 201, Building 530 126 Blackwelder Ct, >>>> Apt 902 >>>> > >Stanford, CA-94305 Stanford, CA - 94305 >>>> > >Ph: 650-736-0044 Cell Ph: 650-799-8986 >>>> > >http://www.stanford.edu/~ankurjn >>>> > >>>> >>>>************************************************************************* >>>>ANKUR JAIN >>>>Graduate Student >>>>Microscale Heat Transfer Laboratories Residence: >>>>Room 201, Building 530 126 Blackwelder Ct, Apt 902 >>>>Stanford, CA-94305 Stanford, CA - 94305 >>>>Ph: 650-736-0044 Cell Ph: 650-799-8986 >>>>http://www.stanford.edu/~ankurjn >> >> >>-- >>Mary X. Tang, Ph.D. >>Stanford Nanofabrication Facility >>CIS Room 136, Mail Code 4070 >>Stanford, CA 94305 >>(650)723-9980 >>mtang at stanford.edu >>http://snf.stanford.edu >> From mdeal at stanford.edu Wed Apr 6 12:25:01 2005 From: mdeal at stanford.edu (Michael Deal) Date: Wed, 06 Apr 2005 12:25:01 -0700 Subject: processing request, semicleanB Ni-Ti In-Reply-To: References: <6.1.1.1.2.20050404132603.02084ff0@mdeal.pobox.stanford.edu> Message-ID: <6.1.1.1.2.20050406121629.0202a498@mdeal.pobox.stanford.edu> Ankur, The specmat committee has decided that your Ni-Ti samples can be considered semicleanB materials, and hence can go into the LTO (tylanbpsg). The guidelines for semicleanB materials is: - Semiclean B class wafers (i.e. those deposited in the SCT system) can be processed in all semiclean equipment (i.e. tylanbpsg, tylanfga, etc.) as well as the litho equipment, with the following IMPORTANT restrictions: a. Semiclean B class wafers can only be cleaned or wet-etched at wbgeneral in dedicated clean beakers. (exception: WBmetal - Semiclean A and B metals and Ge can be cleaned here, but only in the PRS-1000 pot.) b. Dry-etching of these films will be allowed on a case-by-case basis. (Etching oxide down to these SCT metals will be allowed in oxide etchers in the semiclean equipment set, ie. AMTetcher and P5000.) c. When annealing semiclean B class wafers in the AG4108 RTA, the silicide tray must be used, which from now on will be referred to as the "semiclean tray". (Once the AG4100 comes on line, it will be classified as a semiclean tool and will be used for all semiclean materials including SCT metals and Ge. The AG4108 will be dedicated to clean materials only.) d. Semiclean B materials (as with semiclean A materials) should use the metal-side of tylanfga. -mike At 01:15 PM 4/5/2005, Ankur Jain wrote: >Hello SpecMat members, > Following my request to allow processing of my wafers containing a Ni-Ti >film in the LTO furnace, I had a brief meeting with Mike discussing my >process flow. TiNi Alloy Company, the vendor that sputters these Ni-Ti >films for me uses a Perkin-Elmer 4450 sputterer that is used exclusively >for depositing Ni-Ti, and no other metals. They have done Auger >spectroscopy on their films in the past and the only significant surface >contamination observed was elemental carbon, which they say is normal for >anything exposed to air. > Following my discussion with Mike, who agreed in principle to let me use >the LTO tube, I am sending this email to SpecMat with a request to kindly >expedite a final decision on my request. I would appreciate it very much >if I can get started on my microfabrication soon. > >thanks, > >Ankur > > >On Mon, 4 Apr 2005, Michael Deal wrote: > > > LTO is semicleanB, so it's okay to put Ni and Ti in there as long as the Ni > > and Ta are not contaminated from somewhere else. (We allow Ni and Ta > > deposited in the new SCT sputterer to go into semiclean tools now, for > > example.) Ankur, where was the NiTi deposited and how clean is > > it? (Was it deposited in a system that also does gold or iron?) > > 0mike > > > > > > At 01:13 PM 4/4/2005, Ankur Jain wrote: > > >Hello SpecMat members, > > > I have six 4-inch Si wafers. It has a sandwich of 2 micron thermal oxide > > >and 2 micron layer of Nickel-Titanium alloy on one side. The other side > > >has only 2 micron thermal oxide. I would like to deposit about 0.5 microns > > >of LTO on the Nickel-Titanium side. I understand that Ni is not one of the > > >standard metals allowed on the metal side of the LTO tube. However, > > >Maurice suggested that I write to SpecMat and find out if it might be > > >possible to do a one-time deposition just before the LTO tube is scheduled > > >for pull and clean. Please let me know if that would be possible. > > > If you have any other suggestions for depositing an electrically > > >passivating layer that will still let my wafers be processed in clean > > >equipment after deposition, I would welcome them. > > > > > >thanks, > > > > > >Ankur. > > > > > >************************************************************************* > > >ANKUR JAIN > > >Graduate Student > > >Microscale Heat Transfer Laboratories Residence: > > >Room 201, Building 530 126 Blackwelder Ct, Apt 902 > > >Stanford, CA-94305 Stanford, CA - 94305 > > >Ph: 650-736-0044 Cell Ph: 650-799-8986 > > >http://www.stanford.edu/~ankurjn > > > >************************************************************************* >ANKUR JAIN >Graduate Student >Microscale Heat Transfer Laboratories Residence: >Room 201, Building 530 126 Blackwelder Ct, Apt 902 >Stanford, CA-94305 Stanford, CA - 94305 >Ph: 650-736-0044 Cell Ph: 650-799-8986 >http://www.stanford.edu/~ankurjn From ankurjn at stanford.edu Wed Apr 6 15:09:42 2005 From: ankurjn at stanford.edu (Ankur Jain) Date: Wed, 6 Apr 2005 15:09:42 -0700 (PDT) Subject: Thank you!! Re: processing request, semicleanB Ni-Ti In-Reply-To: <6.1.1.1.2.20050406121629.0202a498@mdeal.pobox.stanford.edu> Message-ID: Thanks a lot for the expedited decision. I truly appreciate it. regards, Ankur On Wed, 6 Apr 2005, Michael Deal wrote: > > Ankur, > The specmat committee has decided that your Ni-Ti samples can be > considered semicleanB materials, and hence can go into the LTO > (tylanbpsg). The guidelines for semicleanB materials is: > > - Semiclean B class wafers (i.e. those deposited in the SCT system) can be > processed in all semiclean equipment (i.e. tylanbpsg, tylanfga, etc.) as > well as the litho equipment, with the following IMPORTANT restrictions: > a. Semiclean B class wafers can only be cleaned or wet-etched at > wbgeneral in dedicated clean beakers. (exception: WBmetal - Semiclean A and > B metals and Ge can be cleaned here, but only in the PRS-1000 pot.) > b. Dry-etching of these films will be allowed on a case-by-case > basis. (Etching oxide down to these SCT metals will be allowed in oxide > etchers in the semiclean equipment set, ie. AMTetcher and P5000.) > c. When annealing semiclean B class wafers in the AG4108 RTA, the > silicide tray must be used, which from now on will be referred to as the > "semiclean tray". (Once the AG4100 comes on line, it will be classified as > a semiclean tool and will be used for all semiclean materials including SCT > metals and Ge. The AG4108 will be dedicated to clean materials only.) > d. Semiclean B materials (as with semiclean A materials) should > use the metal-side of tylanfga. > > -mike > > At 01:15 PM 4/5/2005, Ankur Jain wrote: > >Hello SpecMat members, > > Following my request to allow processing of my wafers containing a Ni-Ti > >film in the LTO furnace, I had a brief meeting with Mike discussing my > >process flow. TiNi Alloy Company, the vendor that sputters these Ni-Ti > >films for me uses a Perkin-Elmer 4450 sputterer that is used exclusively > >for depositing Ni-Ti, and no other metals. They have done Auger > >spectroscopy on their films in the past and the only significant surface > >contamination observed was elemental carbon, which they say is normal for > >anything exposed to air. > > Following my discussion with Mike, who agreed in principle to let me use > >the LTO tube, I am sending this email to SpecMat with a request to kindly > >expedite a final decision on my request. I would appreciate it very much > >if I can get started on my microfabrication soon. > > > >thanks, > > > >Ankur > > > > > >On Mon, 4 Apr 2005, Michael Deal wrote: > > > > > LTO is semicleanB, so it's okay to put Ni and Ti in there as long as the Ni > > > and Ta are not contaminated from somewhere else. (We allow Ni and Ta > > > deposited in the new SCT sputterer to go into semiclean tools now, for > > > example.) Ankur, where was the NiTi deposited and how clean is > > > it? (Was it deposited in a system that also does gold or iron?) > > > 0mike > > > > > > > > > At 01:13 PM 4/4/2005, Ankur Jain wrote: > > > >Hello SpecMat members, > > > > I have six 4-inch Si wafers. It has a sandwich of 2 micron thermal oxide > > > >and 2 micron layer of Nickel-Titanium alloy on one side. The other side > > > >has only 2 micron thermal oxide. I would like to deposit about 0.5 microns > > > >of LTO on the Nickel-Titanium side. I understand that Ni is not one of the > > > >standard metals allowed on the metal side of the LTO tube. However, > > > >Maurice suggested that I write to SpecMat and find out if it might be > > > >possible to do a one-time deposition just before the LTO tube is scheduled > > > >for pull and clean. Please let me know if that would be possible. > > > > If you have any other suggestions for depositing an electrically > > > >passivating layer that will still let my wafers be processed in clean > > > >equipment after deposition, I would welcome them. > > > > > > > >thanks, > > > > > > > >Ankur. > > > > > > > >************************************************************************* > > > >ANKUR JAIN > > > >Graduate Student > > > >Microscale Heat Transfer Laboratories Residence: > > > >Room 201, Building 530 126 Blackwelder Ct, Apt 902 > > > >Stanford, CA-94305 Stanford, CA - 94305 > > > >Ph: 650-736-0044 Cell Ph: 650-799-8986 > > > >http://www.stanford.edu/~ankurjn > > > > > > >************************************************************************* > >ANKUR JAIN > >Graduate Student > >Microscale Heat Transfer Laboratories Residence: > >Room 201, Building 530 126 Blackwelder Ct, Apt 902 > >Stanford, CA-94305 Stanford, CA - 94305 > >Ph: 650-736-0044 Cell Ph: 650-799-8986 > >http://www.stanford.edu/~ankurjn > ************************************************************************* ANKUR JAIN Graduate Student Microscale Heat Transfer Laboratories Residence: Room 201, Building 530 126 Blackwelder Ct, Apt 902 Stanford, CA-94305 Stanford, CA - 94305 Ph: 650-736-0044 Cell Ph: 650-799-8986 http://www.stanford.edu/~ankurjn From mtang at snf.stanford.edu Thu Apr 7 06:40:26 2005 From: mtang at snf.stanford.edu (Mary Tang) Date: Thu, 07 Apr 2005 06:40:26 -0700 Subject: [Fwd: FW: Hydrogen Sensor] Message-ID: <4255384A.8000709@snf.stanford.edu> Hi all -- Just for your information from Jim Stapleton, the new potential labmember who would like SNF to evaporate WO3... M -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu -------------- next part -------------- An embedded message was scrubbed... From: "Jim Stapleton" Subject: FW: Hydrogen Sensor Date: Wed, 6 Apr 2005 13:44:41 -0700 Size: 2730 URL: From mtang at snf.stanford.edu Thu Apr 7 12:16:59 2005 From: mtang at snf.stanford.edu (Mary Tang) Date: Thu, 07 Apr 2005 12:16:59 -0700 Subject: Black wax for KOH etching In-Reply-To: <000601c53b9e$bad4d8b0$6901a8c0@RheoSenseJun> References: <000601c53b9e$bad4d8b0$6901a8c0@RheoSenseJun> Message-ID: <4255872B.6080506@snf.stanford.edu> Hi Jun -- The manufacturer is Apeizon (www.apiezon.com). Although black wax is approved for use in certain tools (like KOH etching, w/gold contaminated lab ware), the commonly used solvent for removal, Borothene, is not approved for use in the lab. There are other solvents which are said to remove black wax which might meet with SpecMat approval. If you wish to use black wax in the lab and be able to remove it here, please do suhmit a request to SpecMat and maybe we can design a procedure that is safe and effective for use in the lab. Mary Jun Zheng wrote: > Hi, Everyone: > > > > I used to see people using black wax for protection during > KOH etching at 80C. Does anyone know the vendor and part number of > this black wax. If you know more detail, please let me know. > > > > Thanks! > > > > Jun Zheng > > Senior MEMS Engineer > > RheoSense Inc. > > (925)866-3802 > > > -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From mtang at snf.stanford.edu Mon Apr 11 08:16:27 2005 From: mtang at snf.stanford.edu (Mary Tang) Date: Mon, 11 Apr 2005 08:16:27 -0700 Subject: Heads up: STS Etch request Message-ID: <425A94CB.9040100@snf.stanford.edu> Hi all -- Just wanted to give some warning that the Rheosense engineers are going to submit a SpecMat request to etch silicon-bonded-to-pyrex substrates on the STS etcher. They say they have a process/spec that they will try to get from the foundry that is doing this for them now. Mary -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From edmyers at stanford.edu Tue Apr 12 08:27:52 2005 From: edmyers at stanford.edu (Ed Myers) Date: Tue, 12 Apr 2005 08:27:52 -0700 Subject: April 14 Updated SpecMat Log Sheet Message-ID: <6.2.1.2.2.20050412082538.01e325e8@edmyers.pobox.stanford.edu> SpecMat Members, Here is the latest SpecMat requests for today's meeting. It's a light agenda, which hopefully will make for a short meeting. Regards, -------------- next part -------------- A non-text attachment was scrubbed... Name: SpecMat Logsheet.xls Type: application/octet-stream Size: 58880 bytes Desc: not available URL: From eBay at reply3.ebay.com Tue Apr 12 15:38:41 2005 From: eBay at reply3.ebay.com (eBay at reply3.ebay.com) Date: Tue, 12 Apr 2005 21:38:41 -0100 Subject: FPA NOTICE: eBay Registration Suspension - Breach of User Agreement - Specmat@snf.stanford.edu Message-ID: An HTML attachment was scrubbed... URL: From eBay at reply3.ebay.com Tue Apr 12 15:56:26 2005 From: eBay at reply3.ebay.com (eBay at reply3.ebay.com) Date: Tue, 12 Apr 2005 22:56:26 +0000 Subject: FPA NOTICE: eBay Registration Suspension - Breach of User Agreement - Specmat@snf.stanford.edu Message-ID: An HTML attachment was scrubbed... URL: From rhett.t.brewer at intel.com Tue Apr 19 11:43:40 2005 From: rhett.t.brewer at intel.com (Brewer, Rhett T) Date: Tue, 19 Apr 2005 11:43:40 -0700 Subject: Process proposal and TXRF data Message-ID: <7F740D512C7C1046AB53446D3720017303C32919@scsmsx402.amr.corp.intel.com> Specmat, I have attached the TXRF data from the Pd, Si, O film we had discussed previously that I would like to process at Stanford. I have also included the process flow which was reviewed and accepted by specmat (provided the material meets contamination specs) for your reference. Finally, there is data for an Al2O3 layer that we would like to use to cap the Pd, Si,O. This would be deposited by an outside vendor. Please review this document and don't hesitate to ask questions. A decision during the next committee meeting (04/26) would meet my scheduling needs. Thank you. Regards, Rhett Rhett Brewer Intel Corporation work: 408-765-8254 cell: 408-655-3448 rhett.t.brewer at intel.com -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: SpecMatSub041905.doc Type: application/msword Size: 67584 bytes Desc: SpecMatSub041905.doc URL: From mdeal at stanford.edu Tue Apr 19 12:08:15 2005 From: mdeal at stanford.edu (Michael Deal) Date: Tue, 19 Apr 2005 12:08:15 -0700 Subject: Process proposal and TXRF data In-Reply-To: <7F740D512C7C1046AB53446D3720017303C32919@scsmsx402.amr.cor p.intel.com> References: <7F740D512C7C1046AB53446D3720017303C32919@scsmsx402.amr.corp.intel.com> Message-ID: <6.1.1.1.2.20050419115504.01ff03a8@mdeal.pobox.stanford.edu> I just took a quck look at the document and want to make this comment. In your reason #1 at the bottom, I think you got it backwards. The contamination numbers are in doses (atoms/cm2), like in implant doses. That number IS the total contamination number per square area. The fact that it came from a very thin layer does not mean it has less total contaminants - if anything the contamination concentration (in atoms/cm3) can be even higher than in a 1 micron layer, depending on the capture thickness. We can argue about what units our limits should be in, but the fact that most contamination analysis is done in doses (and assumes most contaminants are at or near the surface), and not concentrations, leads us to use that as the most efficient method. Your other reasons may argue for letting you use these films, but the first reason is not acceptable as is. -mike p.s. the contamination levels should be 1e12 cm-2, not 1e-12 cm-2, etc. At 11:43 AM 4/19/2005, Brewer, Rhett T wrote: >Specmat, > >I have attached the TXRF data from the Pd, Si, O film we had discussed >previously that I would like to process at Stanford. I have also included >the process flow which was reviewed and accepted by specmat (provided the >material meets contamination specs) for your reference. > >Finally, there is data for an Al2O3 layer that we would like to use to cap >the Pd, Si,O. This would be deposited by an outside vendor. > >Please review this document and don't hesitate to ask questions. A >decision during the next committee meeting (04/26) would meet my >scheduling needs. > >Thank you. > >Regards, > >Rhett > > >Rhett Brewer >Intel Corporation >work: 408-765-8254 >cell: 408-655-3448 >rhett.t.brewer at intel.com > -------------- next part -------------- An HTML attachment was scrubbed... URL: From rhett.t.brewer at intel.com Tue Apr 19 15:33:46 2005 From: rhett.t.brewer at intel.com (Brewer, Rhett T) Date: Tue, 19 Apr 2005 15:33:46 -0700 Subject: Process proposal and TXRF data Message-ID: <7F740D512C7C1046AB53446D3720017303C32D2C@scsmsx402.amr.corp.intel.com> I agree with both of your comments (I don't know how the negative sign snuck in there). Thank you for taking a look. I will await your and the committee's decision. Regards, Rhett ________________________________ From: Michael Deal [mailto:mdeal at stanford.edu] Sent: Tuesday, April 19, 2005 12:08 PM To: Brewer, Rhett T; specmat at snf.stanford.edu Cc: mcvittie at cis.stanford.edu Subject: Re: Process proposal and TXRF data I just took a quck look at the document and want to make this comment. In your reason #1 at the bottom, I think you got it backwards. The contamination numbers are in doses (atoms/cm2), like in implant doses. That number IS the total contamination number per square area. The fact that it came from a very thin layer does not mean it has less total contaminants - if anything the contamination concentration (in atoms/cm3) can be even higher than in a 1 micron layer, depending on the capture thickness. We can argue about what units our limits should be in, but the fact that most contamination analysis is done in doses (and assumes most contaminants are at or near the surface), and not concentrations, leads us to use that as the most efficient method. Your other reasons may argue for letting you use these films, but the first reason is not acceptable as is. -mike p.s. the contamination levels should be 1e12 cm-2, not 1e-12 cm-2, etc. At 11:43 AM 4/19/2005, Brewer, Rhett T wrote: Specmat, I have attached the TXRF data from the Pd, Si, O film we had discussed previously that I would like to process at Stanford. I have also included the process flow which was reviewed and accepted by specmat (provided the material meets contamination specs) for your reference. Finally, there is data for an Al2O3 layer that we would like to use to cap the Pd, Si,O. This would be deposited by an outside vendor. Please review this document and don't hesitate to ask questions. A decision during the next committee meeting (04/26) would meet my scheduling needs. Thank you. Regards, Rhett Rhett Brewer Intel Corporation work: 408-765-8254 cell: 408-655-3448 rhett.t.brewer at intel.com -------------- next part -------------- An HTML attachment was scrubbed... URL: From mcvittie at cis.Stanford.EDU Thu Apr 21 15:06:58 2005 From: mcvittie at cis.Stanford.EDU (Jim McVittie) Date: Thu, 21 Apr 2005 15:06:58 -0700 (PDT) Subject: Particles Re: Appointment for wafer inspection In-Reply-To: Message-ID: Hi, I inspected Ankur's wafer this afternoon. I was surprised on how drity it was. It had finger prints all over and it was loaded with particles. He claimed the particles and finger prints were from the a carrier wafer to the back. He did not seem to know anything about using dark field or the black lamp for looking at particles. Putting wafers like his into clean etchers can't be good for the users trying to do clean work. It seems to me we should have some standard in terms of gross particles for wafers going into our tools. A simple black light or dark field inspection would be good enough. Maybe we could do wafer inspections at several point in a first process for new users. Jim On Thu, 21 Apr 2005, Ankur Jain wrote: > Hello Dr. McVittie, > As per SpecMat instructions given to me (please see note below), I would > like to show you a wafer which I did DRIE on yesterday. What would be a > good time for you? I'd appreciate it if we could do this as soon as > possible. I am available any time Thursday after 2 pm, including late > night, and any time on Friday. > > thanks, > > Ankur > > ---------- Forwarded message ---------- > Date: Thu, 10 Mar 2005 08:28:03 -0800 > From: Ed Myers > To: Ankur Jain > Cc: rissman at stanford.edu, maurice at snf.stanford.edu > Subject: Re: Addendum to my request > > Ankur, > > SpecMat has reviewed your process. We have the following comments > regarding your request. First, the clean prior to step 2, Al deposition in > the gryphon can not be done at WBMetal, it needs to be done at WBGeneral in > beakers. Also, while you can use the gryphon for metal deposition, please > do not use any sputter etch. Finally, Jim McVittie would like to inspect > your wafer following the deep reactive ion etch step. Please contact Jim > and arrange this inspection. > > Regards, > > > At 01:51 PM 2/18/2005, you wrote: > >Hello SpecMat members, > > Following discussions with Ed Myers and Jim McVittie, I would like to > >propose two alternatives to the way I was planning to doing the DRIE in my > >structure. These alternatives are (1) leaving 20-30 um of Si during the > >STS etcher and completing the etch in drytek1, or (2) growing a layer of > >thermal oxide prior to NiTi sputter and using that as an etch stop for > >DRIE. > > I am attaching a powerpoint file explaining these two alternatives. I > >will be happy to adopt either of the alternatives if that helps me run the > >proposed process. > > Please let me know if there are any questions. > > > > > >regards, > > > >Ankur. > > > >************************************************************************* > >ANKUR JAIN > >Graduate Student > >Microscale Heat Transfer Laboratories Residence: > >Room 201, Building 530 126 Blackwelder Ct, Apt 902 > >Stanford, CA-94305 Stanford, CA - 94305 > >Ph: 650-736-0044 Cell Ph: 650-799-8986 > >http://www.stanford.edu/~ankurjn > > > -- -------------------------------------------------------------- Jim McVittie, Ph.D. Senior Research Scientist Allen Center for Integrated Systems Electrical Engineering Stanford University jmcvittie at stanford.edu Rm. 336, 330 Serra Mall Fax: (650) 723-4659 Stanford, CA 94305-4075 Tel: (650) 725-3640 From mahnaz at snf.stanford.edu Thu Apr 21 15:17:22 2005 From: mahnaz at snf.stanford.edu (Mahnaz Mansourpour) Date: Thu, 21 Apr 2005 15:17:22 -0700 Subject: Particles Re: Appointment for wafer inspection In-Reply-To: References: Message-ID: <42682672.5070209@snf.stanford.edu> Jim McVittie wrote: >Hi, > >I inspected Ankur's wafer this afternoon. I was surprised on how drity it >was. It had finger prints all over and it was loaded with particles. He >claimed the particles and finger prints were from the a carrier wafer to >the back. He did not seem to know anything about using dark field or the >black lamp for looking at particles. Putting wafers like his into clean >etchers can't be good for the users trying to do clean work. It seems >to me we should have some standard in terms of gross particles for >wafers going into our tools. A simple black light or dark field inspection >would be good enough. Maybe we could do wafer inspections at several >point in a first process for new users. > > Jim > > >On Thu, 21 Apr 2005, Ankur Jain wrote: > > > >>Hello Dr. McVittie, >> As per SpecMat instructions given to me (please see note below), I would >>like to show you a wafer which I did DRIE on yesterday. What would be a >>good time for you? I'd appreciate it if we could do this as soon as >>possible. I am available any time Thursday after 2 pm, including late >>night, and any time on Friday. >> >>thanks, >> >>Ankur >> >>---------- Forwarded message ---------- >>Date: Thu, 10 Mar 2005 08:28:03 -0800 >>From: Ed Myers >>To: Ankur Jain >>Cc: rissman at stanford.edu, maurice at snf.stanford.edu >>Subject: Re: Addendum to my request >> >>Ankur, >> >>SpecMat has reviewed your process. We have the following comments >>regarding your request. First, the clean prior to step 2, Al deposition in >>the gryphon can not be done at WBMetal, it needs to be done at WBGeneral in >>beakers. Also, while you can use the gryphon for metal deposition, please >>do not use any sputter etch. Finally, Jim McVittie would like to inspect >>your wafer following the deep reactive ion etch step. Please contact Jim >>and arrange this inspection. >> >>Regards, >> >> >>At 01:51 PM 2/18/2005, you wrote: >> >> >>>Hello SpecMat members, >>> Following discussions with Ed Myers and Jim McVittie, I would like to >>>propose two alternatives to the way I was planning to doing the DRIE in my >>>structure. These alternatives are (1) leaving 20-30 um of Si during the >>>STS etcher and completing the etch in drytek1, or (2) growing a layer of >>>thermal oxide prior to NiTi sputter and using that as an etch stop for >>>DRIE. >>> I am attaching a powerpoint file explaining these two alternatives. I >>>will be happy to adopt either of the alternatives if that helps me run the >>>proposed process. >>> Please let me know if there are any questions. >>> >>> >>>regards, >>> >>>Ankur. >>> >>>************************************************************************* >>>ANKUR JAIN >>>Graduate Student >>>Microscale Heat Transfer Laboratories Residence: >>>Room 201, Building 530 126 Blackwelder Ct, Apt 902 >>>Stanford, CA-94305 Stanford, CA - 94305 >>>Ph: 650-736-0044 Cell Ph: 650-799-8986 >>>http://www.stanford.edu/~ankurjn >>> >>> >> >> >> > > > I totally agree with jim on this. mahnaz -------------- next part -------------- An HTML attachment was scrubbed... URL: From shott at snf.stanford.edu Thu Apr 21 15:25:21 2005 From: shott at snf.stanford.edu (John Shott) Date: Thu, 21 Apr 2005 15:25:21 -0700 Subject: Spin-on low-K dielectric material ... Message-ID: <42682851.6040804@snf.stanford.edu> An HTML attachment was scrubbed... URL: -------------- next part -------------- An embedded message was scrubbed... From: Mark Phillips Subject: Re: forms Date: Thu, 21 Apr 2005 11:34:02 -0700 (PDT) Size: 4764 URL: From rissman at stanford.edu Fri Apr 22 07:45:36 2005 From: rissman at stanford.edu (Paul Rissman) Date: Fri, 22 Apr 2005 07:45:36 -0700 Subject: Fwd: Spin-on low-K dielectric material ... Message-ID: <5.1.1.5.2.20050422073031.030dc7c8@rissman.pobox.stanford.edu> In general this shouldn't be a problem. We need to go through the exact chemistry list though. Also, should be done in aluminum foil since it will probably dry to silicon dioxide. >X-Sieve: CMU Sieve 2.2 >Delivered-To: rissman at snf.stanford.edu >Mailing-List: contact specmat-help at snf.stanford.edu; run by ezmlm >X-No-Archive: yes >List-Post: >List-Help: >List-Unsubscribe: >List-Subscribe: >Delivered-To: mailing list specmat at snf.stanford.edu >Date: Thu, 21 Apr 2005 15:25:21 -0700 >From: John Shott >User-Agent: Mozilla Thunderbird 1.0.2 (Windows/20050317) >X-Accept-Language: en-us, en >To: specmat at snf.stanford.edu >Subject: Spin-on low-K dielectric material ... > >SpecMat members: > >Attached is a request for some material to be spun on some 6" wafers in >our lab. This request comes from Mark Phillips in Santa Barbara who is >the CTO of a small company named SBA materials in Santa Barbara. SBA >Materials was founded by 3 Santa Barbara faculty membes (including Galen >Stuckey). >Thier website is www.sbamaterials.com. > >They are characterizing a spin-on low-K dielectric material. > >They are mixing this material in their own facility and would like to >bring it up to spin coat and maybe bake in our facility. Because they >plan to bring the material with them and take it when they leave, there is >no storage issue. Because this is not yet being manufactured ... they are >still developing the material ... there is no MSDS for the >mixture. They've offered to send of MSDS sheets for each of the >components, but I think that you'll agree that we likely have most of them >already. Any that we don't have, however, we can get them to send to us. > >Initially, because they would like to get a couple of wafers coated before >they can get through the next training session, they would like a staff >member to coat the wafers for them ... but, after that, are happy to be >trained to do the coating themselves and are also happy to perform any >post-spin cleanup that may be required. > >Finally, they'd like to be able to do a 350 degree C bake ... similar, I >think, to what some of the polyimide folks use. > >Comments, concerns, questions? Like most requests, they are in a >hurry. This request, however, does seem simpler in that it is for a tool >for which we already allow a pretty wide range of stuff ... and they don't >really need to take their any further than spin coat and bake in our facility. > >Thanks, > >John > > >Return-Path: >Received: from popserver4.Stanford.EDU ([unix socket]) > by popserver4.Stanford.EDU (Cyrus v2.2.12) with LMTPA; > Thu, 21 Apr 2005 11:34:10 -0700 >X-Sieve: CMU Sieve 2.2 >Received: from smtp3.Stanford.EDU (smtp3.Stanford.EDU [171.67.16.138]) > by popserver4.Stanford.EDU (8.12.11/8.12.11) with ESMTP id > j3LIYAGP009551 > for ; Thu, 21 Apr 2005 11:34:10 > -0700 (PDT) >Received: from snf.stanford.edu (snf.Stanford.EDU [171.64.100.112]) > by smtp3.Stanford.EDU (8.12.11/8.12.11) with SMTP id j3LIY9kA026524 > for ; Thu, 21 Apr 2005 11:34:09 -0700 >Received: (qmail 32544 invoked by uid 1004); 21 Apr 2005 18:34:04 -0000 >Delivered-To: shott at snf.stanford.edu >Received: (qmail 32542 invoked from network); 21 Apr 2005 18:34:04 -0000 >Received: from web51706.mail.yahoo.com (206.190.38.224) > by snf.stanford.edu with SMTP; 21 Apr 2005 18:34:04 -0000 >Received: (qmail 22456 invoked by uid 60001); 21 Apr 2005 18:34:03 -0000 >Comment: DomainKeys? See http://antispam.yahoo.com/domainkeys >DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; > s=s1024; d=yahoo.com; > >b=3ZaxECSLifD/Zt7rAb8kwkvHWx4xJ/E+tGMsNHn3oYW+2gfuGTi6Eg4sw993uIDfUKt9TOtTpobgtBO7K4+CGuryBJaHkwfTL3Phz8Pa3eDYjIpMhGN2fm++LJunsfnNT2/lpiKAYxOVPpkRMfDQoA9OyodhyVjCNZWqZf35Wl8= >; >Message-ID: <20050421183403.22454.qmail at web51706.mail.yahoo.com> >Received: from [24.6.233.113] by web51706.mail.yahoo.com via HTTP; Thu, 21 >Apr 2005 11:34:02 PDT >Date: Thu, 21 Apr 2005 11:34:02 -0700 (PDT) >From: Mark Phillips >Subject: Re: forms >To: John Shott >In-Reply-To: 6667 >MIME-Version: 1.0 >Content-Type: text/plain; charset=us-ascii > >Hi John, > >here's the info requested on the SNF website for >bringing in new chemicals: > >1. Contact info: Mark Phillips, mlfphillips at yahoo.com, >SBA Materials, Inc., Goleta, CA, (805) 683-6102 (ofc.) >(510) 469-7742 (cell). > >2. The material is a spin-on dielectric layer that is >a mixture of: > >Si(OEt)4 "TEOS" CAS # 78-10-4 > >CH3Si(OEt)3 CAS# 2031-67-6 > >ethanol CAS# 64-17-5 > >poly(ethylene oxide)-block-poly(propylene oxide)- >block-poly(ethylene oxide), MW = 5800 CAS# 9003-11-6 > >dilute nitric acid (HNO3 CAS# 7697-37-2, H2O >CAS # 7732-18-5) > >ethyl lactate CAS# 97-64-3 > >propylene glycol monomethyl ether acetate "PGMEA" CAS ># 108-65-6 > >I'll be bringing this stuff into SNF pre-mixed and I >won't be storing it at SNF. However, the storage group >identifier is L, and the Main Hazard Class is 6 >(flammable). > >3. Manufacturer: SBA Materials, Inc., >www.sbamaterials.com > >4. Reason for request: I need to prepare samples of >this dielectric layer on Si wafers for physical >characterization. > >5. Process flow: SRD, plasma ash, silanize, spin, hot >plate bake. > >6. Amount and form: about 100 mL, liquid. > >7. Storage: I won't be storing the material at SNF. > >8. Disposal: I'm taking unused material with me. I'll >clean the spin coater with PGMEA. > >I can e-mail you the MSDSs of the components of the >spin-on material but I suspect you may have most or >all of them already. Please let me know which MSDSs >you need. > >Thanks again, > >Mark > >PS >I'm faxing the Agreement form and PO to you now. > > > >--- John Shott wrote: > > Mark: > > > > OK ... I've got what you FAXed me. I will still > > need a few other things: > > > > 1. We need a signed user agreement form: > > http://snf.stanford.edu/Access/AgreementForm.pdf > > > > 2. We need a FAXed or hard copy of the PO so that we > > can set up the > > account for you within the university billing > > system. > > > > 3. I need significantly more information about this > > proposed Low-K > > material including MSDS of the material itself, > > details of the process > > flow so that we can determine what tools you plan to > > use it with, purity > > levels so that we can determine whether there are > > any > > cross-contamination issues, etc. The full details > > of what we need are > > listed at: > > http://snf.stanford.edu/Materials/NewMatProc.html > > ... because > > we are responsible for everything in our facility, > > we need to know all > > of those things and I need to be able to provide > > clear and convincing > > evidence that this stuff is OK if we're going to > > bypass the normal > > biweekly meeting of the Special Materials Committee > > ... > > > > 4. For you most immediate need, am I correct that > > all you need is spin > > coating? Any bake? If so, what are the bake > > conditions that you need? > > How many wafers do you need? > > > > Talk to you later > > > > John > > > > > > Mark Phillips wrote: > > > > >Hi John, > > > > > >I have faxed the Project proposal and billing forms > > to > > >you. please call me at 510-469-7742 if you have any > > >questions. > > > > > >Thanks, > > > > > >Mark > > > > > > > > > > From edmyers at stanford.edu Mon Apr 25 11:55:17 2005 From: edmyers at stanford.edu (Ed Myers) Date: Mon, 25 Apr 2005 11:55:17 -0700 Subject: SpecMat Meeting-4/25/05 Logsheet Message-ID: <6.2.1.2.2.20050425115333.01fc71a8@edmyers.pobox.stanford.edu> Attached is the latest version, 4/25/05. Mahnaz and I will be traveling to EV Group and not available for the meeting. Regards, -------------- next part -------------- A non-text attachment was scrubbed... Name: SpecMat Logsheet.xls Type: application/octet-stream Size: 65536 bytes Desc: not available URL: From soberg at collinear.com Mon Apr 25 17:19:59 2005 From: soberg at collinear.com (Oberg, Stephanie) Date: Mon, 25 Apr 2005 20:19:59 -0400 Subject: Measure alumina and/or Si/Al substrates on the Dektak? Message-ID: <7DBB1E23E1E1FA46994AF9E005D97262DC14CD@ms08.mse3.exchange.ms> Hi there SpecMat committee - I am a new user of SNF and am interested in doing some substrate measurements: roughness, etc. Is it permitted to use alumina or Si/Al substrates for this? 1) ALUMINA: It is 99.6% pure tapecast alumina ceramic, highfired and polished to about 20 microinch (0.5 micron) on back and 1-2 microinch (50 nm) on front. See Kyocera pdf attached. 2) SI/AL ALLOY: Our other substrate to be used in the future is Osprey Si/Al alloy, known as CE-7. Please see Osprey attached PDF. Thanks for your help! Stephanie Oberg (408) 566-1468 soberg at collinear.com Collinear Corporation 1. Your contact information: Name, Coral login, phone number, email address and who you work for (your PI or company.) Stephanie Oberg, soberg, (408) 566-1468, soberg at collinear.com , Collinear Corporation 2. The chemical or material. Please provide all common names, trade names, and CAS numbers where appropriate. Include an MSDS, if available; or provide the reason, if not. Make sure to include information for any new secondary chemicals (such as a developer for a new resist). Read the MSDSs as well as the Stanford Chemical Storage Groups and the Stanford Chemical Safety Data Base sections on this website to determine the Storage Group Identifier and Main Hazard Class of your chemical/material. Alumina, alumina substrate, alumina thin film substrate, CAS 1344-28-1 (No MSDS because this is not a chemical, it is just a piece of non-toxic ceramic.). Si/Al alloy, no CAS number found . (No MSDS because this is not a chemical, it is just a piece of metal alloy.) 3. Vendor/manufacturer info: address and phone number, website URL. Alumina, Kyocera, http://global.kyocera.com/prdct/fc/product/material/elec/index.html#c Kyocera Industrial Ceramics Corp. 2033 O'Toole Ave San Jose, CA 95131 Tel: 408-324-0161 Fax: 408-435-8327 Si/Al, Osprey Sandvik, Osprey Metals Ltd., Millands Neath. SA11 1NJ, UK http://www.ospreymetals.co.uk/low_expansion/contact_osprey.htm 4. Reason for request: Please give serious thought to this. If you have any process information (application notes from the vendor, protocol from another lab, experimental methods section of an article), please include it, preferably as attachments. Ask yourself these questions: Is this the latest procedure? Are there newer/safer alternatives that will also work for my project? Will any of the current SNF approved chemicals and materials work for me? Technical requirements of our product including thermomechanical match, compatibility with high temperature (>450 deg C) processing, etc. 5. Process Flow: Please provide a detailed process flow description on how and where you proposed to use this chemical. This should include all Lab equipment to be used for processing your wafers once your new chemical or material has been used (even if your new material is a film that is removed, it may still pose potential contamination concerns.) Make sure to include wet benches. Please note that f the chemical/material is to be used in any the "clean" equipment, purity specifications will be needed. This is most important for chemicals/material that are not normally used for VLSI device fabrication. To be allowed into a "clean" tool , the material should MOS grade or better. Currently only interested in metrology. 6. Amount and form. How much will you bring in? Is it solid, powder or liquid? (Note: as a general rule, powders are not permitted in the cleanroom.) Do you need to mix it to use it? Solid substrate disks, 4" - 8" in diameter. 7. Storage: Will you be storing your chemical/material at SNF? If so, please note any potential reactivities (this should be on the MSDS). Storage groups A,B,D and L are stored in the yellow solvent cabinet in the furnace support area, while storage groups C, E, F and G are stored on top of one of the Pass-through Carts. Ensure your chemical container or material is properly labeled . If there is no available room, it must be stored by in the bulk storage area. You will then need to obtain it from receiving area personnel each time you want to use it and return it to them when you are finished using it (or each time you leave the lab). Note that there is no storage of chemicals/materials in the processing lab or at any wet bench. No storage - will be hand carried when needed. Both materials can be stored in general storage areas such as warehouses and office supply cabinets. 8. DIsposal: How will you dispose of any waste or excess chemical or material? In your discussions with experts and vendors, try to determine the best way to dispose of your spent chemicals and by-products. Please refer to the SNF Labmembers Safety Manual for the different methods of waste disposal that are available in the lab. Breakage is not foreseen, since both materials are tough, but if there is breakage, I will treat is the same as broken silicon and bag it for disposal in the Sharps box. -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: kyocera alumina A493 99.6%.pdf Type: application/octet-stream Size: 8048444 bytes Desc: kyocera alumina A493 99.6%.pdf URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: osprey si al alloy measurements from europe.pdf Type: application/octet-stream Size: 252197 bytes Desc: osprey si al alloy measurements from europe.pdf URL: From mtang at snf.stanford.edu Tue Apr 26 07:56:24 2005 From: mtang at snf.stanford.edu (Mary Tang) Date: Tue, 26 Apr 2005 07:56:24 -0700 Subject: Measure alumina and/or Si/Al substrates on the Dektak? In-Reply-To: <7DBB1E23E1E1FA46994AF9E005D97262DC14CD@ms08.mse3.exchange.ms> References: <7DBB1E23E1E1FA46994AF9E005D97262DC14CD@ms08.mse3.exchange.ms> Message-ID: <426E5698.8060205@snf.stanford.edu> Hello Stephanie -- Since these are pretty inert, they should be OK to measure on the gold dektak system (not the "clean" one). Please be aware that the dektak has some measurement limitations -- check with Uli or one of the other process staff members about your measurement precision needs. Mary Oberg, Stephanie wrote: > Hi there SpecMat committee ? > > I am a new user of SNF and am interested in doing some substrate > measurements: roughness, etc. Is it permitted to use alumina or Si/Al > substrates for this? > > 1) ALUMINA: It is 99.6% pure tapecast alumina ceramic, highfired and > polished to about 20 microinch (0.5 micron) on back and 1-2 microinch > (50 nm) on front. See Kyocera pdf attached. > > 2) SI/AL ALLOY: Our other substrate to be used in the future is Osprey > Si/Al alloy, known as CE-7. Please see Osprey attached PDF. > > Thanks for your help! > > Stephanie Oberg > > (408) 566-1468 > > soberg at collinear.com > > Collinear Corporation > > 1. * Your contact information: * Name, Coral login, phone number, > email address and who you work for (your PI or company.) > * Stephanie Oberg, soberg, (408) 566-1468, soberg at collinear.com > , Collinear Corporation * > > 2. * The chemical or material. * Please provide all common names, > trade names, and CAS numbers where appropriate. Include an MSDS, > if available; or provide the reason, if not. Make sure to > include information for any new secondary chemicals (such as a > developer for a new resist). Read the MSDSs as well as the > Stanford Chemical Storage Groups > and the > Stanford Chemical Safety Data Base > sections > on this website to determine the Storage Group Identifier > and Main > Hazard Class > of your > chemical/material. > *Alumina, alumina substrate, alumina thin film substrate, CAS > 1344-28-1 (No MSDS because this is not a chemical, it is just a > piece of non-toxic ceramic.). > Si/Al alloy, no CAS number found . (No MSDS because this is not > a chemical, it is just a piece of metal alloy.) > > * > 3. * Vendor/manufacturer info: * address and phone number, website > URL. > *Alumina, Kyocera, > http://global.kyocera.com/prdct/fc/product/material/elec/index.html#c > > Kyocera Industrial Ceramics Corp. > 2033 O'Toole Ave > San Jose , CA 95131 > Tel: 408-324-0161 > Fax: 408-435-8327 > > Si/Al, Osprey Sandvik, > Osprey Metals Ltd., > Millands > Neath. SA11 1NJ, UK > http://www.ospreymetals.co.uk/low_expansion/contact_osprey.htm* > > 4. * Reason for request: * Please give serious thought to this. If > you have any process information (application notes from the > vendor, protocol from another lab, experimental methods section > of an article), please include it, preferably as attachments. > Ask yourself these questions: Is this the latest procedure? Are > there newer/safer alternatives that will also work for my > project? Will any of the current SNF approved chemicals and > materials work for me? > *Technical requirements of our product including > thermomechanical match, compatibility with high temperature > (>450 deg C) processing, etc.* > > 5. * Process Flow: * Please provide a detailed process flow > description on how and where you proposed to use this chemical. > This should include *all* * Lab equipment > *to be used > for processing your wafers once your new chemical or material > has been used (even if your new material is a film that is > removed, it may still pose potential contamination concerns.) > Make sure to include wet benches. Please note that f the > chemical/material is to be used in any the "clean" > > equipment, purity specifications will be needed. This is most > important for chemicals/material that are not normally used for > VLSI device fabrication. To be allowed into a "clean" tool > , > the material should MOS grade or better. > * Currently only interested in metrology. * > > 6. * Amount and form. * How much will you bring in? Is it solid, > powder or > liquid? (Note: as a general rule, powders > are not > permitted in the cleanroom.) Do you need to mix it to use it? > *Solid substrate disks, 4? ? 8? in diameter.* > > 7. * Storage: * Will you be storing your chemical/material at SNF? > If so, please note any potential reactivities (this should be on > the MSDS). Storage groups > A,B,D and > L are stored in the yellow solvent cabinet in the furnace > support area, while storage groups > C, E, F > and G are stored on top of one of the Pass-through Carts. Ensure > your chemical container or material is properly labeled > . If there is > no available room, it must be stored by in the bulk storage > area. You will then need to obtain it from receiving area > personnel each time you want to use it and return it to them > when you are finished using it (or each time you leave the lab). > Note that there is no storage of chemicals/materials in the > processing lab or at any wet bench. > * No storage ? will be hand carried when needed. Both materials > can be stored in general storage areas such as warehouses and > office supply cabinets. * > > 8. * DIsposal * : How will you dispose of any waste or excess > chemical or material? In your discussions with experts and > vendors, try to determine the best way to dispose of your spent > chemicals and by-products. Please refer to the SNF Labmembers > Safety Manual > for the > different methods of waste disposal that are available in the lab. > *Breakage is not foreseen, since both materials are tough, but > if there is breakage, I will treat is the same as broken silicon > and bag it for disposal in the Sharps box.* > -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From rissman at stanford.edu Tue Apr 26 09:30:32 2005 From: rissman at stanford.edu (Paul Rissman) Date: Tue, 26 Apr 2005 09:30:32 -0700 Subject: Fwd: SpecMat Meeting-4/25/05 Logsheet Message-ID: <5.1.1.5.2.20050426092955.017f64d8@rissman.pobox.stanford.edu> Hi All, Ed and Mahnaz are out and Jim wants to work on the cmp. Should we skip this meeting? Can we respond to the issues on the list? Jim, a number of the action items were yours. Paul >X-Sieve: CMU Sieve 2.2 >Delivered-To: rissman at snf.stanford.edu >Mailing-List: contact specmat-help at snf.stanford.edu; run by ezmlm >X-No-Archive: yes >List-Post: >List-Help: >List-Unsubscribe: >List-Subscribe: >Delivered-To: mailing list specmat at snf.stanford.edu >X-Mailer: QUALCOMM Windows Eudora Version 6.2.1.2 >Date: Mon, 25 Apr 2005 11:55:17 -0700 >To: specmat at snf.stanford.edu >From: Ed Myers >Subject: SpecMat Meeting-4/25/05 Logsheet > >Attached is the latest version, 4/25/05. Mahnaz and I will be traveling >to EV Group and not available for the meeting. > >Regards, > > -------------- next part -------------- A non-text attachment was scrubbed... Name: SpecMat Logsheet10.xls Type: application/octet-stream Size: 65536 bytes Desc: not available URL: From mtang at snf.stanford.edu Tue Apr 26 10:15:20 2005 From: mtang at snf.stanford.edu (Mary Tang) Date: Tue, 26 Apr 2005 10:15:20 -0700 Subject: Fwd: SpecMat Meeting-4/25/05 Logsheet In-Reply-To: <5.1.1.5.2.20050426092955.017f64d8@rissman.pobox.stanford.edu> References: <5.1.1.5.2.20050426092955.017f64d8@rissman.pobox.stanford.edu> Message-ID: <426E7728.2060805@snf.stanford.edu> I'm all for it (two reviews left.) M Paul Rissman wrote: > Hi All, > > Ed and Mahnaz are out and Jim wants to work on the cmp. Should we > skip this meeting? Can we respond to the issues on the list? Jim, a > number of the action items were yours. > > Paul > >> X-Sieve: CMU Sieve 2.2 >> Delivered-To: rissman at snf.stanford.edu >> Mailing-List: contact specmat-help at snf.stanford.edu; run by ezmlm >> X-No-Archive: yes >> List-Post: >> List-Help: >> List-Unsubscribe: >> List-Subscribe: >> Delivered-To: mailing list specmat at snf.stanford.edu >> X-Mailer: QUALCOMM Windows Eudora Version 6.2.1.2 >> Date: Mon, 25 Apr 2005 11:55:17 -0700 >> To: specmat at snf.stanford.edu >> From: Ed Myers >> Subject: SpecMat Meeting-4/25/05 Logsheet >> >> Attached is the latest version, 4/25/05. Mahnaz and I will be >> traveling to EV Group and not available for the meeting. >> >> Regards, >> >> -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From mdeal at stanford.edu Tue Apr 26 10:56:09 2005 From: mdeal at stanford.edu (Michael Deal) Date: Tue, 26 Apr 2005 10:56:09 -0700 Subject: Fwd: SpecMat Meeting-4/25/05 Logsheet In-Reply-To: <5.1.1.5.2.20050426092955.017f64d8@rissman.pobox.stanford.e du> References: <5.1.1.5.2.20050426092955.017f64d8@rissman.pobox.stanford.edu> Message-ID: <6.1.1.1.2.20050426104226.01edd6c8@mdeal.pobox.stanford.edu> I'm afraid you'll upset Rhett if you don't respond to his latest request. I've attached his document giving his process, TXRF data, and reasoning, in case you didn't keep it. I already responded to his invalid argument that the Zn and Fe are not really too high, but said we would consider his other two points about covering it with ALD Alumina and then etching before the Pd,Si,O film is reached. I think this is okay, but I'd like Jim or someone to confirm. Also, Jim needs to decide on whether to use the P5000 or wet etch (see his point number 3). -mike p.s. this is so much easier and efficient to do at a meeting as opposed to email. At 09:30 AM 4/26/2005, Paul Rissman wrote: >Hi All, > >Ed and Mahnaz are out and Jim wants to work on the cmp. Should we skip >this meeting? Can we respond to the issues on the list? Jim, a number of >the action items were yours. > >Paul > >>X-Sieve: CMU Sieve 2.2 >>Delivered-To: rissman at snf.stanford.edu >>Mailing-List: contact specmat-help at snf.stanford.edu; run by ezmlm >>X-No-Archive: yes >>List-Post: >>List-Help: >>List-Unsubscribe: >>List-Subscribe: >>Delivered-To: mailing list specmat at snf.stanford.edu >>X-Mailer: QUALCOMM Windows Eudora Version 6.2.1.2 >>Date: Mon, 25 Apr 2005 11:55:17 -0700 >>To: specmat at snf.stanford.edu >>From: Ed Myers >>Subject: SpecMat Meeting-4/25/05 Logsheet >> >>Attached is the latest version, 4/25/05. Mahnaz and I will be traveling >>to EV Group and not available for the meeting. >> >>Regards, >> > > -------------- next part -------------- A non-text attachment was scrubbed... Name: SpecMatSub0419051.doc Type: application/msword Size: 67584 bytes Desc: not available URL: From rissman at stanford.edu Tue Apr 26 13:16:25 2005 From: rissman at stanford.edu (Paul Rissman) Date: Tue, 26 Apr 2005 13:16:25 -0700 Subject: Process proposal and TXRF data In-Reply-To: <7F740D512C7C1046AB53446D3720017303C32D2C@scsmsx402.amr.cor p.intel.com> Message-ID: <5.1.1.5.2.20050426131445.018daf68@rissman.pobox.stanford.edu> Hi Rhett, The committee is NOT meeting today due to several people being out. If it is urgent that you get a response, please check with Jim McVittie for an ok to proceed. Paul At 03:33 PM 4/19/2005 -0700, you wrote: >I agree with both of your comments (I don t know how the negative sign >snuck in there). Thank you for taking a look. I will await your and the >committee s decision. > > > >Regards, > > > >Rhett > > > > > >---------- >From: Michael Deal [mailto:mdeal at stanford.edu] >Sent: Tuesday, April 19, 2005 12:08 PM >To: Brewer, Rhett T; specmat at snf.stanford.edu >Cc: mcvittie at cis.stanford.edu >Subject: Re: Process proposal and TXRF data > > > >I just took a quck look at the document and want to make this comment. In >your reason #1 at the bottom, I think you got it backwards. The >contamination numbers are in doses (atoms/cm2), like in implant >doses. That number IS the total contamination number per square >area. The fact that it came from a very thin layer does not mean it has >less total contaminants - if anything the contamination concentration (in >atoms/cm3) can be even higher than in a 1 micron layer, depending on the >capture thickness. We can argue about what units our limits should be >in, but the fact that most contamination analysis is done in doses (and >assumes most contaminants are at or near the surface), and not >concentrations, leads us to use that as the most efficient >method. Your other reasons may argue for letting you use these films, >but the first reason is not acceptable as is. > -mike >p.s. the contamination levels should be 1e12 cm-2, not 1e-12 cm-2, etc. > >At 11:43 AM 4/19/2005, Brewer, Rhett T wrote: > >Specmat, > >I have attached the TXRF data from the Pd, Si, O film we had discussed >previously that I would like to process at Stanford. I have also included >the process flow which was reviewed and accepted by specmat (provided the >material meets contamination specs) for your reference. > >Finally, there is data for an Al2O3 layer that we would like to use to cap >the Pd, Si,O. This would be deposited by an outside vendor. > >Please review this document and don t hesitate to ask questions. A >decision during the next committee meeting (04/26) would meet my >scheduling needs. > >Thank you. > >Regards, > >Rhett > > >Rhett Brewer >Intel Corporation >work: 408-765-8254 >cell: 408-655-3448 >rhett.t.brewer at intel.com > From bipin at stanford.edu Thu Apr 28 09:50:48 2005 From: bipin at stanford.edu (Bipin Rajendran) Date: Thu, 28 Apr 2005 09:50:48 -0700 Subject: 410 Processing on Laser Annealed wafers. Message-ID: <027501c54c12$6e2a10a0$f66040ab@supernova> Dear SpecMat Members, I am attaching a detailed run-sheet for continuing the fabrication of transistors after Laser Annealing (at a facility outside SNF that deals with many different metal films). This request was earlier approved broadly, and the attached sheet has the history of all past emails. I would be much obliged if this request is approved at the earliest convinience. Thanks Bipin -------------- next part -------------- An HTML attachment was scrubbed... URL: From bipin at stanford.edu Thu Apr 28 10:17:09 2005 From: bipin at stanford.edu (Bipin Rajendran) Date: Thu, 28 Apr 2005 10:17:09 -0700 Subject: 410 Processing on Laser Annealed wafers. References: <027501c54c12$6e2a10a0$f66040ab@supernova> <427118A6.4050709@snf.stanford.edu> Message-ID: <02a001c54c16$1c80ed10$f66040ab@supernova> Ooops, Sorry, I missed the attachment. Thanks Bipin ----- Original Message ----- From: "Mary Tang" To: "Bipin Rajendran" Sent: Thursday, April 28, 2005 10:08 AM Subject: Re: 410 Processing on Laser Annealed wafers. > Hi Bipin -- > > No attachment? > > M > > Bipin Rajendran wrote: > >> Dear SpecMat Members, >> I am attaching a detailed run-sheet for continuing the fabrication of >> transistors after Laser Annealing (at a facility outside SNF that >> deals with many different metal films). This request was earlier >> approved broadly, and the attached sheet has the history of all past >> emails. I would be much obliged if this request is approved at the >> earliest convinience. >> Thanks >> Bipin > > > > -- > Mary X. Tang, Ph.D. > Stanford Nanofabrication Facility > CIS Room 136, Mail Code 4070 > Stanford, CA 94305 > (650)723-9980 > mtang at stanford.edu > http://snf.stanford.edu > > -------------- next part -------------- A non-text attachment was scrubbed... Name: process_after_laseranneal.pdf Type: application/pdf Size: 32888 bytes Desc: not available URL: From edmyers at stanford.edu Thu Apr 28 16:24:43 2005 From: edmyers at stanford.edu (Ed Myers) Date: Thu, 28 Apr 2005 16:24:43 -0700 Subject: 410 Processing on Laser Annealed wafers. In-Reply-To: <02a001c54c16$1c80ed10$f66040ab@supernova> References: <027501c54c12$6e2a10a0$f66040ab@supernova> <427118A6.4050709@snf.stanford.edu> <02a001c54c16$1c80ed10$f66040ab@supernova> Message-ID: <6.2.1.2.2.20050428161849.05bed320@edmyers.pobox.stanford.edu> Bipin, Mary and I talked over your request. Your process is OK as long as you decontaminate the silicide pots. Regards, At 10:17 AM 4/28/2005, Bipin Rajendran wrote: >Ooops, Sorry, I missed the attachment. >Thanks >Bipin > >----- Original Message ----- From: "Mary Tang" >To: "Bipin Rajendran" >Sent: Thursday, April 28, 2005 10:08 AM >Subject: Re: 410 Processing on Laser Annealed wafers. > > >>Hi Bipin -- >>No attachment? >>M >>Bipin Rajendran wrote: >> >>>Dear SpecMat Members, >>>I am attaching a detailed run-sheet for continuing the fabrication of >>>transistors after Laser Annealing (at a facility outside SNF that deals >>>with many different metal films). This request was earlier approved >>>broadly, and the attached sheet has the history of all past emails. I >>>would be much obliged if this request is approved at the earliest convinience. >>>Thanks >>>Bipin >> >>-- Mary X. Tang, Ph.D. >>Stanford Nanofabrication Facility >>CIS Room 136, Mail Code 4070 >>Stanford, CA 94305 >>(650)723-9980 >>mtang at stanford.edu >>http://snf.stanford.edu > From soberg at collinear.com Fri Apr 29 14:37:07 2005 From: soberg at collinear.com (Oberg, Stephanie) Date: Fri, 29 Apr 2005 17:37:07 -0400 Subject: Requesting permission to use alumina as substrate in tylanbpsg Message-ID: <7DBB1E23E1E1FA46994AF9E005D97262E597F3@ms08.mse3.exchange.ms> Hi Mary - Thanks very much for your prompt response. We will use only the "gold" Dektak. In addition to metrology, we find that we have a need for doing LPCVD of PSG or BPSG on alumina ONLY (not on Si/Al). Would there be any concerns about using alumina as a substrate in tylanbpsg? Thanks! Stephanie Oberg (408) 566-1468 -----Original Message----- From: Mary Tang [mailto:mtang at snf.stanford.edu] Sent: Tuesday, April 26, 2005 7:56 AM To: Oberg, Stephanie Cc: SpecMat at snf.stanford.edu; Shi, Daniel; Lan Zhang Subject: Re: Measure alumina and/or Si/Al substrates on the Dektak? Hello Stephanie -- Since these are pretty inert, they should be OK to measure on the gold dektak system (not the "clean" one). Please be aware that the dektak has some measurement limitations -- check with Uli or one of the other process staff members about your measurement precision needs. Mary Oberg, Stephanie wrote: > Hi there SpecMat committee - > > I am a new user of SNF and am interested in doing some substrate > measurements: roughness, etc. Is it permitted to use alumina or Si/Al > substrates for this? > > 1) ALUMINA: It is 99.6% pure tapecast alumina ceramic, highfired and > polished to about 20 microinch (0.5 micron) on back and 1-2 microinch > (50 nm) on front. See Kyocera pdf attached. > > 2) SI/AL ALLOY: Our other substrate to be used in the future is Osprey > Si/Al alloy, known as CE-7. Please see Osprey attached PDF. > > Thanks for your help! > > Stephanie Oberg > > (408) 566-1468 > > soberg at collinear.com > > Collinear Corporation > > 1. * Your contact information: * Name, Coral login, phone number, > email address and who you work for (your PI or company.) > * Stephanie Oberg, soberg, (408) 566-1468, soberg at collinear.com > , Collinear Corporation * > > 2. * The chemical or material. * Please provide all common names, > trade names, and CAS numbers where appropriate. Include an MSDS, > if available; or provide the reason, if not. Make sure to > include information for any new secondary chemicals (such as a > developer for a new resist). Read the MSDSs as well as the > Stanford Chemical Storage Groups > and the > Stanford Chemical Safety Data Base > sections > on this website to determine the Storage Group Identifier > and Main > Hazard Class > of your > chemical/material. > *Alumina, alumina substrate, alumina thin film substrate, CAS > 1344-28-1 (No MSDS because this is not a chemical, it is just a > piece of non-toxic ceramic.). > Si/Al alloy, no CAS number found . (No MSDS because this is not > a chemical, it is just a piece of metal alloy.) > > * > 3. * Vendor/manufacturer info: * address and phone number, website > URL. > *Alumina, Kyocera, > http://global.kyocera.com/prdct/fc/product/material/elec/index.html#c > > Kyocera Industrial Ceramics Corp. > 2033 O'Toole Ave > San Jose , CA 95131 > Tel: 408-324-0161 > Fax: 408-435-8327 > > Si/Al, Osprey Sandvik, > Osprey Metals Ltd., > Millands > Neath. SA11 1NJ, UK > http://www.ospreymetals.co.uk/low_expansion/contact_osprey.htm* > > 4. * Reason for request: * Please give serious thought to this. If > you have any process information (application notes from the > vendor, protocol from another lab, experimental methods section > of an article), please include it, preferably as attachments. > Ask yourself these questions: Is this the latest procedure? Are > there newer/safer alternatives that will also work for my > project? Will any of the current SNF approved chemicals and > materials work for me? > *Technical requirements of our product including > thermomechanical match, compatibility with high temperature > (>450 deg C) processing, etc.* > > 5. * Process Flow: * Please provide a detailed process flow > description on how and where you proposed to use this chemical. > This should include *all* * Lab equipment > *to be used > for processing your wafers once your new chemical or material > has been used (even if your new material is a film that is > removed, it may still pose potential contamination concerns.) > Make sure to include wet benches. Please note that f the > chemical/material is to be used in any the "clean" > > equipment, purity specifications will be needed. This is most > important for chemicals/material that are not normally used for > VLSI device fabrication. To be allowed into a "clean" tool > , > the material should MOS grade or better. > * Currently only interested in metrology. * > > 6. * Amount and form. * How much will you bring in? Is it solid, > powder or > liquid? (Note: as a general rule, powders > are not > permitted in the cleanroom.) Do you need to mix it to use it? > *Solid substrate disks, 4" - 8" in diameter.* > > 7. * Storage: * Will you be storing your chemical/material at SNF? > If so, please note any potential reactivities (this should be on > the MSDS). Storage groups > A,B,D and > L are stored in the yellow solvent cabinet in the furnace > support area, while storage groups > C, E, F > and G are stored on top of one of the Pass-through Carts. Ensure > your chemical container or material is properly labeled > . If there is > no available room, it must be stored by in the bulk storage > area. You will then need to obtain it from receiving area > personnel each time you want to use it and return it to them > when you are finished using it (or each time you leave the lab). > Note that there is no storage of chemicals/materials in the > processing lab or at any wet bench. > * No storage - will be hand carried when needed. Both materials > can be stored in general storage areas such as warehouses and > office supply cabinets. * > > 8. * DIsposal * : How will you dispose of any waste or excess > chemical or material? In your discussions with experts and > vendors, try to determine the best way to dispose of your spent > chemicals and by-products. Please refer to the SNF Labmembers > Safety Manual > for the > different methods of waste disposal that are available in the lab. > *Breakage is not foreseen, since both materials are tough, but > if there is breakage, I will treat is the same as broken silicon > and bag it for disposal in the Sharps box.* > -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu