From mtang at snf.stanford.edu  Fri Jul  1 08:23:56 2005
From: mtang at snf.stanford.edu (Mary Tang)
Date: Fri, 01 Jul 2005 08:23:56 -0700
Subject: [Fwd: New materials request - MgO, Barium Zirconate]
Message-ID: <42C5600C.3030506@snf.stanford.edu>

Hi everyone --

Yoav stopped by and asked if we could possibly approve this today, as 
he'd like to start working this weekend....   It all looks safe -- he 
wants to deposit Cr on magnesium oxide and barium zirconate in metalica, 
and as these are pretty inert up to high temperatures, it seems OK to 
me.  Does anyone have any objections?

M

-- 
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang at stanford.edu
http://snf.stanford.edu

-------------- next part --------------
An embedded message was scrubbed...
From: Yoav Banin <yoavb at stanford.edu>
Subject: New materials request - MgO, Barium Zirconate
Date: Fri, 24 Jun 2005 11:29:44 -0700
Size: 2010956
URL: <http://snf.stanford.edu/pipermail/specmat/attachments/20050701/0a477f78/attachment.mht>

From edmyers at stanford.edu  Tue Jul  5 07:50:05 2005
From: edmyers at stanford.edu (Ed Myers)
Date: Tue, 05 Jul 2005 07:50:05 -0700
Subject: 1:30 Meeting, 1/5/05
Message-ID: <6.2.1.2.2.20050705074744.01e96408@edmyers.pobox.stanford.edu>

All,

Remember the standard meeting time has been moved back to 1:30 to 2:00.

Regards,
-------------- next part --------------
A non-text attachment was scrubbed...
Name: SpecMat Logsheet.xls
Type: application/octet-stream
Size: 82944 bytes
Desc: not available
URL: <http://snf.stanford.edu/pipermail/specmat/attachments/20050705/5be0a6dc/attachment.obj>

From barlian at stanford.edu  Tue Jul  5 10:43:00 2005
From: barlian at stanford.edu (Arnoldus Alvin Barlian)
Date: Tue,  5 Jul 2005 10:43:00 -0700
Subject: new material request
Message-ID: <1120585380.42cac6a49460e@webmail.stanford.edu>



Hello Special Material Committee,
I'd like to bring a new material to the fab. Attached is the process
flow/diagram. I've talked to Ed Myers a little bit about it and I already
gave him the MSDS for this new material.

It is some type of epoxy. The hazardous ingredients consist of Methyl Ethyl
Ketone and Silver Flake. I don't have the e-copy of the MSDS but Ed has the
hard copy already.

Thanks a lot,

Cheers,
Alvin
-------------- next part --------------
A non-text attachment was scrubbed...
Name: Epoxy Approval for SNF.doc
Type: application/msword
Size: 25600 bytes
Desc: not available
URL: <http://snf.stanford.edu/pipermail/specmat/attachments/20050705/2ec93dec/attachment.doc>

From moreinfo at eBay.com  Wed Jul  6 16:51:26 2005
From: moreinfo at eBay.com (eBay SafeHarbor Department)
Date: Wed, 06 Jul 2005 16:51:26 -0700
Subject: eBay Account Suspension Notice
Message-ID: <E1DqJfp-0007NG-To@svr10.edns1.com>

An HTML attachment was scrubbed...
URL: <http://snf.stanford.edu/pipermail/specmat/attachments/20050706/905a6d1d/attachment.html>

From security at ebay.com  Thu Jul  7 18:12:42 2005
From: security at ebay.com (security at ebay.com)
Date: Fri, 8 Jul 2005 10:12:42 +0900
Subject: Unauthorized transactions on your account
Message-ID: <200507080112.j681CgBo003343@localhost.localdomain>

An HTML attachment was scrubbed...
URL: <http://snf.stanford.edu/pipermail/specmat/attachments/20050708/d946fce7/attachment.html>

From security at ebay.com  Mon Jul 11 11:18:50 2005
From: security at ebay.com (security at ebay.com)
Date: Tue, 12 Jul 2005 03:18:50 +0900
Subject: Unauthorized transactions on your account
Message-ID: <200507111818.j6BIIo8b017566@localhost.localdomain>

An HTML attachment was scrubbed...
URL: <http://snf.stanford.edu/pipermail/specmat/attachments/20050712/b3a77ce8/attachment.html>

From security at ebay.com  Wed Jul 13 12:57:18 2005
From: security at ebay.com (security at ebay.com)
Date: Thu, 14 Jul 2005 04:57:18 +0900
Subject: Unauthorized transactions on your account
Message-ID: <200507131957.j6DJvISJ010162@localhost.localdomain>

An HTML attachment was scrubbed...
URL: <http://snf.stanford.edu/pipermail/specmat/attachments/20050714/3d639e59/attachment.html>

From mperez at proteusbiomed.com  Thu Jul 14 15:56:22 2005
From: mperez at proteusbiomed.com (Mario Perez)
Date: Thu, 14 Jul 2005 15:56:22 -0700
Subject: Pt-Ir Targets for Metalica
Message-ID: <199533328BB37B43AAEBE0A6A4B7CC3714D7D3@GANDALF.proteus.local>

I would like to use a few different Pt-Ir targets in "Metalica".

 

Pt-Ir 90:10 (wt%)

Pt-Ir 80:20

Pt-Ir 70:30

 

Each target is 1" in diameter and 1/8" thick.

 

I plan to do 1,000-2,000A depositions at a time and will store the
targets in my own personal storage bin.

 

Thank you,

 

Mario Perez (mperez)

MEMS Engineer

Proteus Biomedical, Inc.

Direct:  650-568-0580 x116

 

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://snf.stanford.edu/pipermail/specmat/attachments/20050714/defa2a84/attachment.html>

From mahnaz at snf.stanford.edu  Thu Jul 14 16:36:54 2005
From: mahnaz at snf.stanford.edu (Mahnaz Mansourpour)
Date: Thu, 14 Jul 2005 16:36:54 -0700
Subject: [Fwd: AP 400]
Message-ID: <42D6F716.5060701@snf.stanford.edu>

Hello all,

For sake of documentation...
i already have ok this chemical more than a year a go, she is asking for 
a different version of it.
I am ok with this.

mahnaz

-------- Original Message --------
Subject: 	AP 400
Date: 	Mon, 11 Jul 2005 15:09:48 -0700
From: 	Astrid Tomada <atomada at stanford.edu>
To: 	Mahnaz Mansourpour <mahnaz at snf.stanford.edu>



Hi Mahnaz,
CDMS group need to test and use the AP 400 due to the serious problems 
encounter during Tungsten wet etching. The photoresist presents 
substantial lifting leaving the wafer almost clean during the etching. 
Implementing  AP400 seems to be our best options since a series of 
tests to improve the photoresist performance have been completed 
without success.

http://www.siliconresources.com/AP400.html

Thank you.
Astrid

_____-----_____-----_____
Astrid Tomada
Stanford University
(650) 723 1880
atomada at stanford.edu
_____-----_____-----_____

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://snf.stanford.edu/pipermail/specmat/attachments/20050714/99196723/attachment.html>

From kristina_lamers at agilent.com  Thu Jul 14 22:55:05 2005
From: kristina_lamers at agilent.com (kristina_lamers at agilent.com)
Date: Thu, 14 Jul 2005 23:55:05 -0600
Subject: Etching with SU-8 on the wafers
Message-ID: <6AEF46C7230B864683AF6606F41F080202E5D22E@wcosmb03.cos.agilent.com>

Hello,

I'm in the ME342 class, and am working on a microfluidic device that has SU-8 on it.
I wanted to check into the possibility of running wafers with SU-8 on
them in the STS and WBMetal. My team was
originally trying to make structures out of SU-8. We have not had much
success as we can't get the SU-8 layers to bond together well and the
thick SU-8 comes out very uneven due to lack of level of the
hotplates. I tried creating our main structure out of Si in the STS,
which worked well, but we haven't been able to get a layer of SU-8 to
bond to Si and we need that layer to seal our microfluidic devices.
Therefore I would like to try putting SU-8 on the backside of a wafer
as the etchstop and then using SPR 220 to pattern the wafer for
through etch. I could also put another Si wafer on the back as a
carrier. 

We have a similar issue for wet etching. We are creating Al heaters on top of cured SU-8, 
and would like to etch them in WBMetal. 

SU-8 is an epoxy based resist that it hard to remove once it is cured. We are planning to use cured SU-8 in these steps, so there shouldn't be any problems with SU-8 dissolving in the wet etch or even in the plasma etch. The only plasma etch reported to take off cured SU-8 is CF4, which is not part of the STS process, and even then it etches slowly. More information on SU-8 can be found at http://www.microchem.com/products/su_eight.htm

Can you tell me whether you would allow us to try these steps, or
what other information you might need to make a decision? If it's helpful to prioritize, we can still do the wet etch in WBGeneral, but we don't have another place to do the deep Si etch. We are on a very short timeline for the class, and would therefore greatly appreciate this issue being addressed quickly.

Thanks for your consideration,
Tina


From edmyers at stanford.edu  Tue Jul 19 08:56:23 2005
From: edmyers at stanford.edu (Ed Myers)
Date: Tue, 19 Jul 2005 08:56:23 -0700
Subject: E-mail meeting this week, No 1:30 meeting
Message-ID: <6.2.1.2.2.20050719083824.01fedbb0@edmyers.pobox.stanford.edu>

SpecMat members,

We only have two items on this weeks agenda.  I think we should be able to 
handle them by email.

1) I had a couple of requests to make the Spec-mat team based on some runs 
I had done over the last few months for Ge wafers processing. All these 
wafers have been categorized as semiclean and have been allowed into the 
LTO, RTA and the tystar and tylan3 tubes.
- Gasonics- I would like to use a dry etch to remove resist after implants 
etc. Can I be allowed to use the Gasonics for that?
  - Tube 8 SiGe- We had degraded characteristics in our devices in our 
previous run because I used n+ doped poly-Si from tystar which required a 
high temperature anneal. Use of a poly-SiGe gate followed by an implant 
should activate at much lower temperatures.
- Amtetcher ? I need some highly anisotropic LTO etch on these Ge wafers. 
Can I be allowed to use the amtecther with PR as the mask?

COMMENTS: According to established guidelines the Ge wafers should be 
allowed in the Gasonics, Amtetcher and I don't see a problem with using 
Tube 8 SiGe.


2) I wanted to check into the possibility of running wafers with SU-8 on 
them in the STS. Therefore I would like to try putting SU-8 on the backside 
of a wafer as the etchstop and then using SPR 220 to pattern the wafer for 
through etch. I could also put another Si wafer on the back as a carrier.

COMMENTS: Should be alright from a materials contamination point of view, 
but I'm not sure about the etch selectivity of SU
-8.

Let me know your comments by email

Ed
-------------- next part --------------
A non-text attachment was scrubbed...
Name: SpecMat Logsheet.xls
Type: application/octet-stream
Size: 86016 bytes
Desc: not available
URL: <http://snf.stanford.edu/pipermail/specmat/attachments/20050719/093cf74e/attachment.obj>

From cm_richter at att.net  Tue Jul 19 12:53:29 2005
From: cm_richter at att.net (cm_richter at att.net)
Date: Tue, 19 Jul 2005 19:53:29 +0000
Subject: Protecting frontside features during backside etch for the P5000 etcher
Message-ID: <071920051953.24780.42DD5A37000D67B6000060CC21587667209D0A9B080C079DA1030C@att.net>

Dear SpecMat Committee:

I spoke to Jim regarding this after my inquiry. I asked if I could use resist to protect the frontsides of my wafer. From what I understood in our discussion, I was told that thinner resist is better since there is a less chance of reticulation on the surface which could result in shedding. I asked if I could try both 1um and 3 microns. I was told that in order to do this process I would need to have maintenence around to watch me do this. The test wafers were hardbaked overnight at 110C (~12 hours) instead of carbonizing it since I was told that I may have difficulty removing the resist.

Elmer and I placed some test wafers into the blue loading cassette so the vacuum wand can take these wafers into and out of the loadlock and back into the loading cassette. He found that the the major sources of scratches were coming from the vacuum wand as it is placing the wafer back to the blue loading cassettes. Elmer made some adjustments to the wand to mechanically release the wafers better, however, the results were not consistent. Some wafers were scratched more than others when these wafers were placed one at a time in the same slot in the blue cassette. Some wafers showed no scratches at all.

The scratches are located at the center of the wafer (about 0.5-1" diameter). Some new test wafers were then loaded manually into loadlock elevator and allow the vacuum wand take the wafers into the etching chamber. When the etch run was done and the wafers loaded back into the loadlock elevator by the vacuum wand, we saw very little to no scractching of the wafers..for either 1um or 3um resist. Some of these wafers that went through the test were my "good" wafers. After ashing the wafers, I saw very little to no scratching on the wafers. This working process continued a few more times with help from maintenence.

It looks like this process works, however when I relayed this information to Jim today, there was a concern about a buildup of particle contamination in the chamber(s) by scratched resist by the vacuum wand. Also, there was a concern how this can affect other processes. I was asked to discontinue the frontside resist protection until further notice. 

I have a hard deadline coming up at the end of this month and would like to proceed with some more wafers that need to go into the P5000 for backside etching. If possible, I'd like to continue my processing as soon as possible and an approved process in writing agreed by all members of the Specmat committee.

Best regards,

Claudia



 -------------- Original message ----------------------
From: Ed Myers <edmyers at stanford.edu>
> Claudia,
> 
> SpecMat has reviewed your request.  The request has been approved with the 
> following limitations.  We recommend the use of only 1um photoresist 
> thickness and the bake be at least 90 minutes.  There is concern it you 
> will be able to remove the coating after the bake.
> 
> Regards,
> 
> 
> 
> At 06:50 PM 6/28/2005, you wrote:
> >Dear Specmat,
> >
> >I am working on a second round of wafers where I need to dryetch features 
> >on the frontside and backsides of wafers on the P5000. The wafers are DSP 
> >silicon with 3 microns of thermal oxide and about a half micron of 
> >amorphous silicon on both sides. On the frontside, I have submicron 
> >features etched into the oxide that will eventually be sealed with another 
> >wafer by fusion bonding. I am ready to start etching the backsides, 
> >however I would really want to minimize scratching on the frontsides. My 
> >previous batch of wafers I processed cannot be used since there are both 
> >fine and major scratches on most of the wafers.
> >
> >Is there a way to protect these frontside features so I can etch the 
> >backsides? What would the consequences be if there was thick resist 
> >(3-4um) applied over these features that was carbonized by baking it at 
> >about 200C for about 90min in the smaller Blue-M oven in the litho room? 
> >The resist should be fully crosslinked and not likely to be removed with 
> >acetone....I can test this first to make sure the resist isn't soluable. 
> >Any other ideas? I'd appreciate any help on this.
> >
> >Best regards,
> >
> >Claudia
> 
> 









From edmyers at stanford.edu  Tue Jul 26 08:11:36 2005
From: edmyers at stanford.edu (Ed Myers)
Date: Tue, 26 Jul 2005 08:11:36 -0700
Subject: Fwd: Pt-Ir Targets for Metalica
Message-ID: <6.2.1.2.2.20050726080330.01f97db0@edmyers.pobox.stanford.edu>

All,

Yesterday Mario pointed out, I missed including this request during our 
last specmat meeting.  Mario has the targets and is waiting for specmat's 
decisions.

 From the sputtering point of view, there should not be any problems.  My 
only concern, as Mary pointed out is the toxicity of the conducting oxides 
(Ru, Ir, Os and Rh) in the O4 state.  From what I remember Os and Ir are 
the most toxic.  The more stable form are the O2 states, meaning you have 
to force the materials in to the O4 state.  From a practical point I ran a 
Ru/RuO2 process for 4 years and Elmer and I are still here to talk about it.

One limitation could be requiring lift-off instead of sputter etching in 
the MRC.

Ed

>X-Sieve: CMU Sieve 2.2
>Delivered-To: emyers at snf.stanford.edu
>Mailing-List: contact specmat-help at snf.stanford.edu; run by ezmlm
>X-No-Archive: yes
>List-Post: <mailto:specmat at snf.stanford.edu>
>List-Help: <mailto:specmat-help at snf.stanford.edu>
>List-Unsubscribe: <mailto:specmat-unsubscribe at snf.stanford.edu>
>List-Subscribe: <mailto:specmat-subscribe at snf.stanford.edu>
>Delivered-To: mailing list specmat at snf.stanford.edu
>Subject: Pt-Ir Targets for Metalica
>Date: Thu, 14 Jul 2005 15:56:22 -0700
>X-MS-Has-Attach:
>X-MS-TNEF-Correlator:
>Thread-Topic: Pt-Ir Targets for Metalica
>Thread-Index: AcWIx0D23fmEvd7pT3aWKvTntYGdDw==
>From: "Mario Perez" <mperez at proteusbiomed.com>
>To: <specmat at snf.stanford.edu>
>
>I would like to use a few different Pt-Ir targets in "Metalica".
>
>Pt-Ir 90:10 (wt%)
>Pt-Ir 80:20
>Pt-Ir 70:30
>
>Each target is 1" in diameter and 1/8" thick.
>
>I plan to do 1,000-2,000A depositions at a time and will store the targets 
>in my own personal storage bin.
>
>Thank you,
>
>Mario Perez (mperez)
>MEMS Engineer
>Proteus Biomedical, Inc.
>Direct:  650-568-0580 x116
>





From edmyers at stanford.edu  Wed Jul 27 16:25:39 2005
From: edmyers at stanford.edu (Ed Myers)
Date: Wed, 27 Jul 2005 16:25:39 -0700
Subject: Fwd: Targets for Metalica
Message-ID: <6.2.1.2.2.20050727162341.01f90da0@edmyers.pobox.stanford.edu>

All,

I have not heard any comments regarding Mario's request.  If I don't hear 
any objections, I will inform Mario he can go forward with his depositions 
on Friday.

Ed


>X-Sieve: CMU Sieve 2.2
>Subject: Targets for Metalica
>Date: Wed, 27 Jul 2005 15:05:53 -0700
>X-MS-Has-Attach:
>X-MS-TNEF-Correlator:
>Thread-Topic: Targets for Metalica
>Thread-Index: AcWNS+fs2vKKe+aPQse2A4RdgAEiowFq3Mmp
>From: "Mario Perez" <mperez at proteusbiomed.com>
>To: "Ed Myers" <edmyers at stanford.edu>
>
>Hi Ed,
>
>I was wondering how things were going for the approval of the 3 Pt-Ir 
>targets for Metalica.  I have a reservation for the tool Friday morning 
>and was hoping to do my first deposition then.  Things are starting to get 
>more urgent on my end.
>
>Thanks,
>
>Mario Perez (mperez)
>MEMS Engineer
>Proteus Biomedical Inc.
>Direct:  (650) 568-0580 x116
>
>
>
>