Low Temperature Process for SOI CMOS
edmyers at stanford.edu
Mon Oct 31 11:21:15 PST 2005
Bipin is at my office asking questions about Cornell's CMP compatibility
with our Clean equipment group. He is ready to send the wafers out and
wants to make sure he can continue processing once they return. Also, he
will be getting wafers thinned at Aptek Industries. Do we have any history
with this company with regards to contamination?
I head out on vacation on Wednesday and he is anxious to get a
response. Please voice your opinions.
At 11:09 AM 10/31/2005, Bipin Rajendran wrote:
>Dear SpecMat Members,
>I am attaching a detailed process flow of the Low Temperature CMOS
>fabrication steps. I will be happy to answer any further questions.
More information about the specmat