PDMS face down in stsetch?
Alissa M. Fitzgerald
amf at amfitzgerald.com
Fri Apr 28 15:31:22 PDT 2006
the PDMS is about 500 um, oxide is currently about 1000A on our test wafers,
but we can make this thicker if needed in the future.
We don't care about etch uniformity, sidewall, etc. We just want to blast
holes in the silicon and stop on the oxide. The PDMS shouldn't get touched
Oooh - XeF2 sounds very, very interesting. Could we use it to blanket etch
off the silicon?? Basically we are trying to get rid of the silicon
entirely. I'm sure we could get Ed a test wafer or two if he's interested.
But in the meantime, could we try the STS?
> -----Original Message-----
> From: Mary Tang [mailto:mtang at stanford.edu]
> Sent: Friday, April 28, 2006 2:12 PM
> To: alissa.fitzgerald at alum.mit.edu
> Cc: specmat at snf.stanford.edu; latta at snf.stanford.edu; Kathy
> Jackson; edmyers at snf.stanford.edu
> Subject: Re: PDMS face down in stsetch?
> Hi Alissa --
> Can you tell us how thick your PDMS and oxide are? And how
> thick is your Si? (I'm presuming you are doing a
> through-wafer etch?) And I'm curious... how critical is
> your etch in terms of etch bias and profile? I ask, because
> the XeF2 etcher has just arrived and Ed is hoping to have a
> functional process perhaps as early as next week. If you can
> tolerate a somewhat isotropic Si etch, but with exquisite
> selectivity, this might be a good way to avoid resist burning
> and questions about contamination level (PDMS has a lot of
> metal ions, primarily Pt.) Please ask Ed about this.
> By the way, my two cents' (but I'm no STS expert) is that you
> should use the holder, if only because PDMS like to stick
> (like Colorforms, remember them?) to smooth surfaces.
> Alissa M. Fitzgerald wrote:
> > Hi Specmat,
> > We have some wafers with a layer of PDMS over patterned Al, over
> > thermal oxide. We would like to backside etch these wafers using
> > STSetch and stop on the thermal oxide.
> > Is it ok to put PDMS face down in the stsetch? Would we
> need to use
> > the holder?
> > How hot does the chuck get? Are we likely to see resist burning
> > because the PDMS is a thermal insulator?
> > Please let us know as soon as you can, we might want to try some
> > experiments this weekend.
> > Thanks,
> > Alissa
> Mary X. Tang, Ph.D.
> Stanford Nanofabrication Facility
> CIS Room 136, Mail Code 4070
> Stanford, CA 94305
> mtang at stanford.edu
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