From cm_richter at att.net Fri Aug 1 10:32:34 2008 From: cm_richter at att.net (Claudia Richter) Date: Fri, 01 Aug 2008 17:32:34 +0000 Subject: UV3 Resist Message-ID: <080120081732.16413.489348B2000225240000401D22243429029B0A02D29B9B0EBF9D0A9B080C079DA1030C@att.net> Dear SpecMat committee, I'm submitting a MSDS for UV3 resist. I think it may be a resist that might have been used in the past at SNF. It is a positive chemically amplified resist. I plan on trying out a flood exposure test on wafers/pieces that have patterned UV3 resist (softbaked). Its the hope that this test can help eliminate the use of organic solvents to strip resist. The plan is to UV (flood) expose the unexposed resist and then doing a post-flood exposure bake in an oven (small Blue M oven ok to use?) and then attempting to remove the resist with your standard developers (LDD26W). Is this ok for me to do? Best regards, Claudia -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: UVIII -0.7 Positive DUV Photoresist a.DOC Type: application/msword Size: 153600 bytes Desc: not available URL: From mtang at stanford.edu Mon Aug 4 11:51:03 2008 From: mtang at stanford.edu (Mary Tang) Date: Mon, 04 Aug 2008 11:51:03 -0700 Subject: UV3 Resist In-Reply-To: <080120081732.16413.489348B2000225240000401D22243429029B0A02D29B9B0EBF9D0A9B080C079DA1030C@att.net> References: <080120081732.16413.489348B2000225240000401D22243429029B0A02D29B9B0EBF9D0A9B080C079DA1030C@att.net> Message-ID: <48974F97.6010602@stanford.edu> Hi Claudia -- Just for the sake of completeness... Could we get a process flow from you, describing your substrate (if not silicon), which tools you plan to use (headway2 or laurell for coat, which exposure tool for flood expose, the temperature of your bake, and where/how you plan to develop), and how you will dispose of any waste? Thanks, Mary Claudia Richter wrote: > Dear SpecMat committee, > > I'm submitting a MSDS for UV3 resist. I think it may be a resist that > might have been used in the past at SNF. It is a positive chemically > amplified resist. I plan on trying out a flood exposure test on > wafers/pieces that have patterned UV3 resist (softbaked). Its the hope > that this test can help eliminate the use of organic solvents to strip > resist. > > The plan is to UV (flood) expose the unexposed resist and then doing a > post-flood exposure bake in an oven (small Blue M oven ok to use?) and > then attempting to remove the resist with your standard developers > (LDD26W). > > Is this ok for me to do? > > Best regards, > Claudia > -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From mtang at stanford.edu Mon Aug 4 13:26:39 2008 From: mtang at stanford.edu (Mary Tang) Date: Mon, 04 Aug 2008 13:26:39 -0700 Subject: UV3 Resist In-Reply-To: <080420081901.18111.48975209000128BC000046BF22230704929B0A02D29B9B0EBF9D0A9B080C079DA1030C@att.net> References: <080120081732.16413.489348B2000225240000401D22243429029B0A02D29B9B0EBF9D0A9B080C079DA1030C@att.net> <48974F97.6010602@stanford.edu> <080420081901.18111.48975209000128BC000046BF22230704929B0A02D29B9B0EBF9D0A9B080C079DA1030C@att.net> Message-ID: <489765FF.1080604@stanford.edu> Ooooh! OK, no problem at all, then, your process is fine. Good luck. Mary Claudia Richter wrote: > Hi Mary, > > The substrate is silicon (actually pieces). They already have baked > patterned resist on it. The idea is to use the UV oven (next to the EV > aligner) for about 15 min to flood expose the unexposed regions. Then > do a post flood exposure bake ( small Blue M oven) for about 30 min at > 120-130C. Then finally the LDD26W developer for about 5-10 min at the > Headway station to make sure the resist is removed. As with the > positive resists used at SNF the resist could either be poured into > the Headway sink or collected (which ever is best). > > This is a short test and no liquid chemicals (resists) are planned to > be brought in. > > Thanks! > Claudia > > > > -------------- Original message from Mary Tang > : -------------- > > > > Hi Claudia -- > > > > Just for the sake of completeness... Could we get a process flow > from > > you, describing your substrate (if not silicon), which tools you > plan to > > use (headway2 or laurell for coat, which exposure tool for flood > expose, > > the temperature of your bake, and where/how you plan to > develop), and > > how you will dispose of any waste? > > > > Thanks, > > > > Mary > > > > Claudia Richter wrote: > > > Dear SpecMat committee, > > > > > > I'm submitting a MSDS for UV3 resist. I think it may be a > resist that > > > might have been used in the past at SNF. It is a positive > chemically > > > amplified resist. I plan on trying out a flood exposure test on > > > wafers/pieces that have patterned UV3 resist (softbaked). Its > the hope > > > that this test can help eliminate the use of organic solvents > to strip > > > resist. > > > > > > The plan is to UV (flood) expose the unexposed resist and then > doing a > > > post-flood exposure bake in an oven (small Blue M oven ok to > use?) and > > > then attempting to remove the resist with your standard > developers > > > (LDD26W). > > > > > > Is this ok for me to do? > > > > > > Best regards, > > > Claudia > > > > > > > > > -- > > Mary X. Tang, Ph.D. > > Stanford Nanofabrication Facility > > CIS Room 136, Mail Code 4070 > > Stanford, CA 94305 > > (650)723-9980 > > mtang at stanford.edu > > http://snf.stanford.edu > > > -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From patricia.carlson at global-fab.com Thu Aug 7 01:46:56 2008 From: patricia.carlson at global-fab.com (Patricia Carlsom) Date: Thu, 7 Aug 2008 04:46:56 -0400 (EDT) Subject: Used Semiconductor Equipment available Message-ID: <1102199218889.1101401002153.9044.6.12044546@scheduler> G-Fab LOGO [http://rs6.net/tn.jsp?e=0017fr5I-fpjQpYLP14tJoy8JrNsVs5nXuFrsjM-3IGXxPziDsTSCaufpK6WM8tcxg-gRETNUqx0FgK5LhZ0gO5vfo2aLditlEhE1rut2PvPvsGH3ZyefhJBw==] ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Global Fab Surplus [http://rs6.net/tn.jsp?e=0017fr5I-fpjQpYLP14tJoy8JrNsVs5nXuFrsjM-3IGXxPziDsTSCaufpK6WM8tcxg-gRETNUqx0FgK5LhZ0gO5vfo2aLditlEhE1rut2PvPvsGH3ZyefhJBw==] We have available the tools listed below and many more on our website. These tools can be inspected and shipped immediately, most are located in our warehouse in Colorado Springs, Colorado USA. All offers will be considered. 1. IPEC 372m CMP (2 available) 2. LAM A4 Alliance etcher (4520XL (oxide etch) chamber, TCP9400SE (polyetch), RF Gen Rack, Pump Stack, Gas Cabinets, Electrical Cabinet and accessories (computers,etc.) 3. LAM Rainbow 4428 (In like new condition) 4. Biorad/Accent Q7/Q8 Overlay system 5. SVG 90s i-Line Tracks (2 available) 6. IPEC 676 CMP (Very clean) 7. Teradyne T666 Static tester (Make any offer) 8. WJ999 Teos 9. Rudolph Metapulse 200 10. Thermawave 2600B Contact us if you are interested in any of these tools. Also available is a 97 acre facility with over 250,000 sq feet of clean room and office space. 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Visit us online at: www.global-fab.com [http://rs6.net/tn.jsp?e=0017fr5I-fpjQpYLP14tJoy8JrNsVs5nXuFrsjM-3IGXxPziDsTSCaufpK6WM8tcxg-gRETNUqx0FgK5LhZ0gO5vfo2aLditlEhE1rut2PvPvsGH3ZyefhJBw==] for a complete list of tools available. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Forward email http://ui.constantcontact.com/sa/fwtf.jsp?m=1101401002153&ea=specmat at snf.stanford.edu&a=1102199218889 This email was sent to specmat at snf.stanford.edu by patricia.carlson at global-fab.com. Update Profile/Email Address http://visitor.constantcontact.com/d.jsp?v=001RO3dPrXHwIHjNc18qg2uYpS-p4D8dFWvKXM9PX1g4QdhAxfLw8IAKSEKFY1RHeFxxxibFmQHdgw%3D&p=oo Instant removal with SafeUnsubscribe(TM) http://visitor.constantcontact.com/d.jsp?v=001RO3dPrXHwIHjNc18qg2uYpS-p4D8dFWvKXM9PX1g4QdhAxfLw8IAKSEKFY1RHeFxxxibFmQHdgw%3D&p=un Privacy Policy: http://ui.constantcontact.com/roving/CCPrivacyPolicy.jsp Global Fab Surplus | 195 Kirkstone Lane | Colorado Springs | CO | 80906 -------------- next part -------------- An HTML attachment was scrubbed... URL: From cfchiang at stanford.edu Thu Aug 7 14:38:07 2008 From: cfchiang at stanford.edu (Chia-Fang Chiang) Date: Thu, 7 Aug 2008 14:38:07 -0700 (PDT) Subject: Metallic contamination identification on AlN deposited at Berkeley Microlab In-Reply-To: <2146477371.439151218144947524.JavaMail.root@zm06.stanford.edu> Message-ID: <1378010706.439221218145087108.JavaMail.root@zm06.stanford.edu> Hi Mary and SpecMat, I am working on piezoelectric device. Aluminum nitride (AlN) is the piezoelectric film I am using, which is deposited at Berkeley Microlab. A few months ago, I have discussed with Mary on the process of AlN at SNF. (Please refer to the email below.) Mary suggested to identify metallic contamination beforehand if clean/semi-clean equipments are involved in my fabrication. After several email itinerancy, EAG conducted LEXES test on my sample and the results are attached along with this email. It has been shown that AlN film is free from platinum contamination. Given this fact, I would like to apply for using clean/semi-clean equipments at SNF. Please let me know if you see any problems. Thank you very much. Cathy >> a short quotation of the LEXES ANALYSIS REPORT - Analytical Request: One wafer was originally submitted for XRF analysis. The wafers were described as a layered structure: AlN 2 microns/Si 50 microns/SiO2 4 microns/Si substrate. The purpose of the analysis was to identify metallic contamination in the AlN layer. Due to interference issues, XRF analysis was not an appropriate analytical method. The AlN layer was analyzed for Pt using the LEXES technique. Survey spectra were also acquired to determine possible metal contamination. LEXES Results: LEXES analysis for platinum of the AlN layer indicates that no platinum was measured above the detection limit. The estimated detection limit for Pt is approximately 25 ppma. Survey spectra were also acquired from the AlN layer. These spectra indicate the presence of boron, carbon, nitrogen, oxygen, aluminum and argon in the AlN layer. These peaks have been identified in the spectra. No other elements were detected above the instrumental background. ----- "Mary Tang" wrote: | Hi Cathy -- | | (some contents have been deleted) | | I've contacted Sia Parsa, who's my counterpart at Berkeley. He did | not have a lot of specific information about processing of AlN and so | suggested contacting the researchers who use this film at Berkeley. | So, I think there are a couple of processing issues that you should check | with your Berkeley counterparts: | | 1. The AlN etches somewhat in basic solutions, such as developer. | However, Sia did not know if wet etch patterning of AlN could be done. | | If AlN can be appropriately patterned with wet etching, then this | would be the easiest method. However, you'd have to bias your mask if you | want to define 10 micron lines in 3 micron films. | | 2. Alternatively, AlN could be plasma etched in the p5000etch metal | chamber, if it can be demonstrated that the AlN is CMOS clean. The | machine at Berkeley is considered by Sia to be CMOS clean, but they do | not have data and processing is allowed on Pt-film coated wafers | (which is not really CMOS clean.) So, Sia could not say if the materials | from this system could be considered clean for SNF. If your counterparts | have any data on trace metal contamination on AlN films deposited in | the Berkeley Microlab AMS, it would be greatly appreciated. If not, then | we would require that a study be made. This could be done either at the | SNL (Rich Chin or Ann Marshal would be the contacts there) or at Evans | Analytical Group, a commercial provider of analytical services. | Typically, TXRF is used for contamination studies on surfaces, but a | bulk film technique might be more appropriate in this case. Usually, | these techniques will detect a spectrum of metal contaminants -- the | contaminants of interest would likely be Pt (since it is introduced to | the system) and any likely contaminants from the chamber or deposition | tool itself. Please check out the Evans Analytical website, which has | a lot of good information about different analytical methods. | | (some contents have been deleted) | | Mary -------------- next part -------------- A non-text attachment was scrubbed... Name: C08U8193-LEXES-Spectra.pdf Type: application/pdf Size: 52469 bytes Desc: not available URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: ReportC08U8193LE.doc Type: application/msword Size: 881152 bytes Desc: not available URL: From yiyangg at stanford.edu Thu Aug 7 23:20:52 2008 From: yiyangg at stanford.edu (Yiyang Gong) Date: Thu, 07 Aug 2008 23:20:52 -0700 Subject: Erbium etching in Lampoly and P5000 Message-ID: <489BE5C4.3040905@stanford.edu> To whom it may concern, I would like to etch a Silicon nitride film doped with Erbium (far less than 1% by atomic concentration) in the silicon chamber (chamber C) of P5000 and Lampoly, or any etchers that has 1:1 selectivty of SiN to ebeam resists. The required information from the SNF website is as follows: 1. Name: Yiyang Gong Phone: 650-723-2279 Coral: yiyang email: yiyangg at stanford.edu PI: Jelena Vuckovic 2. Raw erbium MSDS is attached (erbium.htm, from http://www.espimetals.com/msds%27s/erbium.htm). The structure of the wafer is 100nm of SiN doped with erbium on top of 200nm of Si, on top of thick silicon dioxide, all on a silicon substrate. Another structure is a lattice of SiN doped with Er in Si. Because erbium is a dopant in Silicon nitride, it's stability should be much more than that of raw erbium. 3. Material is grown at Boston University: Appl. Phys. Lett. *92*, 181105 (2008) 4. I would like to apply all of the e-beam lithography and know fabrication parameters for silicon nitride and Si to this new material in order to make photonic crystals or other photonic devices. The concentration of erbium in the nitride is very low (less than 1% atomic) and etching should proceed as usual. This procedure have been used in other plasma etchers, for example in " Hak-Seung Han, S-Y Seo, Jung H. Shin, and Kim DS J. Appl. Phys. 88 2160 (2000)" (attached as JAP882160.pdf). In fact, in that paper, they choose to etch SiO2 with a standard CF4 etch. Similarly, I believe that a stanford SiN recipe (using HBr) could be used to etch the Er doped SiN without difficulty. I also believe that Erbium will not sputter and coat wafers. We can consider the diffusion coefficient of Aluminum as a guide for Erbium. Extrapolating the data from J. Appl. Phys., Vol. 91, No. 9, 1 May 2002, 5645 (attached as JAP915645.pdf), the diffusion of Aluminum in Silicon is 1*10^-19 cm^2/s at 600 degrees celsius. The same number for Erbium at the same temperature is quoted as less than 1*10^-17 cm^2/s by J. Appl. Phys., 75, 2609 (attached as JAP752609.pdf). Moreover, surface etch temperature of Silicon is generally under 200C, so diffusion should not be a problem for this process. I would also like to open up the Si chamber of P5000 to metals. I don't know what the fabrication restrictions are for this machine, but it seems to be the only dedicated Silicon etcher in SNF used for processing ebeam written materials. It would be very helpful to be able to use that machine for fabricated small devices such as photonic crystals. 5. Process flow is from Raith to lithography to etcher to possibly wetbench GaAs (dedicated labware will be used). 6. I will bring in wafers or pieces of wafers. 7. The wafer is stable, so storage should not be a problem. 8. The wafer is non-hazardous, so minimal disposal requirements are needed. If I could receive some feedback to this request (i.e. missing materials), and about the timeline for processing this request, it would be very helpful. Thank you, Yiyang Gong -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: JAP882160.pdf Type: application/pdf Size: 159459 bytes Desc: not available URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: JAP752609.pdf Type: application/pdf Size: 1338914 bytes Desc: not available URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: JAP915645.pdf Type: application/pdf Size: 88778 bytes Desc: not available URL: From mahnaz at stanford.edu Fri Aug 8 12:34:14 2008 From: mahnaz at stanford.edu (Mahnaz Mansourpour) Date: Fri, 08 Aug 2008 12:34:14 -0700 Subject: [POSSIBLE VIRUS:###] [Fwd: Yello Label for Transene SCE-200 NaOH based SI etchant (Aditya, jimkruger)] Message-ID: <489C9FB6.6000809@stanford.edu> -------------- next part -------------- An embedded message was scrubbed... From: jim kruger Subject: Yello Label for Transene SCE-200 NaOH based SI etchant (Aditya, jimkruger) Date: Fri, 8 Aug 2008 09:15:17 -0700 (PDT) Size: 99807 URL: From mtang at stanford.edu Fri Aug 8 17:45:49 2008 From: mtang at stanford.edu (Mary Tang) Date: Fri, 08 Aug 2008 17:45:49 -0700 Subject: Request Use of Transcene SCE-200 NaOH based Si etchant In-Reply-To: <45496.56912.qm@web38905.mail.mud.yahoo.com> References: <45496.56912.qm@web38905.mail.mud.yahoo.com> Message-ID: <489CE8BD.50000@stanford.edu> Hi Jim -- Your chemical is approved, with certain restrictions on usage, because it is both a corrosive and a flammable. 1. This chemical is somewhat incompatible with storage policies for standard chemicals. Please label this chemical appropriately and store in the chemicals passthrough in the lab. The bottle should be stored in one of the single bottle, secondary containment slots in the personal chemicals storage area on the top level of the passthrough. If the bottle does not take up the entire storage chamber, place the bottle in a secondary containment unit to ensure that no other small bottles may be stored next to your bottle. Once your experiments are complete, the chemical must be disposed of. 2. The chemical may be used at wbgaas or wbgeneral. In either case, make sure that you reserve the entire bench. Also, make sure to place yellow Hazard tape (available in the safety cart) across the front of the bench. Place a note on the bench to warn others against using the bench. Understand that oxidizers are not compatible with your chemical, so we want to ensure against others sharing. 3. Used etchant and first rinse should be collected as local waste, labeled, and placed in the passthrough as hazardous waste. Again, make sure that it is not possible to put another bottle in the same secondary containment chamber. Mahnaz, Ed, Mary jim kruger wrote: > Process flow: > on new Si wafer > > STS Nitride dep > > photomask > > wet ech 6:1 BOE > > solvent strip resist (optional-reist will strip in Si etch) > > Transcene SCE-200 Si etch (NaOH based) at specified temp. at WBgeneral or Wbgaas. > > Inspect surface roughness > > Strip Nitride in 6:1 BOE > > Step measurement at AlphaStep, NanoSpec > > End > > > > > Transene Si etchant, SCE-200, NaOH based > > We will test it at WBgeneral or Wbgaas, comparing to plain KOH and to TMAH. > > Probably only a few tests. > > The bottle is one liter. > MSDS attached. > > jim > > > > -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From patricia.carlson at global-fab.com Thu Aug 14 03:22:20 2008 From: patricia.carlson at global-fab.com (Patricia Carlsom) Date: Thu, 14 Aug 2008 06:22:20 -0400 (EDT) Subject: Need $500K Applied Materials Endura TiN, TiN, Ti, Al Message-ID: <1102205659622.1101401002153.9044.6.906204C@scheduler> G-Fab LOGO [http://rs6.net/tn.jsp?e=001G8CTjzmq2cC-EMxTpNlbqv_MN9LaP4qMpoLpnJk9Y44s0IJTRGLBZojg-_r9oRvwsaMPAD_EagmU3LW9r9-dwS5yGtJsRov7X8kNA34UfTeYwrMQC1mWgQ==] ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Global Fab Semiconductor [http://rs6.net/tn.jsp?e=001G8CTjzmq2cC-EMxTpNlbqv_MN9LaP4qMpoLpnJk9Y44s0IJTRGLBZojg-_r9oRvwsaMPAD_EagmU3LW9r9-dwS5yGtJsRov7X8kNA34UfTeYwrMQC1mWgQ==] We have an immediate need for an Applied Materials Endura 5500 with TiN, TiN, Ti, Al. The tool will be purchased within one week of successful source inspection. The budget is $500K. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Global Fab Surplus Semiconductor Equipment LLC [http://rs6.net/tn.jsp?e=001G8CTjzmq2cC-EMxTpNlbqv_MN9LaP4qMpoLpnJk9Y44s0IJTRGLBZojg-_r9oRvwsaMPAD_EagmU3LW9r9-dwS5yGtJsRov7X8kNA34UfTeYwrMQC1mWgQ==], provides surplus, used, rebuilt and refurbished semiconductor process equipment to integrated device manufacturers, wafer foundries, research and development sites and to the semiconductor refurbishing and rebuilding community. We buy and sell used semiconductor equipment, including backend, front end and special application tools and toolsets. Visit us online at: www.global-fab.com [http://rs6.net/tn.jsp?e=001G8CTjzmq2cC-EMxTpNlbqv_MN9LaP4qMpoLpnJk9Y44s0IJTRGLBZojg-_r9oRvwsaMPAD_EagmU3LW9r9-dwS5yGtJsRov7X8kNA34UfTeYwrMQC1mWgQ==] for a complete list of tools available. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Forward email http://ui.constantcontact.com/sa/fwtf.jsp?m=1101401002153&ea=specmat at snf.stanford.edu&a=1102205659622 This email was sent to specmat at snf.stanford.edu by patricia.carlson at global-fab.com. Update Profile/Email Address http://visitor.constantcontact.com/d.jsp?v=001RO3dPrXHwIHjNc18qg2uYpS-p4D8dFWvxu5uDMgn2luUZFyrjICauAs9_g67rPGI1kwYJF5Fz8A%3D&p=oo Instant removal with SafeUnsubscribe(TM) http://visitor.constantcontact.com/d.jsp?v=001RO3dPrXHwIHjNc18qg2uYpS-p4D8dFWvxu5uDMgn2luUZFyrjICauAs9_g67rPGI1kwYJF5Fz8A%3D&p=un Privacy Policy: http://ui.constantcontact.com/roving/CCPrivacyPolicy.jsp Global Fab Surplus | 195 Kirkstone Lane | Colorado Springs | CO | 80906 -------------- next part -------------- An HTML attachment was scrubbed... URL: From patricia.carlson at global-fab.com Thu Aug 14 21:42:20 2008 From: patricia.carlson at global-fab.com (Patricia Carlsom) Date: Fri, 15 Aug 2008 00:42:20 -0400 (EDT) Subject: 200 and 300mm Semiconductor Processing Equipment Available Message-ID: <1102206617944.1101401002153.9044.6.22004046@scheduler> G-Fab LOGO [http://rs6.net/tn.jsp?e=0016uB65h4r97jQ0TZ-2tP_aRCRasv14XfyP0UTS49haiyf4UtVT-kk-dNW5I6vAvqpOtP_F7MdgXDjxNbJPqWNKOXlBAwEakGeX56sUPBpHUJLJpVjItfvUg==] ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Global Fab Surplus We have 200mm, 300mm and Various tools listed below available. These tools are available immediately. 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They have not yet been added to our website. Please contact for configuration and other information. Also available is a 97 acre facility with over 250,000 sq feet of clean room and office space. This would be a great site for new expansion or a new site in the Solar manufacturing industry. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Best Regards, Patricia Patrica Carlson G-Fab LLC Colorado Springs, CO 80906 719-686-0128 (phone) 775-262-0409 (fax) patricia.carlson at global-fab.com www.global-fab.com ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Forward email http://ui.constantcontact.com/sa/fwtf.jsp?m=1101401002153&ea=specmat at snf.stanford.edu&a=1102206617944 This email was sent to specmat at snf.stanford.edu by patricia.carlson at global-fab.com. Update Profile/Email Address http://visitor.constantcontact.com/d.jsp?v=001RO3dPrXHwIHjNc18qg2uYpS-p4D8dFWvxu5uDMgn2lu_5MP-xpmsz57h4SLIHWxQhL9ukxXlbVk%3D&p=oo Instant removal with SafeUnsubscribe(TM) http://visitor.constantcontact.com/d.jsp?v=001RO3dPrXHwIHjNc18qg2uYpS-p4D8dFWvxu5uDMgn2lu_5MP-xpmsz57h4SLIHWxQhL9ukxXlbVk%3D&p=un Privacy Policy: http://ui.constantcontact.com/roving/CCPrivacyPolicy.jsp Global Fab Surplus | 195 Kirkstone Lane | Colorado Springs | CO | 80906 -------------- next part -------------- An HTML attachment was scrubbed... URL: From xinranw at stanford.edu Fri Aug 15 10:18:54 2008 From: xinranw at stanford.edu (Xinran Wang) Date: Fri, 15 Aug 2008 10:18:54 -0700 Subject: question about cpd Message-ID: <22ffcd060808151018l43d5b054v5ffabd480bc96761@mail.gmail.com> Hi, I have a question about the cpd in snf. We want to make an aerogel out of graphene sheets using supercritical drying. Is our material compatible with the equipment? Thanks, Xinran -------------- next part -------------- An HTML attachment was scrubbed... URL: From maurice at stanford.edu Fri Aug 15 16:23:29 2008 From: maurice at stanford.edu (maurice stevens) Date: Fri, 15 Aug 2008 16:23:29 -0700 Subject: About epi process/Silicon carbide In-Reply-To: <001701c8ff28$087a8100$196f8300$@edu> References: <001701c8ff28$087a8100$196f8300$@edu> Message-ID: <48A60FF1.30904@stanford.edu> Hi Benjamin, I am forwarding your question to Specmat ( specmat at snf.stanford.edu) http://snf.stanford.edu/Materials/SpecMat.html SpecMat sets the policy for the use of new, or existing materials. -m Benjamin Cheng wrote: > > Dear Maurice, > > My name is Benjamin Cheng, a graduate student working in BSAC at > UC-Berkeley. > > I have some questions regarding the deposition of epi-Si (ASM Epsilon > II Single-Wafer Epitaxial Reactor) at Stanford Nanofabrication Facility. > > I would like to know whether a 4? Silicon wafer with a thin layer of > poly silicon carbide (SiC) deposited using LPCVD is allowed in the epi > tool at Stanford for a thick layer of epi-Si (~10-20 micron). Silicon > carbide is well known to be very inert chemically and can withstand > very harsh environment. I would greatly appreciate it if you could > provide me any information regarding the material compatibility of the > epi tool at Stanford. > > Thanks and look forward to hearing from you. > > Regards, > > Benjamin Cheng > > _____________________________________ > > University of California, Berkeley > > Department of Mechanical Engineering > > Berkeley Mechanical Analysis & Design > > Office: 5109 Etcheverry Hall > > Phone: (510) 643 - 1099 > -- maurice at stanford.edu Maurice Stevens Stanford Nanofabrication Facility CIS Room 142, Mail Code 4070 Stanford, CA 94305 P. (650)725-3660 F. (650)725.6278 From mahnaz at stanford.edu Fri Aug 15 18:10:42 2008 From: mahnaz at stanford.edu (Mahnaz Mansourpour) Date: Fri, 15 Aug 2008 18:10:42 -0700 Subject: P5000 Message-ID: <48A62912.3050403@stanford.edu> Hello Johan , This is only for your process ( cleaning quartz wafers with APTS at silicide bench) and not to be advertised. This is the confirmation that your process has been ok after cleaning your wafers in silicide bench to go to P5000. Any other nonstandard process should go through specmat. mahnaz From kcrabb at stanford.edu Wed Aug 20 13:05:30 2008 From: kcrabb at stanford.edu (Kevin Crabb) Date: Wed, 20 Aug 2008 13:05:30 -0700 Subject: Nickel Substrates for Photolithography Message-ID: <000e01c90300$19539080$aa2042ab@delllaptop> Hello SpecMat members, I have several 125 micron thick nickel substrates which have been cut to 100mm (4" wafer) size. These are pure nickel (99.99+%) from Sigma-Aldrich, and I'm hoping to do photolithography on them to serve as an etch mask for later processing with iron(III) chloride. I was wondering if it's possible to do the photolithography on these nickel wafers with the svgcoater, evaligner, and svgdev instruments. If not, could I cut this nickel into smaller pieces, tape it with kapton tape to a 4" silicon wafer, and then process this silicon/nickel on the above instruments? Finally, if neither of the two above is acceptable, can I use the headway instrument to coat a 4" nickel wafer, and the EValigner to expose the resist? Thanks in advance, Kevin kcrabb at stanford.edu -------------- next part -------------- An HTML attachment was scrubbed... URL: From mahnaz at stanford.edu Wed Aug 20 14:42:46 2008 From: mahnaz at stanford.edu (Mahnaz Mansourpour) Date: Wed, 20 Aug 2008 14:42:46 -0700 Subject: Nickel Substrates for Photolithography References: <000e01c90300$19539080$aa2042ab@delllaptop> Message-ID: <48AC8FD6.2030200@stanford.edu> Hi Kevin, What is the flatness of your sample? mahnaz Kevin Crabb wrote: > Hello SpecMat members, > > I have several 125 micron thick nickel substrates which have been cut > to 100mm (4" wafer) size. These are pure nickel (99.99+%) from > Sigma-Aldrich, and I'm hoping to do photolithography on them to serve > as an etch mask for later processing with iron(III) chloride. > > > > I was wondering if it's possible to do the photolithography on these > nickel wafers with the svgcoater, evaligner, and svgdev instruments. > > > > If not, could I cut this nickel into smaller pieces, tape it with > kapton tape to a 4" silicon wafer, and then process this > silicon/nickel on the above instruments? > > > > Finally, if neither of the two above is acceptable, can I use the > headway instrument to coat a 4" nickel wafer, and the EValigner to > expose the resist? > > > > Thanks in advance, > > Kevin > > kcrabb at stanford.edu > -------------- next part -------------- An HTML attachment was scrubbed... URL: From kcrabb at stanford.edu Wed Aug 20 15:27:56 2008 From: kcrabb at stanford.edu (Kevin Crabb) Date: Wed, 20 Aug 2008 15:27:56 -0700 Subject: Nickel Substrates for Photolithography In-Reply-To: <48AC8FD6.2030200@stanford.edu> Message-ID: <001601c90313$ff25f770$aa2042ab@delllaptop> Hi Mahnaz, The flatness of the 125 micron nickel is within a few (1 to 2 or maybe 3) percent over the 4" diameter. (They were pressed flat during cutting to 100mm diameter circles) The surface roughness isn't great.local variation on the order of 10s of nanometers, but if necessary, I plan to mechanically polish the surface with diamond grit sandpaper to smooth it out. The lithography features that I'm hoping to get vary from 10-100 microns diameter circles (mostly), so I'm not too worried about the lithography process itself. I'm more just wanting to make sure that I won't contaminate other people's samples/wafers with nickel. Kevin _____ From: Mahnaz Mansourpour [mailto:mahnaz at stanford.edu] Sent: Wednesday, August 20, 2008 2:43 PM To: Kevin Crabb Cc: specmat at snf.stanford.edu Subject: Re: Nickel Substrates for Photolithography Hi Kevin, What is the flatness of your sample? mahnaz Kevin Crabb wrote: Hello SpecMat members, I have several 125 micron thick nickel substrates which have been cut to 100mm (4" wafer) size. These are pure nickel (99.99+%) from Sigma-Aldrich, and I'm hoping to do photolithography on them to serve as an etch mask for later processing with iron(III) chloride. I was wondering if it's possible to do the photolithography on these nickel wafers with the svgcoater, evaligner, and svgdev instruments. If not, could I cut this nickel into smaller pieces, tape it with kapton tape to a 4" silicon wafer, and then process this silicon/nickel on the above instruments? Finally, if neither of the two above is acceptable, can I use the headway instrument to coat a 4" nickel wafer, and the EValigner to expose the resist? Thanks in advance, Kevin kcrabb at stanford.edu -------------- next part -------------- An HTML attachment was scrubbed... URL: From mwiemer at sj-solar.com Fri Aug 22 16:45:18 2008 From: mwiemer at sj-solar.com (Mike Wiemer) Date: Fri, 22 Aug 2008 16:45:18 -0700 Subject: New material request Message-ID: Hi Specmat Team, 1.) Mike Wiemer, login: mwiemer 2.) Material: a. 353ND Part A (~2oz smaller glass bottle) b. 353ND Part B (~14oz small plastic bottle) 3.) Material storage a. The material will be brought into the lab for the purpose of trying these experiments on the day(s) of use. b. It will be stored off the Stanford campus at another location. 4.) Vendor: Epoxy Technologies (http://www.epotek.com/) 14 Fortune Drive Billerica, MA 01821 Tel: 978.667.3805 Fax: 978.663.9782 5.) MSDS & datasheet a. See attached b. Hazard Class: Corrosive c. Liquid / Basic / Organic 6.) Process Flow - all work will be done at the headway and the adjacent Aluminum covered hotplate a. Mix part A and part B in a disposable personal beaker under the headway fume hood, using Aluminum sheets to ensure no spillage on the bench surface. b. Cover and warm mixed material on the adjacent hotplate to <40C so it becomes less viscous c. Apply material onto the wafer (on the headway chuck) with a disposable syringe d. Spin at various spin speeds e. Cure the Epoxy/Wafer on the hotplate between 150C and 175C f. Clean up please advise - Place all uncured/used material in a plastic bag and place where???? g. Remove the bottles of Epoxy Parts A/B from the lab h. The cured wafer will not be subsequently processed in SNF with the exception of (perhaps) analysis with some metrology tools like: i. Zygo ii. Dektak iii. Microscopes Thank you, -Mike -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: 353ND_msds.pdf Type: application/octet-stream Size: 47955 bytes Desc: 353ND_msds.pdf URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: 353ND datasheet.pdf Type: application/octet-stream Size: 107606 bytes Desc: 353ND datasheet.pdf URL: From Salowitz at Stanford.edu Mon Aug 25 15:24:01 2008 From: Salowitz at Stanford.edu (Nathan Salowitz) Date: Mon, 25 Aug 2008 15:24:01 -0700 Subject: PZT solution spec-mat MSDS and other materials Message-ID: <48B33101.10606@Stanford.edu> Hello, Here are the electronic copies of the paperwork for the chemical I discussed with Mary and Ed at the Process Clinic on 8/25/2008, and they gave a tentative approval. It is a PZT Sol-Gel solution I would like to use in the SNF. I plan to use the Headway Spinner with associated hotplates to apply the material to my wafers and RTAGaAs to perform higher temperature bakes (by which time the material will be a PZT film). I can store my chemical off site. Please let me know if you need any further information, would suggest different equipment, or have other concerns. Nathan Salowitz (Coral ID: NXS4059) -------------- next part -------------- A non-text attachment was scrubbed... Name: Document.pdf Type: application/pdf Size: 17696 bytes Desc: not available URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: MSDS PZT-E Series?ver 2 (2).pdf Type: application/pdf Size: 38082 bytes Desc: not available URL: From mtang at stanford.edu Tue Aug 26 07:40:42 2008 From: mtang at stanford.edu (Mary Tang) Date: Tue, 26 Aug 2008 07:40:42 -0700 Subject: [Fwd: About epi poly process at stanford] Message-ID: <48B415EA.9080805@stanford.edu> Hi all -- What does everyone think about this request? Would a TXRF analysis of a wafer from this furnace be satisfactory? And is there an upper limit on thickness for depositing epi-poly? (By the way, I will contact him to inform him that TXRF may likely be required and to ask about whether this thickness is actually needed for his particular application and what kind of clean his wafers can undergo. But we should decide in principle whether this is OK -- basically, qualifying his SiC furnace for clean processing in our lab.) Mary -------- Original Message -------- Subject: About epi poly process at stanford Date: Mon, 25 Aug 2008 16:27:56 -0700 From: Benjamin Cheng To: Dear Mary, My name is Benjamin Cheng, a graduate student working in BSAC at UC-Berkeley. I have some questions regarding the deposition of epi-Si (ASM Epsilon II Single-Wafer Epitaxial Reactor) at Stanford Nanofabrication Facility. I would like to know whether a 4? Silicon wafer with a thin layer of poly silicon carbide (SiC) deposited (about 500nm) using LPCVD (http://microlab.berkeley.edu/labmanual/chap5/5.15.html) is allowed in the epi tool at Stanford for a thick layer of epi-Si (~10-20 micron). Silicon carbide is well known to be very inert chemically and can withstand very harsh environment. No metal is allowed in the furnace tube used in depositing the SiC and so there should not be contamination issue. I would greatly appreciate it if you could provide me any information regarding the material compatibility of the epi tool at Stanford. Thanks and look forward to hearing from you. Regards, Benjamin Cheng _____________________________________ University of California, Berkeley Department of Mechanical Engineering Berkeley Mechanical Analysis & Design Office: 5109 Etcheverry Hall Phone: (510) 643 - 1099 -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From mwiemer at sj-solar.com Tue Aug 26 10:34:11 2008 From: mwiemer at sj-solar.com (Mike Wiemer) Date: Tue, 26 Aug 2008 10:34:11 -0700 Subject: New material request Message-ID: Hi Guys, Did you receive this request? Any update? Questions? Thanks! -Mike From: Mike Wiemer Sent: Friday, August 22, 2008 4:45 PM To: 'specmat at snf.stanford.edu' Subject: New material request Hi Specmat Team, 1.) Mike Wiemer, login: mwiemer 2.) Material: a. 353ND Part A (~2oz smaller glass bottle) b. 353ND Part B (~14oz small plastic bottle) 3.) Material storage a. The material will be brought into the lab for the purpose of trying these experiments on the day(s) of use. b. It will be stored off the Stanford campus at another location. 4.) Vendor: Epoxy Technologies (http://www.epotek.com/) 14 Fortune Drive Billerica, MA 01821 Tel: 978.667.3805 Fax: 978.663.9782 5.) MSDS & datasheet a. See attached b. Hazard Class: Corrosive c. Liquid / Basic / Organic 6.) Process Flow - all work will be done at the headway and the adjacent Aluminum covered hotplate a. Mix part A and part B in a disposable personal beaker under the headway fume hood, using Aluminum sheets to ensure no spillage on the bench surface. b. Cover and warm mixed material on the adjacent hotplate to <40C so it becomes less viscous c. Apply material onto the wafer (on the headway chuck) with a disposable syringe d. Spin at various spin speeds e. Cure the Epoxy/Wafer on the hotplate between 150C and 175C f. Clean up please advise - Place all uncured/used material in a plastic bag and place where???? g. Remove the bottles of Epoxy Parts A/B from the lab h. The cured wafer will not be subsequently processed in SNF with the exception of (perhaps) analysis with some metrology tools like: i. Zygo ii. Dektak iii. Microscopes Thank you, -Mike -------------- next part -------------- An HTML attachment was scrubbed... URL: From mtang at stanford.edu Wed Aug 27 09:50:30 2008 From: mtang at stanford.edu (Mary Tang) Date: Wed, 27 Aug 2008 09:50:30 -0700 Subject: New material request In-Reply-To: References: Message-ID: <48B585D6.80507@stanford.edu> Hi Mike -- Sorry for the delay. What you propose is fine. Please be careful to remove any spills or excess before it cures -- it will be nearly impossible to remove afterwards. I guess I don't have to tell you that Mario will have your head if you damage one of his headway2 chucks in this way. And of course, make sure to label your labware. Please treat the hazardous waste as you would general litho waste -- it is similar in base composition to some negative photoresists used in the lab. Mary Mike Wiemer wrote: > > Hi Guys, > > Did you receive this request? Any update? Questions? > > Thanks! > > -Mike > > *From:* Mike Wiemer > *Sent:* Friday, August 22, 2008 4:45 PM > *To:* 'specmat at snf.stanford.edu' > *Subject:* New material request > > Hi Specmat Team, > > *1.) **Mike Wiemer, login: mwiemer* > > *2.) **Material: * > > a. 353ND Part A (~2oz smaller glass bottle) > > b. 353ND Part B (~14oz small plastic bottle) > > *3.) **Material storage* > > a. The material will be brought into the lab for the purpose of trying > these experiments on the day(s) of use. > > b. It will be stored off the Stanford campus at another location. > > *4.) **Vendor: * > > Epoxy Technologies (http://www.epotek.com/) > > 14 Fortune Drive > Billerica, MA 01821 > Tel: 978.667.3805 > Fax: 978.663.9782 > > *5.) **MSDS & datasheet * > > a. See attached > > b. Hazard Class: Corrosive > > c. Liquid / Basic / Organic > > *6.) **Process Flow ? all work will be done at the headway and the > adjacent Aluminum covered hotplate* > > a. Mix part A and part B in a disposable personal beaker under the > headway fume hood, using Aluminum sheets to ensure no spillage on the > bench surface. > > b. Cover and warm mixed material on the adjacent hotplate to <40C so > it becomes less viscous > > c. Apply material onto the wafer (on the headway chuck) with a > disposable syringe > > d. Spin at various spin speeds > > e. Cure the Epoxy/Wafer on the hotplate between 150C and 175C > > f. *Clean up please advise* *? Place all uncured/used material in a > plastic bag and place where????* > > g. Remove the bottles of Epoxy Parts A/B from the lab > > h. *The cured wafer will not be subsequently processed in SNF* with > the exception of (perhaps) analysis with some metrology tools like: > > i. Zygo > > ii. Dektak > > iii. Microscopes > > Thank you, > > -Mike > -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From mtang at stanford.edu Wed Aug 27 11:00:41 2008 From: mtang at stanford.edu (Mary Tang) Date: Wed, 27 Aug 2008 11:00:41 -0700 Subject: [Fwd: [POSSIBLE VIRUS:###] [Fwd: question about CPD]] Message-ID: <48B59649.9080606@stanford.edu> Hi all -- Did you see this? (Sorry, I don't remember if I'd forwarded it before...) Mary -------- Original Message -------- Subject: [POSSIBLE VIRUS:###] [Fwd: question about CPD] Date: Fri, 22 Aug 2008 16:41:45 -0700 From: Uli Thumser To: Mary Tang -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu -------------- next part -------------- An embedded message was scrubbed... From: "Xinran Wang" Subject: question about CPD Date: Thu, 14 Aug 2008 14:07:53 -0700 Size: 2566 URL: From mtang at stanford.edu Wed Aug 27 16:19:57 2008 From: mtang at stanford.edu (Mary Tang) Date: Wed, 27 Aug 2008 16:19:57 -0700 Subject: [Fwd: About epi poly process at stanford] In-Reply-To: <48B415EA.9080805@stanford.edu> References: <48B415EA.9080805@stanford.edu> Message-ID: <48B5E11D.1020209@stanford.edu> Hi again -- Any thoughts? I spoke with him again. Basically, he says that the LPCVD furnace at Berkeley is labeled non-MOS, but no metals are allowed. So, he's pretty confident the film would pass a TXRF. Should we OK him on this? By the way, Matt Hopcroft is a post-doc in his lab, so has been advising him on SNF. Also, after speaking with him, he says he really does need 10-20 microns of poly. What should we tell him? M Mary Tang wrote: > Hi all -- > > What does everyone think about this request? Would a TXRF analysis of > a wafer from this furnace be satisfactory? And is there an upper limit > on thickness for depositing epi-poly? (By the way, I will contact him > to inform him that TXRF may likely be required and to ask about > whether this thickness is actually needed for his particular > application and what kind of clean his wafers can undergo. But we > should decide in principle whether this is OK -- basically, qualifying > his SiC furnace for clean processing in our lab.) > > Mary > > -------- Original Message -------- > Subject: About epi poly process at stanford > Date: Mon, 25 Aug 2008 16:27:56 -0700 > From: Benjamin Cheng > To: > > > > Dear Mary, > > My name is Benjamin Cheng, a graduate student working in BSAC at > UC-Berkeley. > > I have some questions regarding the deposition of epi-Si (ASM Epsilon > II Single-Wafer Epitaxial Reactor) at Stanford Nanofabrication Facility. > > I would like to know whether a 4? Silicon wafer with a thin layer of > poly silicon carbide (SiC) deposited (about 500nm) using LPCVD > (http://microlab.berkeley.edu/labmanual/chap5/5.15.html) is allowed in > the epi tool at Stanford for a thick layer of epi-Si (~10-20 micron). > Silicon carbide is well known to be very inert chemically and can > withstand very harsh environment. No metal is allowed in the furnace > tube used in depositing the SiC and so there should not be > contamination issue. I would greatly appreciate it if you could > provide me any information regarding the material compatibility of the > epi tool at Stanford. > > Thanks and look forward to hearing from you. > > Regards, > > Benjamin Cheng > > _____________________________________ > > University of California, Berkeley > > Department of Mechanical Engineering > > Berkeley Mechanical Analysis & Design > > Office: 5109 Etcheverry Hall > > Phone: (510) 643 - 1099 > > -- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang at stanford.edu http://snf.stanford.edu From jwpchen at stanford.edu Sat Aug 30 03:27:11 2008 From: jwpchen at stanford.edu (Peter Chen) Date: Sat, 30 Aug 2008 03:27:11 -0700 Subject: material request - Stycast W 19 epoxy Message-ID: <48B9207F.5040904@stanford.edu> Hi specmat, Here is my request: Material - Stycast W 19 epoxy, Catalyst 11, Catalyst 9, from Emerson and Cuming Where - (1) a litho bench (for the exhaust) (2) standard litho flow (after epoxy cure) (3) PR lift-off in Metallica (4) alternatively, polyimide flow at laurell then lift-off in Gryphon Process - (1) Insertion chiplets into backside of pocketed wafer. Mix, apply, and cure epoxy at a wetbench (for exhaust). Epoxy only used on backside of wafer. (2) Downstream to standard litho equipment for other (non-epoxy) litho steps on frontside (3) PR lift-off process in Metallica (4) polyimide lift-off in Gryphon if that can be approved. Notes - (1) I don't need a litho bench per se, I would just like an approved place that has enough exhaust and 120C hotplate for curing (2) Epoxy will be applied by syringe or pipette to chiplet insertion sites only. Goal is to achieve a reconstituted wafer. (3) Cured epoxy should easily handle 155C. (4) The raw epoxy and catalyst can be stored at room temperature, preferably in lab. (5) After chiplet insertion into wafer backside, my process is to have metal lift-off on frontside to complete the electrical contacts. I need to cover some frontside topography, hence sputtering. I have attached datasheet and MSDS. Please let me know if there are other things I should bring to specmat. Thanks, -Peter Chen -------------- next part -------------- A non-text attachment was scrubbed... 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