About epi process/Silicon carbide

[maurice stevens]

Hi Benjamin,

I am forwarding your question to Specmat ( specmat at snf.stanford.edu) 
http://snf.stanford.edu/Materials/SpecMat.html

SpecMat <mailto:%20specmat at snf.stanford.edu> sets the policy for the use 
of new, or existing materials.

-m

Benjamin Cheng wrote:
>
> Dear Maurice,
>
> My name is Benjamin Cheng, a graduate student working in BSAC at 
> UC-Berkeley.
>
> I have some questions regarding the deposition of epi-Si (ASM Epsilon 
> II Single-Wafer Epitaxial Reactor) at Stanford Nanofabrication Facility.
>
> I would like to know whether a 4” Silicon wafer with a thin layer of 
> poly silicon carbide (SiC) deposited using LPCVD is allowed in the epi 
> tool at Stanford for a thick layer of epi-Si (~10-20 micron). Silicon 
> carbide is well known to be very inert chemically and can withstand 
> very harsh environment. I would greatly appreciate it if you could 
> provide me any information regarding the material compatibility of the 
> epi tool at Stanford.
>
> Thanks and look forward to hearing from you.
>
> Regards,
>
> Benjamin Cheng
>
> _____________________________________
>
> University of California, Berkeley
>
> Department of Mechanical Engineering
>
> Berkeley Mechanical Analysis & Design
>
> Office: 5109 Etcheverry Hall
>
> Phone: (510) 643 - 1099
>


-- 
maurice at stanford.edu

Maurice Stevens
Stanford Nanofabrication Facility
CIS Room 142, Mail Code 4070
Stanford, CA  94305
P. (650)725-3660
F. (650)725.6278