From chu at unix.sri.com Thu Apr 5 12:32:34 2001 From: chu at unix.sri.com (Chu) Date: Thu, 05 Apr 2001 12:32:34 -0700 Subject: sts Message-ID: <3ACCC852.25BABD9E@unix.sri.com> I would not be able to use the STS from 4pm to 6pm because of the problem of Karlsuss. BC From jhemanth at stanford.edu Thu Apr 5 14:09:47 2001 From: jhemanth at stanford.edu (Hemanth Jagannathan) Date: Thu, 5 Apr 2001 14:09:47 -0700 (PDT) Subject: sts In-Reply-To: <3ACCC852.25BABD9E@unix.sri.com> Message-ID: I'll tke the time on STS thanks. Hemanth On Thu, 5 Apr 2001, Chu wrote: > I would not be able to use the STS from 4pm to 6pm because of the > problem of Karlsuss. > > BC > > ------------------------------------------------------------------------------------------------------------- Hemanth Jagannathan Phone: 1-650-497-5917 796, Escondido Road, Apt #26J, URL: www.stanford.edu/~jhemanth Stanford University Stanford, CA 94305 ------------------------------------------------------------------------------------------------------------- From jhemanth at sunray.snffab.stanford.edu Thu Apr 5 17:05:19 2001 From: jhemanth at sunray.snffab.stanford.edu (Jagannathan Hemanth) Date: Thu, 5 Apr 2001 17:05:19 -0700 (PDT) Subject: Problem with STS Message-ID: The chamber seems to be in vacuum but I am not getting an option to vent it. I am not sure if I am missing something so I am not shuting down the machine but am reporting it as a problem Hemanth From jhemanth at sunray.snffab.stanford.edu Thu Apr 5 17:31:56 2001 From: jhemanth at sunray.snffab.stanford.edu (Jagannathan Hemanth) Date: Thu, 5 Apr 2001 17:31:56 -0700 (PDT) Subject: STS working again Message-ID: I found Caeser and he got STS to work again. It had to be re-started. Just wanted to let all the users who had reserved it that they can come and use it. Hemanth From lnjiang at leland.stanford.edu Thu Apr 5 21:09:03 2001 From: lnjiang at leland.stanford.edu (Linan Jiang) Date: Thu, 5 Apr 2001 21:09:03 -0700 Subject: cancel reservation in Saturday afternoon References: Message-ID: <001301c0be4f$5528b980$843140ab@stanford.edu> Won't use STS in the coming Saturday afternoon. Linan ==== From pierre_indermuhle at yahoo.com Thu Apr 5 23:20:02 2001 From: pierre_indermuhle at yahoo.com (Pierre Indermuhle) Date: Thu, 5 Apr 2001 23:20:02 -0700 (PDT) Subject: Done early, STS etcher free Message-ID: <20010406062002.1084.qmail@web12901.mail.yahoo.com> __________________________________________________ Do You Yahoo!? Get email at your own domain with Yahoo! Mail. http://personal.mail.yahoo.com/ From DaveHong at aol.com Fri Apr 6 18:12:09 2001 From: DaveHong at aol.com (DaveHong at aol.com) Date: Fri, 06 Apr 2001 21:12:09 EDT Subject: reservation removed this Sat 1-8pm Message-ID: My wafers are not ready. Sorry! From dlaser at Stanford.EDU Sun Apr 8 12:22:07 2001 From: dlaser at Stanford.EDU (Daniel James Laser) Date: Sun, 8 Apr 2001 12:22:07 -0700 (PDT) Subject: cancelled reservation Sun 4/8 1800-2000 Message-ID: <200104081922.f38JM8B11893@saga9.Stanford.EDU> sorry for the late notice. From s.vargo at siwaveinc.com Sun Apr 8 12:22:48 2001 From: s.vargo at siwaveinc.com (Stephen Vargo) Date: Sun, 08 Apr 2001 12:22:48 -0700 Subject: Done early today. Message-ID: <986757768.3ad0ba8817cb8@www.electricwebmail.com> Done early.STS time slot is open from 2:30pm-6pm. Steve From vik at stanford.edu Mon Apr 9 18:30:50 2001 From: vik at stanford.edu (Vikram Bala) Date: Mon, 9 Apr 2001 18:30:50 -0700 (PDT) Subject: STS Etch available tonight midnight-4AM In-Reply-To: Message-ID: reservation removed for tonight. From pindermuhle at zyomyx.com Tue Apr 10 14:23:24 2001 From: pindermuhle at zyomyx.com (Indermuhle, Pierre) Date: Tue, 10 Apr 2001 14:23:24 -0700 Subject: I might be 30 to 45 minutes late this evening (Tue Apr 10th),... Message-ID: <3AD379CC.22BAEB94@zyomyx.com> ...but I'll use my reservation. Thanks Pierre -- _____________________________________________________ Pierre-F. Indermuhle Research Scientist Zyomyx Inc. 3911 Trust Way Hayward, CA. 94545 Phone: (510) 266-7509 Fax (510) 786-3832 http://www.zyomyx.com From caudillomalik at netscape.net Wed Apr 11 09:38:01 2001 From: caudillomalik at netscape.net (David Caudillo) Date: Wed, 11 Apr 2001 12:38:01 -0400 Subject: stsetch cancellation 4/11 and 4/13 Message-ID: <7CC9E6C8.14ECD049.0DC3DFDB@netscape.net> Weds 4/11 from 1400 to 2300 Fri 4/13 from 1000 to 1830 -- David Caudillo __________________________________________________________________ Get your own FREE, personal Netscape Webmail account today at http://webmail.netscape.com/ From latta at snf.stanford.edu Fri Apr 13 15:55:24 2001 From: latta at snf.stanford.edu (Nancy Latta) Date: Fri, 13 Apr 2001 15:55:24 -0700 (PDT) Subject: Back up- O2 CLEAN program run. Message-ID: From vik at stanford.edu Sat Apr 14 16:53:17 2001 From: vik at stanford.edu (Vikram Bala) Date: Sat, 14 Apr 2001 16:53:17 -0700 (PDT) Subject: STS etch now available Message-ID: Wafer not ready. STS etch available 5PM-9PM. From sjlee at snf.stanford.edu Sat Apr 14 17:45:50 2001 From: sjlee at snf.stanford.edu (John Lee) Date: Sat, 14 Apr 2001 17:45:50 -0700 Subject: stsetch Message-ID: <3AD8EF3E.966E9B26@snf.stanford.edu> I'm here in the lab and have claimed the 6-10 block. Thanks, -John ----Original Message Follows---- From: Vikram Bala To: Subject: STS etch now available Date: Sat, 14 Apr 2001 16:53:17 -0700 (PDT) Wafer not ready. STS etch available 5PM-9PM. From sjlee at snf.stanford.edu Sat Apr 14 18:06:12 2001 From: sjlee at snf.stanford.edu (John Lee) Date: Sat, 14 Apr 2001 18:06:12 -0700 Subject: stsetch problem Message-ID: <3AD8F404.295E867F@snf.stanford.edu> I walked up to the system to start some runs but found the loadlock already pumped down. There are no wafers in either the process chamber or the loadlock, and the turbo seems to be running okay. No wafer transfer buttons (i.e. vent) are selectable. I tried to see if enabling helped, but it makes no difference. Oddly, Coral fails to show the history at this time, but the log last shows and O2 clean. I seem to recall another user encountering a similar problem in recent weeks. Does anyone know the correct solution? Thanks, -John From sjlee at snf.stanford.edu Mon Apr 16 11:40:42 2001 From: sjlee at snf.stanford.edu (John Lee) Date: Mon, 16 Apr 2001 11:40:42 -0700 Subject: stsetch Message-ID: <3ADB3CAA.A2F18A53@snf.stanford.edu> Thanks to staff help early this morning (Len or Cesar, I presume), the system is up and running again. I was able to finish my weekend runs this morning in Nancy's absence. The message board outside says she will not be in today, so maybe someone else can use her afternoon time and free up downstream reservations. I recall "czhou" also lost a lot of time this weekend. Have fun, -John From dlaser at Stanford.EDU Mon Apr 16 15:48:27 2001 From: dlaser at Stanford.EDU (Daniel James Laser) Date: Mon, 16 Apr 2001 15:48:27 -0700 (PDT) Subject: stsetch (fwd) Message-ID: <200104162248.f3GMmRo20483@myth11.Stanford.EDU> I ran my wafers during Nancy's time this afternoon and am accordingly removing my reservation for 17:00-19:00 this evening. Dan Laser Forwarded message: > From stsetch-return-295-dlaser=snf.stanford.edu at snf.stanford.edu Mon Apr 16 11:41:25 2001 > Delivered-To: dlaser at snf.stanford.edu > Mailing-List: contact stsetch-help at snf.stanford.edu; run by ezmlm > Precedence: bulk > X-No-Archive: yes > List-Post: > List-Help: > List-Unsubscribe: > List-Subscribe: > Delivered-To: mailing list stsetch at snf.stanford.edu > Sender: sjlee at Stanford.EDU > Message-ID: <3ADB3CAA.A2F18A53 at snf.stanford.edu> > Date: Mon, 16 Apr 2001 11:40:42 -0700 > From: John Lee > X-Mailer: Mozilla 4.76 [en] (X11; U; SunOS 5.6 sun4u) > X-Accept-Language: en > MIME-Version: 1.0 > To: stsetch at snf.stanford.edu > Subject: stsetch > Content-Type: text/plain; charset=us-ascii > Content-Transfer-Encoding: 7bit > X-UIDL: 03f4dc4547389c52977613d7cb843f22 > > Thanks to staff help early this morning (Len or Cesar, I presume), the > system is up and running again. I was able to finish my weekend runs > this morning in Nancy's absence. The message board outside says she > will not be in today, so maybe someone else can use her afternoon time > and free up downstream reservations. I recall "czhou" also lost a lot > of time this weekend. > > Have fun, > -John > From pierre_indermuhle at yahoo.com Mon Apr 16 23:09:03 2001 From: pierre_indermuhle at yahoo.com (Pierre Indermuhle) Date: Mon, 16 Apr 2001 23:09:03 -0700 (PDT) Subject: Done with STS etcher Pierre Message-ID: <20010417060903.57005.qmail@web12907.mail.yahoo.com> __________________________________________________ Do You Yahoo!? Yahoo! Auctions - buy the things you want at great prices http://auctions.yahoo.com/ From eap at gloworm.Stanford.EDU Fri Apr 20 13:04:41 2001 From: eap at gloworm.Stanford.EDU (Eric Perozziello) Date: Fri, 20 Apr 2001 13:04:41 -0700 (PDT) Subject: Free time Message-ID: <200104202004.NAA20586@gloworm.Stanford.EDU> Hi Folks, There's some free time this afternoon on the STS- 1:30 until eve. I'm not ready, so I removed the res. Thanks, -Eric From vik at stanford.edu Mon Apr 23 16:56:41 2001 From: vik at stanford.edu (Vikram Bala) Date: Mon, 23 Apr 2001 16:56:41 -0700 (PDT) Subject: sts available 5PM-8PM In-Reply-To: Message-ID: I will not be using the first 3 hours of my reservation due to wafer issues.... STS etch available 5PM-8PM. Sorry for short notice.... vik From mcvittie at cis.Stanford.EDU Wed Apr 25 10:48:46 2001 From: mcvittie at cis.Stanford.EDU (Jim McVittie) Date: Wed, 25 Apr 2001 10:48:46 -0700 (PDT) Subject: May PEUG Mtg -- MEMS Related Plasma Etching (fwd) Message-ID: STS Etch Users, On the afternoon of May 10 there will be three talks on deep Si etching. There also will be some good cookies if you get there early. Jim McVittie ******************* PLASMA ETCH USERS GROUP ********************* of the Northern California Chapter of the American Vacuum Society ********************************************************************* May 2001 MEETING Topic: MEMS Related Plasma Etching Date: Thursday, May 10, 2001 Time: 2:00 - 5:00 pm Place: National Semiconductor Credit Union Auditorium 955 Kifer Rd. Santa Clara, CA 95051 Directions to the National Semiconductor Credit Union Auditorium: >From 101: Go south on Lawrence Expressway. Turn right on Kifer Rd. Turn right into the driveway of the National Semiconductor Credit Union (955 Kifer Rd.) and find parking in the Credit Union parking lot. The auditorium is on the west side of the building and can be entered from the door in the rear next to the company park. >From 280: Go north on Lawrence Expressway. Turn left on Kifer Rd. Follow directions above. **************************************************** See a map: http://www.vacuum.org/nccavs/peug_mm.html **************************************************** Agenda: 2:00 - 2:30 Refreshments 2:30 - 4:00 Presentations Chair: Jim McVittie, mcvittie at cis.Stanford.EDU Speakers: --------------- Deep Reactive Ion Etching (DRIE) for Multi-Wafer Projects Arturo Ayon Sony Semiconductor 1 Sony Place San Antonio, TX 78245-2100 We review the physics and the performance of a DRIE tool, the influence of etching variables on anisotropy, uniformity, silicon etching rate, selectivity and scalloping. We discuss the charging effects observed on high aspect ratio structures when employing SOI substrates, the dependance of the footing effect on etching conditions, and the utilization of the local electric fields generated when reaching a dielectric stop layer for achieving ion flux steering. The utilization of deep reactive ion etching (DRIE) in conjunction with wafer bonding schemes makes possible the micromanufacturing of complex 3-dimensional structures at a microscale level, in a manner not previously practical and in some cases unattainable. Plasma etching methods, in general, limit the geometry to extruded 2D prismatic shapes. However, DRIE in combination with wafer bonding techniques offers to designers the flexibility not available to the previous generation of technologists. These techniques have been successfully applied in the microfabrication of a large variety of structures including bipropellant silicon micro-rockets, heat exchangers, turbo chargers and micro-combustors. ______________ Low Frequency Deep Reactive Ion Etching for SOI Processing Matthew Wasilik Berkeley Sensor & Actuator Center 497 Cory Hall Berkeley, CA 94720-1770 Due to the inherently non-uniform etching effects in the standard DRIE process, a new technique has been developed specifically for SOI (Silicon On Insulator) etching.In short, a separate pulsed, low frequency power input is applied to the platen during the etching cycle. This essentially allows ions to escape more readily from deep trenches when the etching cycle is done. From this a decrease in over-etch sensitivity emerges, and the notching or ^footing^ of Silicon structures is minimized. The end result is the ability to produce high quality large aspect ratio structures. ______________ Advanced Deep Silicon Etching for Deep Trench Isolation, Optical Components and Micro-Machining Applications Padmapani Nallan, Anisul Khan, Sharma Pamarthy, Shu-Ting Hsu, Ajay Kumar Applied Materials 3320 Scott Boulevard Santa Clara, CA 95054 Traditionally, deep silicon etching has been used for DRAM capacitor trenches and deep trench isolation applications for BiCMOS devices. Recently, we have seen a plethora of new applications requiring deep silicon etching (thru wafer etches for inkjet applications and optical fiber alignment, microsensors and actuators etc.). The etch requirements for all these applications are as diverse as the applications themselves. The CDs range from sub-micon to millimeter sizes and the etch depths range from a 1-2um to through wafer (~700um for a six inch wafer). Some applications such as waveguides require very smooth sidewall (typical requirement is <4nm surface roughness to avoid light scattering), while through wafer etches require very high etch rates (>10um/min) with very high selectivity to resist and hardmask (typically >70:1). These varied applications with a wide range of etch requirements have motivated us to develop a portfolio of processes, in the DPS-DT chamber, which cater to different application needs. We have used two different approaches to develop processes that satisfy the requirements of the different applications. One is a single step approach where we use a SF6/HBr/O-2 or a SF6/C4F8 chemistry to etch the trenches. This approach is necessary for applications where smooth sidewalls are required. An SF6 based etch chemistry was chosen to get high etch rates. The other is the Time Multiplex Gas Modulation (TMGM) approach, where we have a sequence of short deposition and etch steps cycled many times over to get the required etch depth. This approach gives a high etch rate with very high selectivity to both oxide and resist. The capabilities of our tool with all these processes will be presented. _____________________________ Della Miller AVS West 1265 El Camino Real, Ste. 109 Santa Clara CA 95050 Phone: 408-246-3600 Fax: 408-246-7700 E-mail: della at vacuum.org Web: www.vacuum.org From aaronp at stanford.edu Sat Apr 28 11:51:20 2001 From: aaronp at stanford.edu (Aaron Partridge) Date: Sat, 28 Apr 2001 11:51:20 -0700 Subject: sts free this afternoon Message-ID: sorry for the late notice. From ckenney at JasmineNetworks.com Mon Apr 30 16:47:24 2001 From: ckenney at JasmineNetworks.com (Chris Kenney) Date: Mon, 30 Apr 2001 16:47:24 -0700 Subject: Can't use reservation tonight Message-ID: I can not use my reservation for tonight on the STS etcher. The wafers aren't ready yet. Sorry for the very late notice. Chris