STS-2 Status

Jim McVittie mcvittie at cis.Stanford.EDU
Thu May 13 23:59:32 PDT 2004

STS Users,

The installation of the new STS etcher is finally finished and the
hardware phase of the startup in complete. We have started the process
characterization.  The startup is running a bit late because of some
problems with the loader, which pushed the process startup into conflict
with vacation plans for the STS process expert. For this reason, the
process expert will not be getting here until the 26th or 27th of this
month.  In the mean time, the STS hardware engineer (Duncan Drysdale)is
helping us startup the process and is training our staff.  It is now
looking like we will start the training of the present STS users on the
new tool during the second week in June. Between now and then, we will be
characterizing the tool for a variety of patterns and etch depths, and
preparing training material.

The processes on the new tool are significantly different than those used 
on the old tool. There are a number a new parameters, which give the tool 
more capability, but they also make process selection more complicated. My 
goal is to have 5 or 6 characterized processes to choose from when you 
switch over to the new tool. Once we have everyone switched to the new 
tool, it looks like we will be opening up the old tool to wafer with gold 
and other metals. If gold is no problem to your devices, you can elect to 
stay with the old tool. 

The initial process work is going well. We have pretty much duplicated the
pre-shipment tests done in England. These includes a 25um deep 2 um wide
trench and a 300 um deep 50um wide trench. We have already started making
a training video. An initial version of this video will be used to train
the staff and some super users starting Monday. Some of the
patterns/structures that we will be working on as of next week include:
SOI, High Aspect Ratio Structures, Though Wafer Etch, High Exposed Areas,
Pillar Structures and Smooth walls.  STS has supplied us with starting
processes for these pattern/structures. The plan is to have initial
results for all these cases when the STS process expert shows up.  With
his help we will quickly tune up the processes and open up the tool to
general use.

	Thanks, Jim
Jim McVittie, Ph.D.    			Senior Research Scientist 
Allen Center for Integrated Systems     Electrical Engineering
Stanford University             	jmcvittie at
Rm. 336, 330 Serra Mall			Fax: (650) 723-4659
Stanford, CA 94305-4075			Tel: (650) 725-3640

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