From mcvittie at cis.Stanford.EDU  Wed Aug 11 14:22:43 2010
From: mcvittie at cis.Stanford.EDU (Jim McVittie)
Date: Wed, 11 Aug 2010 14:22:43 -0700 (PDT)
Subject: STS2  Update -- Getting Results Equal To Before Problems
Message-ID: <Pine.LNX.4.44.1008111418480.3692-100000@cis.Stanford.EDU>

STS2  Users,

With the addition of the zero rf power step to all recipes to the set the
initial direction of the movement of the Load and Tune capacitors, the
etcher seems to be finally working ok. I now have two students, who have
run old recipes from April (with the zero pw step added) and have gotten
results (etch rates, selectivies and profiles) equal to their April
results before all the matching problems.  So things are looking up
regarding STS2.

	Jim

--------------------------------------------------------------
James (Jim) P. McVittie, Ph.D.	        Sr. Research Scientist 
Paul G. Allen Building                  Electrical Engineering
Stanford Nanofabrication Facility       jmcvittie at stanford.edu
Stanford University             	Office: (650) 725-3640
Rm. 336X, 330 Serra Mall		Lab: (650) 721-6834
Stanford, CA 94305-4075			Fax: (650) 723-4659