From ahazeghi at stanford.edu Tue Oct 14 17:03:56 2008 From: ahazeghi at stanford.edu (Arash Hazeghi) Date: Tue, 14 Oct 2008 17:03:56 -0700 Subject: tylan 2 uniformity issue Message-ID: <037101c92e59$84775570$8d660050$@edu> Hi, I have using tylan 2 to grow thin gate oxide for my devices, I have noticed some 20-30% variation across some wafers, most noticeably I tried growing on a wafer which already had oxide from a previous growth, I used DRY900 for 25min to grow an additional 100A but the final thickness variation was as high as 40A. looking at the original wafer which had also gone through DRY900, it looks like the lower half of the wafer had more growth, is this related to some turbulence issue in the furnace? Is there an "optimal" position for the wafers along the boat? Thanks, Arash ---------------------------------------------------------------------------- ------ Arash Hazeghi PhD Candidate Stanford Center for Integrated Systems CIS-X 300, 420 Via Palou Mall, Stanford, CA 94305 phone: +1-650-725-0418 web: http://www.stanford.edu/~ahazeghi -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: tylan 2 nonuniformity.pdf Type: application/pdf Size: 39239 bytes Desc: not available URL: