Tylan LPCVD Furnace Operation (short)
- Clean substrates
Diffusion clean with HF last
- Enable the furnace
- Verify Pump program running
Go to the furnace and use the STATUS button to verify that the system is in 'RUN' mode and running the ?PUMP program?.
- End Pump program
ALARM ACK twice
- Verify the Tube is vented
Ten minutes after the pump program has ended you must manually test that the tube is vented. Push MANUAL on the boat puller, push FAST, then LOOK AT THE TUBE while you hold down OUT. You should immediately see the boat start to come out. If it does not, stop and wait 10 more minutes and test it again.
- Load your program (only after verifying manually that tube is vented)
From TYCOM type "LO <program name> <furnace#>" <RET>. You will be asked to enter the deposit time.
- Run program
- Load your wafers.
The first boat (as the boats come out of the furnace) is for dummies. The second boat is the clean non-metal boat. The third boat is the metal boat. The fourth boat (the last one to come out of the tube) is a dummy boat. Both dummy boats should have 4 to 6 wafers. The two middle boats should have 13 wafers each.
- Send in tube
ALARM ACK once
- Monitor furnace
Take pressure readings during the gross leak check, leak check and the deposition steps of the program and write the values in the logbook.
- Unload wafers
- End program
ALARM ACK twice
- Load pump program
- Run Pump program
- Measure wafers and log results
- Disable the furnace
Uniformity Testing Procedure for TylanBPSG LTO
To provide a standard procedure to monitor oxide thickness and uniformity both wafer-to-wafer over a 26 wafer load and within-a-wafer.
Frequency of test
To be completed after major maintenance such as a tube change or on a set schedule to be determined or as needed based on user feedback.
Documentation of results
To be posted in Badger.
1st boat (Front) in the 5th slot.
1st boat in the 13th.
1st boat in the 21st slot.
2nd boat (Back) in the 5th slot.
2nd boat in the 13th.
2nd boat in the 21st slot.
Use Nanospec to measure oxide thickness across each wafer in five locations. Test sites should be no more than about 15mm from the edge of the wafer.