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You are here: Home / Equipment / Dry Etching / Plasmatherm Etchers (pt-dse, pt-ox and pt-mtl) / PlasmaTherm Deep Silicon Etcher (pt-dse) / PlasmaTherm-DSE (PT-DSE) Capabilities, Specifications and Operation

PlasmaTherm-DSE (PT-DSE) Capabilities, Specifications and Operation

PT-DSE is an ICP (Inductively Coupled Plasma) etch system configured for Si etches using Bosch process. This equipment belongs to the "Contaminated" group.
  1. Picture and Location
  2. Background
  3. Process Capabilities
    1. Cleanliness Standard
    2. Performance of the Tool
  4. Contact List and How to Become a User
    1. Contact List
    2. Training to Become a Tool User
  5. Operating Procedures
  6. Process Monitoring and Machine Qualification
    1. Tool Qualification Run
    2. Machine Status States
    3. Process Monitoring Results

Picture and Location



The tool is located in area B on the Lab Map.

Equipment Locations (gif)


 The Deep Silicon Etching (DSE™) Technology has been developed to achieve extremely high aspect ratio features on silicon substrates.  The DSE™ Technology is based on the well-known time division multiplex (TDM) etch process. The TDM process (also known as the Bosch process) employs alternating deposition (passivation) and etching cycles as illustrated below. 


For enabling faster etch rate, the source power generator (ICP power, 2MHz)  has an increased capacity of 3500 W and the max flow for SF6 MFC is 653 sccm.  In order to minimize the sidewall roughness, DSE uses a faster gas switching technique.  During cycling the reactive gases (C4F8 for dep and SF6 for etch step) are diverted to either the process module or pump depending on whether it is a dep or an etch step.  This enables a cycle time smaller than 1 sec if needed.  In addition, in order to facilitate faster RF tuning when switching between steps frequency tuning option is utilized in the DSE.    Also, in the DSE, bias voltage is controlled as opposed to bias power in the other etchers.  


Process Capabilities

Cleanliness Standard

 PT-DSE is a flexible tool and belongs to the "Contaminated" group.

Performance of the Tool

What the Tool CAN do

  • Deep silicon etching
  • Etching SOI wafers


What the Tool CANNOT do

  • Resist reticulation with deeper etches restricts the utilization of resist mask.
  • Hard clamp and resulting stickiness also restricts the versatility of the resist mask process.


Contact List and How to Become a User

Contact List

The following people make up the Tool Quality Circle:

  • Process Staff:  Usha Raghuram, Jim McVittie, Nancy Latta
  • Maintenance: Elmer Enriquez
  • Super-Users: Jim Kruger, Justin Snapp


Training to Become a Tool User

General Information About Plasma Therm Verasline Software

The software that runs the pt-dse is the same as runs three other systems.  It is described here.

Here is an example of a  typical process sequence step.  It contains ranges, gases, and min/max for various parameters.

Operating Procedures

 PT-DSE is very similar to other PlasmaTherm etchers and the operating procedure is described here.  Recipe set up is slightly different for PT-DSE as "Looping" and "Morphing" options are utilized in DSE and not in other etchers.  Procedure to set up looping and morphing parameters can be found here.


Process Parameters/ Limits

Process pressure, Max = 100mT

Backside He cooling pressure, max = 10 Torr

ICP power, max = 3500 W

Bias voltage, max = 1500 V

Electrode temp, max = 40 C; min = -40 C

Lid temp, Max = 180 C

Liner temp, max = 180 C

Spool temp, max = 180 C

Process gases, max flow

C4F8 = 420 sccm

SF6 = 653.4 sccm

Ar = 48.5 sccm

O2 = 48.25 sccm


Process Monitoring and Machine Qualification (under construction)

Tool Qualification Run



 Quals are run once a month by SUMO. The SUMO member in charge of the tool is Zach (

Quals may also be run periodically be labmembers, especially under the following circumstance:

  • Roughly once a quarter to check system performance
  • After major repairs to the system
  • When a labmember reports variance from normal results.


Use 2 test wafers with 3 um layer of SPR220 photoresist with EBR and 120sec post bake. The wafers are patterned with the SUMO MASK 2.0.


  1. Measure photoresist thickness of the wafer using Nanospec.  Be sure to use reference wafer before testing to calibrate the tool.  Take readings for the Center, Top, Bottom, Right and Flat positions of the wafer.  Readings should be taken about 20mm from the edge. Record.

  2. Season the chamber for 5 minutes using the DSE Clean Recipe (300 cycles), running with a blank Si wafer.  Be sure to check the program parameters before starting.

  3. Etch the test wafer with DSE FAT for 50 cycles. To change the number of cycles, go to editor > loop editor> loop termination > iterations and adjust the number of cycles for DSE FAT Etch #3 to 50.

  4. Remove the test wafer and insert the qual wafer. Etch the qual wafer with DSE FAT for 20 cycles.

  5. Measure photoresist thickness using the same Nanospec.  Be sure to use reference wafer before testing to calibrate the tool. Again, take readings for the Center, Top, Bottom, Right and Flat positions of the wafer. Readings should be taken in more-or-less identical spots as the pre-etch measurements.  Record in the Log.

  6. Subtract the mean values of the pre-etch measurements from the post-etch measurements.  This gives you the amount of photoresist etched. Record, and take average.

  7. Strip the qual wafers of photoresist via matrix.

  8. Now measure the depth of the etches into the Si using alphastep. Find a place that has been etched and measure across it. Make sure to LEVEL if the trace is not horizontal.

  9. Take readings in about the same 5 places as you took readings for the photoresist. Once you get consistent readings in each spot, record the measurement in the Log (alphastep cannot save or print data).

  10. Record results on the Monitor Log. Record results in data file to get within-a-wafer uniformity.




Recommendation to users with critical processes


Machine Status States





Process Monitoring Results

Etch Recipe:  DSE-FAT 

Etch Conditions:  

Dep Step:  150 C4F8/ 30 Ar/ 25mT/ 2000W ICP/ 10 V BV/ 2.5sec

Etch A Step:  150 SF6/30 Ar/ 40mT/ 2000W ICP/ 250V BV/ 1.5sec

Etch B Step:  300 SF6/ 30 Ar/ 75 mT/3000W ICP/ 10V BV/3.0sec

Electrode temp - 15 C; Liner temp - 70 C; Lid temp - 150 C; Spool temp - 180 C; Backside He = 4 T


Qual Data from 7/30/2014 (No of cycles = 15)

Si Etch rate = 8.55 um/min; Unif = 4.1% (AlphaStep Step height measurement; 5 sites; Patterned Si wafer)

Photoresist (PR)  ER = 764 A/min; Unif = 3.7% (NanoSpec measurement; 5 sites; Patterned Si wafer with 3612 resist)

Si: PR Selectivity = 112

Qual Data 10/2/2014 (No of cycles = 20)

 Si Etch rate = 8.03um/min; Uniformity = 2.19% (Alpha Step- Step height measurements; 5 sites; patterned Si wafer)

PR Etch rate = 747A/min; Uniformity = 2.95% (Nanospec measurements; 5 sites; patterned Si wafer with 1um 3612 resist)

Si: PR Selectivity = 108


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