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Overview Summary of Start-up

As provided by vendor.
  • Process qualification of VLN ICP Metal etcher, based on previously agreed upon specifications.
  • An ICP etch of TiW (on PR masked, 100 mm Si wafers) was performed to obtain etch rate, selectivity to PR mask, wafer etch uniformity, and run to run (min of 3 wafers) etch uniformity
  • Target silicon etch rate of ≥ 3000 Å/min, target selectivity to PR = 0.5:1, within Wafer uniformity ≤ ± 5%, run to run uniformity of ≤ ± 3%
  • Stanford University provided TiW coated, patterned, 100 mm Si wafers for meeting the stated specifications
  • Initial hardware issues resulted in large Wafer non-uniformities of > 20%, but improved to an average of 4.0%
  • Etch rate, wafer uniformity, and run to run uniformity specifications were met and selectivity was just short of the target at 0.42:1 

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