Fab Courses @Stanford
If you're interested in hardware and how it's made, here are some Stanford courses to help you get started. Some of these courses will get you into a bunnysuit into the lab: EE21N (where students get the full lab tour and observe fabrication of a carbon nanotube chip), E240 (students get a bunnysuit tour of the cleanroom), E241 (students get a deep dive into a team-based, fab project), and EE312 (students get to design, build, and test an electronics device.) For more info, check out the Stanford Bulletin or ask an instructor or staffer.
EE 17N: Engineering the Micro and Nano Worlds: From Chips to Genes
The first part of the course will consist of a hands-on introduction to the techniques of micro and nanofabrication using Stanford’s shared nanotechnology research facilities, SNF and SNSF, complemented with field trips to local companies and other research centers to illustrate the many applications of nanotechnology, such as DNA microarrays, microfluidic bio-sensors, and microelectromechanical systems (MEMS). The second part involves students proposing, planning, and executing a project “to build something at the nanoscale.” Really, that is the criteria, “build something at the nanoscale.” The professors will of course enthusiastically aid in refining your projects and helping you realize them, but the initial spark will be from your creativity. With access to 10s of millions of dollars of nanotech equipment available to aid in realizing your vision, we hope you accept this challenge with gusto. Examples of recent projects include biosensors using aptamer probes, gecko-inspired dry adhesives, and ultrasensitive strain sensors using diffraction gratings. (Not offered in 2022-2023.)
EE 21N: Making at the nanometer scale: A journey into microchips
Have you ever wondered what is inside your phone and your computer? What physical events happen in between the time you press the “search” button and the information shows up on the screen? What happens after you pressed the key to do a Google search? What are the advances in technology that made that happen? Can some of the same technologies be applied in various fields such as biomedical research and finding solutions to renewable energy?
In this course, we start with the classic paper by Richard Feynman, "There's Plenty of Room at the Bottom," which laid down a challenge to the nanotechnologists. Today’s microchips are nanotechnology in action. Transistors are nanometer scale. We will introduce students to the tools of nanotechnologists and the basic elements of nanoscale science and engineering such as nanotubes, nanowires, nanoparticles, and self-assembly. We will visit nanotechnology laboratories to consolidate our learning, go into the Stanford Nanofabrication Facility (SNF), and do a four-week project on nanofabrication. Hands-on laboratory work will be introduced (e.g., lithography, seeing things at the nanoscale using electron microscopes). We will learn how to build transistors from scratch and test them.
Students will develop an understanding of the scientific basis of nanotechnology and be exposed to nanotechnology from a broader societal perspective. Students will also be exposed to the latest research advances in nanotechnology that may have impact on daily life. Specifically, students will learn how microchips are made. Hands-on laboratory work will be introduced (e.g. lithography, seeing things at the nanoscale using electron microscopes).
EE 116: Semiconductor Devices for Energy and Electronics
The underpinnings of modern technology are the transistor (circuits), the capacitor (memory), and the solar cell (energy). EE 116 introduces the physics of their operation, their historical origins (including Nobel prize breakthroughs), and how they can be optimized for future applications. The class covers physical principles of semiconductors, including silicon and new material discoveries, quantum effects, band theory, operating principles, and device equations. Recommended (but not required) co-requisite: EE 65 or equivalent.
EE 212: Integrated Circuit Fabrication Processes
For students interested in the physical bases and practical methods of silicon VLSI chip fabrication, or the impact of technology on device and circuit design, or intending to pursue doctoral research involving the use of Stanford's Nanofabrication laboratory. Process simulators illustrate concepts. Topics: principles of integrated circuit fabrication processes, physical and chemical models for crystal growth, oxidation, ion implantation, etching, deposition, lithography, and back-end processing. Required for 410.
EE 218: Power Semiconductor Devices and Technology
This course starts by covering the device physics and technology of current silicon power semiconductor devices including power MOSFETs, IGBTs, and Thyristors. Wide bandgap materials, especially GaN and SiC are potential replacements for Si power devices because of their fundamentally better properties. This course explores what is possible in these new materials, and what the remaining challenges are for wide bandgap materials to find widespread market acceptance in power applications. Future clean, renewable energy systems and high efficiency power control systems will critically depend on the higher performance devices possible in these new materials. Prerequisites: EE 116 or equivalent.
ENGR 240: Introduction to Micro and Nano Electromechanical Systems
Miniaturization technologies now have important roles in materials, mechanical, and biomedical engineering practice, in addition to being the foundation for information technology. This course will target an audience of first-year engineering graduate students and motivated senior-level undergraduates, with the goal of providing an introduction to M/NEMS fabrication techniques, selected device applications, and the design tradeoffs in developing systems. The course has no specific prerequisites, other than graduate or senior standing in engineering; otherwise, students will require permission of the instructors.
This project course focuses on developing fabrication processes for ExFab, a shared facility that supports flexible lithography, heterogeneous integration, and rapid micro prototyping. Team projects are approved by the instructor and are mentored by an SNF staff member and an external mentor from industry. Students will plan and execute experiments and document them in a final presentation and report, to be made available on the lab's Wiki for the benefit of the Stanford research community. Students must consult with Prof. Fan, SNF staff, and an external mentor, and also need to submit an approved proposal before signing up. [This is where SNF's Project Reports and Nano Nuggets come from!]
EE 292C: Chemical Vapor Deposition and Epitaxy for Integrated Circuits and Nanostructures
Fundamental aspects of CVD are initially considered, first focusing on processes occurring in the gas phase and then on those occurring on the surface. Qualitative understanding is emphasized, with minimal use of equations. Adding energy both thermally and by using a plasma is discussed; atomic-layer deposition is briefly considered. Examples of CVD equipment are examined. The second portion of the tutorial examines layers deposited by CVD. The focus is on group IV semiconductors especially epitaxial and heteroepitaxial deposition, in which the crystal structure of the depositing layer is related to that of the substrate. Polycrystalline silicon and the IC interconnect system are then discussed. Finally, the use of high-density plasmas for rapid gap filling is contrasted with alternative CVD dielectric deposition processes.
EE 312: Integrated Circuit Fabrication Laboratory
Formerly EE 410. Fabrication, simulation, and testing of a submicron CMOS process. Practical aspects of IC fabrication including silicon wafer cleaning, photolithography, etching, oxidation, diffusion, ion implantation, chemical vapor deposition, physical sputtering, and electrical testing. Students also simulate the CMOS process using process simulator TSUPREM4 of the structures and electrical parameters that should result from the process flow. Taught in the Stanford Nanofabrication Facility (SNF). Preference to students pursuing doctoral research program requiring SNF facilities. Enrollment limited to 20. Prerequisites: EE 212, EE 216, or consent of instructor.
EE 316: Advanced VLSI Devices
In modern VLSI technologies, device electrical characteristics are sensitive to structural details and therefore to fabrication techniques. How are advanced VLSI devices designed and what future changes are likely? What are the implications for device electrical performance caused by fabrication techniques? Physical models for nanometer scale structures, control of electrical characteristics (threshold voltage, short channel effects, ballistic transport) in small structures, and alternative device structures for VLSI. Prerequisites: 216 or equivalent. Recommended: EE 212.
EE 323: Energy in Electronics
EE 323 examines energy in modern nanoelectronics, from fundamentals to systems. Fundamental topics include energy storage and transfer via electrons and phonons, ballistic limits of current and heat, meso- to macroscale mobility and thermal conductivity. Applied topics include power in nanoscale devices (1D nanotubes and nanowires, 2D materials, 3D silicon CMOS, resistive memory and interconnects), circuit leakage, temperature measurements, thermoelectric energy conversion, and thermal challenges in densely integrated systems. Basic knowledge of semiconductors, transistors, and Matlab (or similar) are recommended.